74AVC16T245DGG [NEXPERIA]

16-bit dual supply translating transceiver with configurable voltage translation; 3-stateProduction;
74AVC16T245DGG
型号: 74AVC16T245DGG
厂家: Nexperia    Nexperia
描述:

16-bit dual supply translating transceiver with configurable voltage translation; 3-stateProduction

光电二极管 逻辑集成电路
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74AVC16T245  
16-bit dual supply translating transceiver with configurable  
voltage translation; 3-state  
Rev. 7 — 14 January 2019  
Product data sheet  
1. General description  
The 74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state  
outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual  
supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and  
nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control.  
VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making  
the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V,  
1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW  
on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a  
high-impedance OFF-state  
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing any damaging backflow current through the device when it is  
powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn  
are in the high-impedance OFF-state.  
2. Features and benefits  
Wide supply voltage range:  
VCC(A): 0.8 V to 3.6 V  
VCC(B): 0.8 V to 3.6 V  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F Class 3B exceeds 8000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101D exceeds 1000 V  
Maximum data rates:  
380 Mbit/s (≥ 1.8 V to 3.3 V translation)  
200 Mbit/s (≥ 1.1 V to 3.3 V translation)  
200 Mbit/s (≥ 1.1 V to 2.5 V translation)  
200 Mbit/s (≥ 1.1 V to 1.8 V translation)  
150 Mbit/s (≥ 1.1 V to 1.5 V translation)  
100 Mbit/s (≥ 1.1 V to 1.2 V translation)  
Suspend mode  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
IOFF circuitry provides partial Power-down mode operation  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AVC16T245DGG  
74AVC16T245DGV  
-40 °C to +125 °C  
TSSOP48  
plastic thin shrink small outline package;  
48 leads; body width 6.1 mm  
SOT362-1  
-40 °C to +125 °C  
TSSOP48 [1] plastic thin shrink small outline package;  
48 leads; body width 4.4 mm;  
SOT480-1  
lead pitch 0.4 mm  
[1] Also known as TVSOP48.  
4. Functional diagram  
1DIR  
2DIR  
1OE  
1B1  
2OE  
1A1  
2A1  
2B1  
V
V
V
V
CC(B)  
CC(A)  
CC(B)  
CC(A)  
to other seven channels  
to other seven channels  
001aak426  
Fig. 1. Logic diagram  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
2 / 22  
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1B8  
V
V
CC(B)  
CC(A)  
1OE  
1DIR  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1A8  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
V
V
CC(B)  
CC(A)  
2OE  
2DIR  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
001aak425  
Fig. 2. Logic symbol  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
3 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
5. Pinning information  
5.1. Pinning  
74AVC16T245  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
4
5
6
7
V
V
CC(A)  
CC(B)  
1B5  
8
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
9
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
V
V
CC(A)  
CC(B)  
2B5  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
2B6  
GND  
2B7  
2B8  
2DIR  
001aak427  
Fig. 3. Pin configuration SOT362-1 and SOT480-1 (TSSOP48)  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
1DIR, 2DIR  
1, 24  
direction control  
1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7, 1B8  
2, 3, 5, 6, 8, 9, 11, 12  
data input or output  
data input or output  
ground (0 V)  
2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7, 2B8  
13, 14, 16, 17, 19, 20, 22, 23  
4, 10, 15, 21, 28, 34, 39, 45  
7, 18  
GND [1]  
VCC(B)  
supply voltage B (nBn inputs are referenced  
to VCC(B)  
)
1OE, 2OE  
48, 25  
output enable input (active LOW)  
data input or output  
1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7, 1A8  
2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7, 2A8  
VCC(A)  
47, 46, 44, 43, 41, 40, 38, 37  
36, 35, 33, 32, 30, 29, 27, 26  
31, 42  
data input or output  
supply voltage A (nAn, nOE and nDIR  
inputs are referenced to VCC(A)  
)
[1] All GND pins must be connected to ground (0 V).  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
4 / 22  
 
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
0.8 V to 3.6 V  
GND [1]  
Input  
Input/output [1]  
nOE [2]  
nDIR [2]  
nAn [2]  
nBn [2]  
L
L
nAn = nBn  
input  
L
H
X
X
input  
Z
nBn = nAn  
H
X
Z
Z
Z
[1] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.  
[2] The nAn, nDIR and nOE input circuit is referenced to VCC(A); The nBn input circuit is referenced to VCC(B)  
.
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-0.5  
-50  
-0.5  
-50  
-0.5  
-0.5  
-
Max  
+4.6  
+4.6  
-
Unit  
V
VCC(A) supply voltage A  
VCC(B) supply voltage B  
V
IIK  
input clamping current  
VI < 0 V  
mA  
V
VI  
input voltage  
[1]  
+4.6  
-
IOK  
VO  
output clamping current  
output voltage  
VO < 0 V  
mA  
Active mode  
[1][2][3]  
[1]  
VCCO + 0.5 V  
Suspend or 3-state mode  
VO = 0 V to VCCO  
per VCC(A) or VCC(B) pin  
per GND pin  
+4.6  
±50  
100  
-
V
IO  
output current  
[2]  
mA  
mA  
mA  
°C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-100  
-65  
-
storage temperature  
total power dissipation  
+150  
500  
Tamb = -40 °C to +125 °C;  
[4]  
mW  
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] VCCO is the supply voltage associated with the output port.  
[3] VCCO + 0.5 V should not exceed 4.6 V.  
[4] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
5 / 22  
 
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
0.8  
0.8  
0
Max  
3.6  
Unit  
V
VCC(A) supply voltage A  
VCC(B) supply voltage B  
3.6  
V
VI  
input voltage  
3.6  
V
VO  
output voltage  
Active mode  
[1]  
[2]  
0
VCCO  
3.6  
V
Suspend or 3-state mode  
0
V
Tamb  
ambient temperature  
-40  
-
+125  
5
°C  
ns/V  
Δt/ΔV  
input transition rise and fall rate  
VCCI = 0.8 V to 3.6 V  
[1] VCCO is the supply voltage associated with the output port.  
[2] VCCI is the supply voltage associated with the input port.  
9. Static characteristics  
Table 6. Typical static characteristics at Tamb = 25 °C  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). [1]  
Symbol Parameter  
VOH HIGH-level output  
Conditions  
Min  
Typ  
Max  
Unit  
VI = VIH or VIL  
voltage  
IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V  
VI = VIH or VIL  
IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V  
-
0.69  
-
V
VOL  
LOW-level output  
voltage  
-
-
0.07  
-
V
II  
input leakage current  
nDIR, nOE input; VI = 0 V or 3.6 V;  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
±0.025  
±0.25  
μA  
IOZ  
OFF-state output  
current  
A or B port; VO = 0 V or VCCO  
VCC(A) = VCC(B) = 3.6 V  
;
[2]  
[2]  
[2]  
-
-
-
-
-
-
-
±0.5  
±0.5  
±0.5  
±0.1  
±0.1  
2.0  
±2.5  
±2.5  
±2.5  
±1  
μA  
μA  
μA  
μA  
μA  
pF  
pF  
suspend mode A port; VO = 0 V or VCCO  
VCC(A) = 3.6 V; VCC(B) = 0 V  
;
;
suspend mode B port; VO = 0 V or VCCO  
VCC(A) = 0 V; VCC(B) = 3.6 V  
IOFF  
power-off leakage  
current  
A port; VI or VO = 0 V to 3.6 V;  
VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V  
B port; VI or VO = 0 V to 3.6 V;  
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V  
±1  
CI  
input capacitance  
nDIR, nOE input; VI = 0 V or 3.3 V;  
VCC(A) = VCC(B) = 3.3 V  
-
CI/O  
input/output  
capacitance  
A and B port; VO = 3.3 V or 0 V;  
VCC(A) = VCC(B) = 3.3 V  
4.5  
-
[1] VCCO is the supply voltage associated with the output port.  
[2] For I/O ports, the parameter IOZ includes the input leakage current.  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
6 / 22  
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
Table 7. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). [1]  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
VIH  
HIGH-level  
data input  
input voltage  
VCCI = 0.8 V  
0.70VCCI  
0.65VCCI  
1.6  
-
-
-
-
0.70VCCI  
0.65VCCI  
1.6  
-
-
-
-
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
nDIR, nOE input  
V
V
V
2
2
VCC(A) = 0.8 V  
0.70VCC(A)  
-
-
-
-
0.70VCC(A)  
-
-
-
-
V
V
V
V
VCC(A) = 1.1 V to 1.95 V  
VCC(A) = 2.3 V to 2.7 V  
VCC(A) = 3.0 V to 3.6 V  
data input  
0.65VCC(A)  
0.65VCC(A)  
1.6  
2
1.6  
2
VIL  
LOW-level  
input voltage  
VCCI = 0.8 V  
-
-
-
-
0.30VCCI  
0.35VCCI  
0.7  
-
-
-
-
0.30VCCI  
0.35VCCI  
0.7  
V
V
V
V
VCCI = 1.1 V to 1.95 V  
VCCI = 2.3 V to 2.7 V  
VCCI = 3.0 V to 3.6 V  
nDIR, nOE input  
0.8  
0.8  
VCC(A) = 0.8 V  
-
-
-
-
0.30VCC(A)  
0.35VCC(A)  
0.7  
-
-
-
-
0.30VCC(A)  
0.35VCC(A)  
0.7  
V
V
V
V
VCC(A) = 1.1 V to 1.95 V  
VCC(A) = 2.3 V to 2.7 V  
VCC(A) = 3.0 V to 3.6 V  
VI = VIH or VIL  
0.8  
0.8  
VOH  
HIGH-level  
output voltage  
IO = -100 μA;  
VCCO - 0.1  
-
VCCO - 0.1  
-
V
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
IO = -3 mA; VCC(A) = VCC(B) = 1.1 V  
IO = -6 mA; VCC(A) = VCC(B) = 1.4 V  
IO = -8 mA; VCC(A) = VCC(B) = 1.65 V  
IO = -9 mA; VCC(A) = VCC(B) = 2.3 V  
IO = -12 mA; VCC(A) = VCC(B) = 3.0 V  
VI = VIH or VIL  
0.85  
1.05  
1.2  
-
-
-
-
-
0.85  
1.05  
1.2  
-
-
-
-
-
V
V
V
V
V
1.75  
2.3  
1.75  
2.3  
VOL  
LOW-level  
output voltage  
IO = 100 μA;  
-
0.1  
-
0.1  
V
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
IO = 3 mA; VCC(A) = VCC(B) = 1.1 V  
IO = 6 mA; VCC(A) = VCC(B) = 1.4 V  
IO = 8 mA; VCC(A) = VCC(B) = 1.65 V  
IO = 9 mA; VCC(A) = VCC(B) = 2.3 V  
IO = 12 mA; VCC(A) = VCC(B) = 3.0 V  
-
-
-
-
-
0.25  
0.35  
0.45  
0.55  
0.7  
-
-
-
-
-
0.25  
0.35  
0.45  
0.55  
0.7  
V
V
V
V
V
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
7 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
II  
input leakage nDIR, nOE input; VI = 0 V or 3.6 V;  
-
±1  
-
±5  
μA  
μA  
μA  
current  
VCC(A) = VCC(B) = 0.8 V to 3.6 V  
IOZ  
OFF-state  
A or B port; VO = 0 V or VCCO  
;
[2]  
[2]  
-
-
±5  
±5  
-
-
±30  
±30  
output current VCC(A) = VCC(B) = 3.6 V  
suspend mode A port;  
VO = 0 V or VCCO; VCC(A) = 3.6 V;  
VCC(B) = 0 V  
suspend mode B port;  
VO = 0 V or VCCO; VCC(A) = 0 V;  
VCC(B) = 3.6 V  
[2]  
-
±5  
-
±30  
μA  
IOFF  
power-off  
A port; VI or VO = 0 V to 3.6 V;  
-
-
±5  
±5  
-
-
±30  
±30  
μA  
μA  
leakage current VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V  
B port; VI or VO = 0 V to 3.6 V;  
VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V  
ICC  
supply current A port; VI = 0 V or VCCI; IO = 0 A  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
-
-
30  
25  
-
-
125  
100  
μA  
μA  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 3.6 V  
B port; VI = 0 V or VCCI; IO = 0 A  
-
25  
-
-
100  
-
μA  
μA  
-5  
-20  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
-
-
30  
25  
-
-
125  
100  
μA  
μA  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
VCC(A) = 3.6 V; VCC(B) = 0 V  
VCC(A) = 0 V; VCC(B) = 3.6 V  
A plus B port (ICC(A) + ICC(B));  
-5  
-
-
-20  
-
μA  
μA  
μA  
25  
55  
-
-
100  
185  
-
IO = 0 A; VI = 0 V or VCCI  
VCC(A) = 0.8 V to 3.6 V;  
VCC(B) = 0.8 V to 3.6 V  
;
A plus B port (ICC(A) + ICC(B));  
-
45  
-
150  
μA  
IO = 0 A; VI = 0 V or VCCI  
VCC(A) = 1.1 V to 3.6 V;  
VCC(B) = 1.1 V to 3.6 V  
;
[1] VCCI is the supply voltage associated with the data input port; VCCO is the supply voltage associated with the output port.  
[2] For I/O ports, the parameter IOZ includes the input leakage current.  
Table 8. Typicaltotal supply current (ICC(A) + ICC(B)  
)
VCC(A)  
VCC(B)  
1.5 V  
0.1  
Unit  
0 V  
0
0.8 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.3  
1.6  
1.2 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.8  
1.8 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.2  
2.5 V  
0.1  
0.3  
0.1  
0.1  
0.1  
0.1  
0.1  
3.3 V  
0.1  
1.6  
0.8  
0.4  
0.2  
0.1  
0.1  
0 V  
μA  
μA  
μA  
μA  
μA  
μA  
μA  
0.8 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.4  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
8 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
10. Dynamic characteristics  
Table 9. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V). [1][2]  
Symbol Parameter Conditions  
VCC(A) = VCC(B)  
0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V  
Unit  
CPD  
power  
dissipation  
capacitance  
A port: (direction nAn to nBn); output enabled  
0.2  
A port: (direction nAn to nBn); output disabled 0.2  
A port: (direction nBn to nAn); output enabled  
A port: (direction nBn to nAn); output disabled 0.6  
B port: (direction nAn to nBn); output enabled  
B port: (direction nAn to nBn); output disabled 0.6  
B port: (direction nBn to nAn); output enabled 0.2  
B port: (direction nBn to nAn); output disabled 0.2  
0.2  
0.2  
9.7  
0.6  
9.7  
0.6  
0.2  
0.2  
0.2  
0.2  
9.8  
0.6  
9.8  
0.6  
0.2  
0.2  
0.2  
0.2  
0.3  
0.3  
0.4 pF  
0.4 pF  
13.7 pF  
0.7 pF  
13.7 pF  
0.7 pF  
0.4 pF  
0.4 pF  
9
10.3  
0.7  
11.7  
0.7  
9
10.3  
0.7  
11.7  
0.7  
0.2  
0.3  
0.2  
0.3  
[1] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz;  
CL = load capacitance in pF; VCC = supply voltage in V;  
N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of the outputs.  
[2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.  
Table 10. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]  
Symbol Parameter Conditions VCC(B)  
1.5 V  
Unit  
0.8 V  
14.4  
14.4  
16.2  
17.6  
21.9  
22.2  
1.2 V  
7.0  
1.8 V  
6.0  
2.5 V  
5.9  
3.3 V  
6.0  
tpd  
tdis  
ten  
propagation delay nAn to nBn  
nBn to nAn  
6.2  
12.1  
16.2  
9.0  
ns  
ns  
ns  
ns  
ns  
ns  
12.4  
16.2  
10.0  
21.9  
11.1  
11.9  
16.2  
9.1  
11.8  
16.2  
8.7  
11.8  
16.2  
9.3  
disable time  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
enable time  
21.9  
9.8  
21.9  
9.4  
21.9  
9.4  
21.9  
9.6  
[1] tpd is the same as tPLH and tPHL  
tdis is the same as tPLZ and tPHZ  
ten is the same as tPZL and tPZH  
;
;
.
Table 11. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]  
Symbol Parameter Conditions VCC(A)  
1.5 V  
Unit  
0.8 V  
14.4  
14.4  
16.2  
17.6  
21.9  
22.2  
1.2 V  
12.4  
7.0  
1.8 V  
11.9  
6.0  
2.5 V  
11.8  
5.9  
3.3 V  
11.8  
6.0  
tpd  
tdis  
ten  
propagation delay nAn to nBn  
nBn to nAn  
12.1  
6.2  
ns  
ns  
ns  
ns  
ns  
ns  
disable time  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
5.9  
4.4  
4.2  
3.1  
3.5  
14.2  
6.4  
13.7  
4.4  
13.6  
3.5  
13.3  
2.6  
13.1  
2.3  
enable time  
17.7  
17.2  
17.0  
16.8  
16.7  
[1] tpd is the same as tPLH and tPHL  
tdis is the same as tPLZ and tPHZ  
ten is the same as tPZL and tPZH  
;
;
.
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
9 / 22  
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
Table 12. Dynamic characteristics for temperature range -40 °C to +85 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.1 V to 1.3 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
9.2  
9.2  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
6.9  
8.7  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
6.0  
8.5  
0.5  
0.5  
1.5  
1.0  
1.0  
1.0  
5.1  
8.2  
0.5  
0.5  
1.5  
1.0  
1.0  
1.0  
4.9 ns  
8.0 ns  
11.6 ns  
8.9 ns  
14.5 ns  
7.7 ns  
disable time  
11.6  
12.5  
14.5  
14.9  
11.6  
9.7  
11.6  
9.5  
11.6  
8.1  
enable time  
14.5  
11.0  
14.5  
9.6  
14.5  
8.1  
VCC(A) = 1.4 V to 1.6 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
8.7  
6.9  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
6.2  
6.2  
0.5  
0.5  
1.5  
1.5  
1.0  
0.5  
5.2  
5.9  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
4.1  
5.6  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
3.7 ns  
5.5 ns  
9.1 ns  
6.3 ns  
10.1 ns  
5.2 ns  
disable time  
9.1  
9.1  
9.1  
9.1  
11.4  
10.1  
13.5  
8.7  
7.5  
6.5  
enable time  
10.1  
10.1  
10.1  
8.1  
10.1  
5.9  
VCC(A) = 1.65 V to 1.95 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
8.5  
6.0  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
5.9  
5.2  
7.7  
8.4  
7.8  
9.2  
0.5  
0.5  
1.5  
1.5  
1.0  
0.5  
4.8  
4.8  
7.7  
7.1  
7.8  
7.4  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
3.7  
4.5  
7.7  
5.9  
7.8  
5.3  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
3.3 ns  
4.4 ns  
7.7 ns  
5.7 ns  
7.8 ns  
4.5 ns  
disable time  
7.7  
11.1  
7.8  
enable time  
13.0  
VCC(A) = 2.3 V to 2.7 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
8.2  
5.1  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
5.6  
4.1  
6.1  
7.9  
5.3  
9.4  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
4.6  
3.7  
6.1  
6.6  
5.3  
7.3  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
3.3  
3.4  
6.1  
6.1  
5.3  
5.1  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
2.8 ns  
3.2 ns  
6.1 ns  
5.2 ns  
5.3 ns  
4.5 ns  
disable time  
6.1  
10.6  
5.3  
enable time  
12.5  
VCC(A) = 3.0 V to 3.6 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
8.0  
4.9  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
5.5  
3.7  
5.0  
7.7  
4.3  
9.3  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
4.4  
3.3  
5.0  
6.5  
4.2  
7.2  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
3.2  
2.9  
5.0  
5.2  
4.1  
4.9  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
2.7 ns  
2.7 ns  
5.0 ns  
5.0 ns  
4.0 ns  
4.0 ns  
disable time  
5.0  
10.3  
4.3  
enable time  
12.4  
[1] tpd is the same as tPLH and tPHL  
tdis is the same as tPLZ and tPHZ  
ten is the same as tPZL and tPZH  
;
;
.
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
10 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
Table 13. Dynamic characteristics for temperature range -40 °C to +125 °C  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 6; for wave forms see Fig. 4 and Fig. 5. [1]  
Symbol Parameter  
Conditions  
VCC(B)  
Unit  
1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
VCC(A) = 1.1 V to 1.3 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
10.2  
10.2  
12.8  
13.8  
16.0  
16.4  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
7.6  
9.6  
0.5  
0.5  
1.5  
1.5  
1.0  
1.1  
6.6  
9.4  
0.5  
0.5  
1.5  
1.0  
1.0  
1.0  
5.7  
9.1  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
5.4 ns  
8.8 ns  
12.8 ns  
9.8 ns  
16.0 ns  
8.5 ns  
disable time  
12.8  
10.7  
16.0  
12.1  
12.8  
10.5  
16.0  
10.6  
12.8  
9.0  
enable time  
16.0  
9.0  
VCC(A) = 1.4 V to 1.6 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
9.6  
7.6  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
6.9  
6.9  
0.5  
0.5  
1.5  
1.5  
1.0  
0.5  
5.8  
6.5  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
4.6  
6.2  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
4.1 ns  
6.1 ns  
10.1 ns  
7.0 ns  
11.2 ns  
5.8 ns  
disable time  
10.1  
12.6  
11.2  
14.9  
10.1  
9.6  
10.1  
8.3  
10.1  
7.2  
enable time  
11.2  
11.2  
11.2  
9.0  
11.2  
6.5  
VCC(A) = 1.65 V to 1.95 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
9.4  
6.6  
0.5  
0.5  
1.5  
1.5  
1.0  
1.0  
6.5  
5.8  
0.5  
0.5  
1.5  
1.5  
1.0  
0.5  
5.3  
5.3  
8.5  
7.9  
8.6  
8.2  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
4.1  
5.0  
8.5  
6.5  
8.6  
5.9  
0.5  
0.5  
1.5  
1.0  
1.0  
0.5  
3.7 ns  
4.9 ns  
8.5 ns  
6.3 ns  
8.6 ns  
5.0 ns  
disable time  
8.5  
8.5  
12.3  
8.6  
9.3  
enable time  
8.6  
14.3  
10.2  
VCC(A) = 2.3 V to 2.7 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
9.1  
5.7  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
6.2  
4.6  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
5.1  
4.1  
6.8  
7.3  
5.9  
8.1  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
3.7  
3.8  
6.8  
6.8  
5.9  
5.7  
0.5  
0.5  
1.0  
1.0  
0.5  
0.5  
3.1 ns  
3.6 ns  
6.8 ns  
5.8 ns  
5.9 ns  
5.0 ns  
disable time  
6.8  
6.8  
11.7  
5.9  
8.7  
enable time  
5.9  
13.8  
10.4  
VCC(A) = 3.0 V to 3.6 V  
tpd  
tdis  
ten  
propagation  
delay  
nAn to nBn  
nBn to nAn  
nOE to nAn  
nOE to nBn  
nOE to nAn  
nOE to nBn  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
8.8  
5.4  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
6.1  
4.1  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
4.9  
3.7  
5.5  
7.2  
4.7  
8.0  
0.5  
0.5  
0.5  
1.0  
0.5  
0.5  
3.6  
3.2  
5.5  
5.8  
4.6  
5.4  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
3.0 ns  
3.0 ns  
5.5 ns  
5.5 ns  
4.4 ns  
4.4 ns  
disable time  
5.5  
5.5  
11.4  
4.8  
8.5  
enable time  
4.8  
13.7  
10.3  
[1] tpd is the same as tPLH and tPHL  
tdis is the same as tPLZ and tPHZ  
ten is the same as tPZL and tPZH  
;
;
.
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
11 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
10.1. Waveforms and test circuit  
V
I
nAn, nBn input  
GND  
V
M
t
t
PLH  
PHL  
V
OH  
nBn, nAn output  
V
M
V
OL  
001aak285  
Measurement points are given in Table 14.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 4. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times  
V
I
V
nOE input  
M
GND  
t
t
PZL  
PLZ  
V
CCO  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
001aak286  
Measurement points are given in Table 14.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 5. Enable and disable times  
Table 14. Measurement points  
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 1.6 V  
1.65 V to 2.7 V  
3.0 V to 3.6 V  
Input [1]  
Output [2]  
VM  
VM  
VX  
VY  
0.5VCCI  
0.5VCCI  
0.5VCCI  
0.5VCCO  
0.5VCCO  
0.5VCCO  
VOL + 0.1 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOH - 0.1 V  
VOH - 0.15 V  
VOH - 0.3 V  
[1] VCCI is the supply voltage associated with the data input port.  
[2] VCCO is the supply voltage associated with the output port.  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
12 / 22  
 
 
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 15.  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance.  
VEXT = External voltage for measuring switching times.  
Fig. 6. Test circuit for measuring switching times  
Table 15. Test data  
Supply voltage  
VCC(A), VCC(B)  
0.8 V to 1.6 V  
1.65 V to 2.7 V  
3.0 V to 3.6 V  
Input  
VI [1]  
VCCI  
VCCI  
VCCI  
Load  
CL  
VEXT  
Δt/ΔV [2]  
≤ 1.0 ns/V  
≤ 1.0 ns/V  
≤ 1.0 ns/V  
RL  
tPLH, tPHL  
tPZH, tPHZ  
GND  
tPZL, tPLZ [3]  
2VCCO  
15 pF  
15 pF  
15 pF  
2 kΩ  
2 kΩ  
2 kΩ  
open  
open  
open  
GND  
2VCCO  
GND  
2VCCO  
[1] VCCI is the supply voltage associated with the data input port.  
[2] dV/dt ≥ 1.0 V/ns  
[3] VCCO is the supply voltage associated with the output port.  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
13 / 22  
 
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
11. Typical propagation delay characteristics  
001aai476  
001aai477  
24  
21  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
t
pd  
(ns)  
t
pd  
(ns)  
(1)  
20  
17  
16  
12  
8
13  
(2)  
(3)  
(4)  
(5)  
(6)  
4
9
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C (pF)  
L
a. Propagation delay (nAn to nBn); VCC(A) = 0.8 V  
(1) VCC(B) = 0.8 V.  
b. Propagation delay (nAn to nBn); VCC(B) = 0.8 V  
(1) VCC(A) = 0.8 V.  
(2) VCC(B) = 1.2 V.  
(2) VCC(A) = 1.2 V.  
(3) VCC(B) = 1.5 V.  
(3) VCC(A) = 1.5 V.  
(4) VCC(B) = 1.8 V.  
(4) VCC(A) = 1.8 V.  
(5) VCC(B) = 2.5 V.  
(5) VCC(A) = 2.5 V.  
(6) VCC(B) = 3.3 V.  
(6) VCC(A) = 3.3 V.  
Fig. 7. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
14 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
001aai478  
001aai491  
7
7
5
3
1
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(2)  
(3)  
5
3
1
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C (pF)  
L
a. LOW to HIGH propagation delay (nAn to nBn);  
VCC(A) = 1.2 V  
b. HIGH to LOW propagation delay (nAn to nBn);  
VCC(A) = 1.2 V  
001aai479  
001aai480  
7
7
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
c. LOW to HIGH propagation delay (nAn to nBn);  
VCC(A) = 1.5 V  
d. HIGH to LOW propagation delay (nAn to nBn);  
VCC(A) = 1.5 V  
(1) VCC(B) = 1.2 V.  
(2) VCC(B) = 1.5 V.  
(3) VCC(B) = 1.8 V.  
(4) VCC(B) = 2.5 V.  
(5) VCC(B) = 3.3 V.  
Fig. 8. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
15 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
001aai481  
001aai482  
7
7
5
3
1
(1)  
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C (pF)  
L
a. LOW to HIGH propagation delay (nAn to nBn);  
VCC(A) = 1.8 V  
b. HIGH to LOW propagation delay (nAn to nBn);  
VCC(A) = 1.8 V  
001aai483  
001aai486  
7
7
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(1)  
5
3
1
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C
L
(pF)  
c. LOW to HIGH propagation delay (nAn to nBn);  
VCC(A) = 2.5 V  
d. HIGH to LOW propagation delay (nAn to nBn);  
VCC(A) = 2.5 V  
(1) VCC(B) = 1.2 V.  
(2) VCC(B) = 1.5 V.  
(3) VCC(B) = 1.8 V.  
(4) VCC(B) = 2.5 V.  
(5) VCC(B) = 3.3 V.  
Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
16 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
001aai485  
001aai484  
7
7
5
3
1
t
t
PLH  
(ns)  
PHL  
(ns)  
(1)  
(1)  
5
3
1
(2)  
(3)  
(2)  
(3)  
(4)  
(5)  
(4)  
(5)  
0
20  
40  
60  
0
20  
40  
60  
C
L
(pF)  
C (pF)  
L
a. LOW to HIGH propagation delay (nAn to nBn);  
VCC(A) = 3.3 V  
b. HIGH to LOW propagation delay (nAn to nBn);  
VCC(A) = 3.3 V  
(1) VCC(B) = 1.2 V.  
(2) VCC(B) = 1.5 V.  
(3) VCC(B) = 1.8 V.  
(4) VCC(B) = 2.5 V.  
(5) VCC(B) = 3.3 V.  
Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
17 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
12. Package outline  
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm  
SOT362-1  
D
E
A
X
c
v
A
H
E
y
Z
48  
25  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
24  
detail X  
w
b
p
e
0
5 mm  
2.5  
scale  
Dimensions (mm are the original dimensions)  
Unit  
max  
(1)  
(2)  
A
A
A
A
b
c
D
E
e
H
L
1
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
°
8
0
0.15 1.05  
0.05 0.85  
0.28 0.2 12.6 6.2  
0.17 0.1 12.4 6.0  
8.3  
7.9  
0.8 0.50  
0.4 0.35  
0.8  
0.4  
mm nom 1.2  
min  
0.25  
0.5  
0.25 0.08 0.1  
°
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
sot362-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
03-02-19  
13-08-05  
SOT362-1  
MO-153  
Fig. 11. Package outline SOT362-1 (TSSOP48)  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
18 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
TSSOP48: plastic thin shrink small outline package; 48 leads;  
body width 4.4 mm; lead pitch 0.4 mm  
SOT480-1  
E
A
D
X
c
y
H
E
v
M
A
Z
25  
48  
Q
(A )  
3
A
A
2
A
1
pin 1 index  
θ
L
p
L
detail X  
1
24  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.85  
0.23  
0.13  
0.20  
0.09  
9.8  
9.6  
4.5  
4.3  
6.6  
6.2  
0.7  
0.5  
0.4  
0.3  
0.4  
0.1  
mm  
1.1  
0.4  
0.25  
1
0.2  
0.07  
0.08  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT480-1  
MO-153  
Fig. 12. Package outline SOT480-1 (TSSOP48)  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
19 / 22  
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
13. Abbreviations  
Table 16. Abbreviations  
Acronym  
Description  
CDM  
DUT  
ESD  
HBM  
MM  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
14. Revision history  
Table 17. Revision history  
Document ID  
74AVC16T245 v.7  
Modifications:  
Release date  
20190114  
Data sheet status  
Change notice Supersedes  
- 74AVC16T245 v.6  
Product data sheet  
The format of this data sheet has been redesigned to comply with the identity guidelines  
of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type numbers 74AVC16T245EV (SOT702-1) and 74AVC16T245BX (SOT1134-2)  
removed.  
74AVC16T245 v.6  
Modifications:  
20130909  
Table 4: conditions ICC and IGND changed (errata).  
20120309 Product data sheet  
Product data sheet  
-
74AVC16T245 v.5  
74AVC16T245 v.5  
Modifications:  
-
74AVC16T245 v.4  
For type number 74AVC16T245BX the sot code has changed to SOT1134-2.  
74AVC16T245 v.4  
Modifications:  
20111208  
Product data sheet  
-
74AVC16T245 v.3  
Legal pages updated.  
74AVC16T245 v.3  
74AVC16T245 v.2  
74AVC16T245 v.1  
20110609  
20100330  
20091001  
Product data sheet  
Product data sheet  
Product data sheet  
-
-
-
74AVC16T245 v.2  
74AVC16T245 v.1  
-
©
74AVC16T245  
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Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
20 / 22  
 
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
15. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
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Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
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of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
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or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
21 / 22  
 
Nexperia  
74AVC16T245  
16-bit dual supply translating transceiver with configurable voltage translation; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Functional diagram.......................................................2  
5. Pinning information......................................................4  
5.1. Pinning.........................................................................4  
5.2. Pin description.............................................................4  
6. Functional description................................................. 5  
7. Limiting values............................................................. 5  
8. Recommended operating conditions..........................6  
9. Static characteristics....................................................6  
10. Dynamic characteristics............................................ 9  
10.1. Waveforms and test circuit...................................... 12  
11. Typical propagation delay characteristics..............14  
12. Package outline........................................................ 18  
13. Abbreviations............................................................20  
14. Revision history........................................................20  
15. Legal information......................................................21  
© Nexperia B.V. 2019. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 14 January 2019  
©
74AVC16T245  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 7 — 14 January 2019  
22 / 22  

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TI

74AVC16T245DGVRG4

16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
TI

74AVC16T245EV

16-bit dual supply translating transceiver with configurable voltage translation; 3-state
NXP