74LV393-Q100 [NEXPERIA]

Dual 4-bit binary ripple counter;
74LV393-Q100
型号: 74LV393-Q100
厂家: Nexperia    Nexperia
描述:

Dual 4-bit binary ripple counter

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中文:  中文翻译
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74LV393-Q100  
Dual 4-bit binary ripple counter  
Rev. 2 — 17 September 2014  
Product data sheet  
1. General description  
The 74LV393-Q100 is a low–voltage Si-gate CMOS device and is pin and function  
compatible with 74HC393-Q100 and 74HCT393-Q100.  
The 74LV393-Q100 is a dual 4-stage binary ripple counter. Each counter features a clock  
input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel  
outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A  
HIGH on nMR clears the counter stages and forces the outputs LOW, independent of the  
state of nCP.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Optimized for low voltage applications: 1.0 V to 3.6 V  
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V  
Typical VOLP (output ground bounce) 0.8 V at VCC = 3.3 V, Tamb = 25 C  
Typical VOHV (output VOH undershoot) 2 V at VCC = 3.3 V, Tamb = 25 C  
Two 4-bit binary counters with individual clocks  
Divide-by any binary module up to 28 in one package  
Two master resets to clear each 4-bit counter individually  
Complies with JEDEC standard no. 7A  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74LV393D-Q100  
40 C to +125 C  
SO14  
plastic small outline package; 14 leads; body  
width 3.9 mm  
SOT108-1  
74LV393PW-Q100  
40 C to +125 C  
TSSOP14 plastic thin shrink small outline package; 14  
leads; body width 4.4 mm  
SOT402-1  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
4. Functional diagram  
&75ꢆ  
&7ꢁ ꢁꢇ  
ꢀ4ꢇ  
ꢀꢁ  
ꢀ&3  
ꢀ4ꢀ  
ꢀ4ꢂ  
ꢀ4ꢅ  
&7  
ꢀ05  
&75ꢆ  
ꢂ4ꢇ  
ꢂ4ꢀ  
ꢂ4ꢂ  
ꢂ4ꢅ  
ꢀꢀ  
ꢀꢇ  
ꢀꢀ  
ꢀꢇ  
ꢀꢅ  
ꢂ&3  
ꢀꢂ  
ꢀꢅ  
&7ꢁ ꢁꢇ  
&7  
ꢀꢂ  
ꢂ05  
ꢀꢀꢁDDGꢂꢃꢄ  
ꢀꢀꢁDDGꢂꢃꢃ  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
ꢀ4ꢇ  
ꢀ4ꢀ  
ꢀ&3  
ꢆꢋ%,7ꢁ  
%,1$5<ꢁ  
5,33/(ꢁ  
ꢀ4ꢂ  
ꢀ4ꢅ  
ꢀ05  
&2817(5  
ꢀꢄ  
ꢀꢆ  
ꢀꢅ  
ꢀꢂ  
ꢂ4ꢇ  
ꢂ4ꢀ  
ꢂ4ꢂ  
ꢂ4ꢅ  
ꢀꢀ  
ꢀꢇ  
ꢂ&3  
ꢀꢅ  
ꢆꢋ%,7ꢁ  
%,1$5<ꢁ  
5,33/(ꢁ  
&2817(5  
ꢂ05  
ꢀꢂ  
ꢀꢀ  
ꢀꢇ  
ꢀꢀꢁDDGꢂꢃꢅ  
ꢀꢀꢁDDGꢂꢃꢂ  
Fig 3. Functional diagram  
Fig 4. State diagram  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
2 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
4
4
4
4
))ꢁ  
))ꢁ  
))ꢁ  
))ꢁ  
&3  
7
7
7
7
5'  
5'  
5'  
5'  
05  
4ꢇ  
4ꢀ  
4ꢂ  
4ꢅ  
ꢀꢀꢁDDGꢂꢃꢆ  
Fig 5. Logic diagram (one counter)  
5. Pinning information  
5.1 Pinning  
ꢀꢁ/9ꢂꢃꢂꢄ4ꢅꢆꢆ  
ꢀꢆ  
ꢀꢅ  
ꢀꢂ  
ꢀꢀ  
ꢀꢇ  
ꢀ&3  
ꢀ05  
ꢀ4ꢇ  
ꢀ4ꢀ  
ꢀ4ꢂ  
ꢀ4ꢅ  
*1'  
9
&&  
ꢀꢁ/9ꢂꢃꢂꢄ4ꢅꢆꢆ  
ꢂ&3  
ꢂ05  
ꢂ4ꢇ  
ꢂ4ꢀ  
ꢂ4ꢂ  
ꢂ4ꢅ  
ꢀꢆ  
ꢀꢅ  
ꢀꢂ  
ꢀꢀ  
ꢀꢇ  
ꢀ&3  
ꢀ05  
ꢀ4ꢇ  
ꢀ4ꢀ  
ꢀ4ꢂ  
ꢀ4ꢅ  
*1'  
9
&&  
ꢂ&3  
ꢂ05  
ꢂ4ꢇ  
ꢂ4ꢀ  
ꢂ4ꢂ  
ꢂ4ꢅ  
DDDꢇꢀꢁꢃꢀꢁꢈ  
DDDꢇꢀꢁꢃꢀꢄꢀ  
Fig 6. Pin configuration SO14  
Fig 7. Pin configuration TSSOP14  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
3 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
5.2 Pin description  
Table 2.  
Symbol  
1CP  
Pin description  
Pin  
1
Description  
clock input (HIGH-to-LOW, edge-triggered)  
asynchronous master reset input (active HIGH)  
flip-flop output  
1MR  
1Q0  
2
3
1Q1  
4
flip-flop output  
1Q2  
5
flip-flop output  
1Q3  
6
flip-flop output  
GND  
2Q3  
7
ground (0 V)  
8
flip-flop output  
2Q2  
9
flip-flop output  
2Q1  
10  
11  
12  
13  
14  
flip-flop output  
2Q0  
flip-flop output  
2MR  
2CP  
asynchronous master reset input (active HIGH)  
clock input (HIGH-to-LOW, edge-triggered)  
supply voltage  
VCC  
6. Functional description  
Table 3.  
Count  
Count sequence for one counter [1]  
Output  
nQ0  
L
nQ1  
L
nQ2  
L
nQ3  
L
0
1
H
L
L
L
L
2
H
H
L
L
L
3
H
L
L
L
4
H
H
H
H
L
L
5
H
L
L
L
6
H
H
L
L
7
H
L
L
8
H
H
H
H
H
H
H
H
9
H
L
L
L
10  
11  
12  
13  
14  
15  
H
H
L
L
H
L
L
H
H
H
H
H
L
L
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level.  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
4 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max  
+4.6  
20  
50  
25  
+50  
-
Unit  
V
supply voltage  
0.5  
input clamping current  
output clamping current  
output current  
VI < 0.5 V or VI > VCC + 0.5 V  
VO < 0.5 V or VO > VCC + 0.5 V  
VO = 0.5 V to VCC + 0.5 V  
-
mA  
mA  
mA  
mA  
mA  
C  
IOK  
-
IO  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
50  
storage temperature  
total power dissipation  
65  
+150  
500  
400  
[1]  
[2]  
SO14 package  
-
-
mW  
mW  
TSSOP14 packages  
[1] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.  
[2] For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.  
8. Recommended operating conditions  
Table 5.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V)  
Symbol  
VCC  
Parameter  
Conditions  
Min  
Typ  
Max  
3.6  
Unit  
V
supply voltage  
input voltage  
1.0  
3.3  
VI  
0
-
-
-
-
-
-
VCC  
VCC  
+125  
500  
200  
100  
V
VO  
output voltage  
ambient temperature  
0
V
Tamb  
t/V  
40  
C  
input transition rise and fall rate VCC = 1.0 V to 2.0 V  
VCC = 2.0 V to 2.7 V  
-
-
-
ns/V  
ns/V  
ns/V  
VCC = 2.7 V to 3.6 V  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
5 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C  
Unit  
Min Typ[1] Max  
Min  
0.9  
1.4  
2.0  
-
Max  
-
VIH  
HIGH-level input voltage VCC = 1.2 V  
VCC = 2.0 V  
0.9  
1.4  
2.0  
-
-
-
-
-
-
-
-
V
V
V
V
V
V
-
-
VCC = 2.7 V to 3.6 V  
VCC = 1.2 V  
-
-
VIL  
LOW-level input voltage  
0.3  
0.6  
0.8  
0.3  
0.6  
0.8  
VCC = 2.0 V  
-
-
VCC = 2.7 V to 3.6 V  
-
-
VOH  
HIGH-level output voltage VI = VIH or VIL  
IO = 100 A; VCC = 1.2 V  
-
1.2  
2.0  
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
IO = 100 A; VCC = 2.0 V  
IO = 100 A; VCC = 2.7 V  
IO = 100 A; VCC = 3.0 V  
IO = 6 mA; VCC = 3.0 V  
1.8  
1.8  
2.5  
2.8  
2.20  
2.5  
2.7  
2.80  
2.40  
3.0  
2.82  
VOL  
LOW-level output voltage VI = VIH or VIL  
IO = 100 A; VCC = 1.2 V  
IO = 100 A; VCC = 2.0 V  
IO = 100 A; VCC = 2.7 V  
IO = 100 A; VCC = 3.0 V  
IO = 6 mA; VCC = 3.0 V  
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
-
-
V
0
0.2  
0.2  
0.2  
0.40  
1.0  
20.0  
0.2  
0.2  
0.2  
0.50  
1.0  
160  
V
0
V
0
V
0.25  
V
II  
input leakage current  
supply current  
VI = VCC or GND; VCC = 3.6 V  
-
-
A  
A  
ICC  
VI = VCC or GND; IO = 0 A;  
VCC = 3.6 V  
ICC  
additional supply current quiescent per input  
VI = VCC 0.6 V;  
-
-
-
500  
-
-
-
850  
-
A  
VCC = 2.7 V to 3.6 V  
CI  
input capacitance  
3.5  
pF  
[1] All typical values are measured at Tamb = 25 C.  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
6 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10.  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min Typ[1] Max  
Min  
Max  
[3]  
tpd  
propagation delay nCP to nQ0; see Figure 8  
VCC = 1.2 V  
-
-
-
-
-
75  
26  
19  
12  
14  
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
49  
36  
-
60  
44  
-
VCC = 2.7 V  
VCC = 3.3 V, CL = 15 pF  
VCC = 3.0 V to 3.6 V  
nQ to nQn1; see Figure 8  
VCC = 1.2 V  
29  
35  
[3]  
-
-
-
-
-
25  
9
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
17  
13  
-
20  
15  
-
VCC = 2.7 V  
6
VCC = 3.3 V, CL = 15 pF  
VCC = 3.0 V to 3.6 V  
4
5[2]  
10  
12  
tPHL  
HIGH to LOW  
propagation delay  
nMR to nQx; see Figure 9  
VCC = 1.2 V  
-
-
-
-
-
70  
24  
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 2.0 V  
44  
33  
-
54  
40  
-
V
CC = 2.7 V  
18  
VCC = 3.3 V, CL = 15 pF  
VCC = 3.0 V to 3.6 V  
nQx; see Figure 8  
VCC = 2.0 V  
11  
13[2]  
26  
32  
[4]  
tt  
transition time  
pulse width  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
nCP HIGH or LOW; see Figure 8  
VCC = 2.0 V  
tW  
34  
25  
20  
10  
8
6[2]  
-
-
-
41  
30  
24  
-
-
-
ns  
ns  
ns  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
nMR HIGH; see Figure 9  
VCC = 2.0 V  
34  
25  
20  
12  
9
7[2]  
-
-
-
41  
30  
24  
-
-
-
ns  
ns  
ns  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
nMR to nCP; see Figure 9  
VCC = 1.2 V  
trec  
recovery time  
-
5
2
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
VCC = 2.0 V  
5
5
5
5
5
5
VCC = 2.7 V  
2
1[2]  
VCC = 3.0 V to 3.6 V  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
7 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 10.  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min Typ[1] Max  
Min  
Max  
fmax  
maximum  
frequency  
see Figure 8  
VCC = 2.0 V  
14  
19  
-
53  
72  
-
-
-
-
-
12  
16  
-
-
-
-
-
-
MHz  
MHz  
MHz  
MHz  
pF  
VCC = 2.7 V  
VCC = 3.3 V, CL = 15 pF  
VCC = 3.0 V to 3.6 V  
99  
24  
-
90[2]  
23[2]  
20  
-
[5]  
CPD  
power dissipation VI = GND to VCC  
capacitance  
[1] All typical values are measured at Tamb = 25 C.  
[2] Typical values are measured at VCC = 3.3 V.  
[3] tpd is the same as tPLH and tPHL  
[4] tt is the same as tTHL and tTLH  
.
.
[5]  
CPD is used to determine the dynamic power dissipation (PD in W).  
PD = CPD VCC2 fi N + (CL VCC2 fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL VCC2 fo) = sum of outputs.  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
8 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
10.1 Waveforms  
I  
PD[  
9
,
LQSXWꢁQ&3  
*1'  
9
0
W
W
3/+  
3+/  
9
2+  
RXWSXWꢁQ4[  
9
0
9
2/  
W
W
7/+  
7+/  
ꢀꢀꢁDDGꢂꢃꢉ  
tTLH = 10 % and tTHL = 90 %,  
Measurement points are given in Table 8.  
Fig 8. Propagation delays clock (nCP) to output (nQx), output transition times and maximum clock frequency  
Table 8. Measurement points  
Supply voltage VCC  
Input  
VM  
Output  
VM  
VX  
VY  
< 2.7 V  
0.5VCC  
1.5VCC  
0.5VCC  
1.5VCC  
VOL + 0.1VCC  
VOL + 0.3VCC  
VOH 0.1VCC  
VOH 0.3VCC  
2.7 V to 3.6 V  
9
,
LQSXWꢁQ05  
*1'  
9
0
W
:
W
UHF  
9
,
LQSXWꢁQ&3  
*1'  
9
0
W
3+/  
9
2+  
RXWSXWꢁQ4[  
9
0
9
2/  
ꢀꢀꢁDDGꢂꢃꢊ  
Measurement points are given in Table 8.  
Fig 9. Propagation delays clock (nCP) to output (nQx), pulse width master reset (nMR), and recovery time  
master reset (nMR) to clock (nCP)  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
9 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
W
:
9
,
ꢉꢇꢁꢎ  
QHJDWLYHꢁ  
SXOVH  
9
9
9
9
0
0
ꢀꢇꢁꢎ  
ꢇꢁ9  
W
W
U
I
W
W
I
U
9
,
ꢉꢇꢁꢎ  
SRVLWLYHꢁ  
SXOVH  
0
0
ꢀꢇꢁꢎ  
ꢇꢁ9  
W
:
9
(;7  
5
9
&&  
/
9
9
2
,
*
'87  
5
7
&
/
5
/
ꢀꢀꢁDDHꢃꢃꢁ  
Test data is given in Table 9.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
S1 = Test selection switch.  
Fig 10. Test circuit for measuring switching times  
Table 9.  
Test data  
Supply voltage  
VCC  
Input  
VI  
Load  
VEXT  
tr, tf  
CL  
RL  
tPHL, tPLH  
open  
< 2.7 V  
VCC  
2.7 V  
2.5 ns  
2.5 ns  
50 pF  
1 k  
1 k  
2.7 V to 3.6 V  
15 pF, 50 pF  
open  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
10 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
11. Package outline  
62ꢅꢁꢌꢇSODVWLFꢇVPDOOꢇRXWOLQHꢇSDFNDJHꢍꢇꢅꢁꢇOHDGVꢍꢇERG\ꢇZLGWKꢇꢂꢈꢃꢇPPꢇ  
627ꢅꢆꢎꢄꢅꢇ  
'ꢁ  
(ꢁ  
$ꢁ  
;ꢁ  
Fꢁ  
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Fig 11. Package outline SOT108-1 (SO14)  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
11 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
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Fig 12. Package outline SOT402-1 (TSSOP14)  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
12 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
12. Abbreviations  
Table 10. Abbreviations  
Acronym  
CDM  
DUT  
Description  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Military  
ESD  
HBM  
MIL  
MM  
Machine Model  
13. Revision history  
Table 11. Revision history  
Document ID  
Release date  
20140917  
Data sheet status  
Change notice  
Supersedes  
74LV393_Q100 v.2  
Modifications:  
Product data sheet  
-
74LV393_Q100 v.1  
Figure 10 and Table 9 updated because of a missing load resistance in the test circuit.  
20140526 Product data sheet  
74LV393_Q100 v.1  
-
-
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
13 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
14. Legal information  
14.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nexperia.com.  
Suitability for use in automotive applications — This Nexperia  
product has been qualified for use in automotive  
14.2 Definitions  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of a Nexperia product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. Nexperia and its suppliers accept no liability for  
inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the Nexperia product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the Nexperia  
product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Nexperia does not accept any liability related to any default,  
14.3 Disclaimers  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using Nexperia  
products in order to avoid a default of the applications and  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no  
responsibility for the content in this document if provided by an information  
source outside of Nexperia.  
the products or of the application or use by customer’s third party  
customer(s). Nexperia does not accept any liability in this respect.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of Nexperia.  
Terms and conditions of commercial sale — Nexperia  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. Nexperia hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of Nexperia products by customer.  
Right to make changes — Nexperia reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
14 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
14.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
15. Contact information  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
74LV393_Q100  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 2 — 17 September 2014  
15 of 16  
74LV393-Q100  
Nexperia  
Dual 4-bit binary ripple counter  
16. Contents  
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
6
Functional description . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Recommended operating conditions. . . . . . . . 5  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13  
7
8
9
10  
10.1  
11  
12  
13  
14  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
14.1  
14.2  
14.3  
14.4  
15  
16  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 17 September 2014  

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