74LV4053PW [NEXPERIA]
Triple single-pole double-throw analog switchProduction;型号: | 74LV4053PW |
厂家: | Nexperia |
描述: | Triple single-pole double-throw analog switchProduction 光电二极管 |
文件: | 总20页 (文件大小:331K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74LV4053
Triple single-pole double-throw analog switch
Rev. 8 — 15 September 2021
Product data sheet
1. General description
The 74LV4053 is a triple single-pole double-throw (SPDT) analog switch, suitable for use in
2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two
independent inputs/outputs (Y0 and Y1) and a common input/output (Z). A digital enable input (E)
is common to all switches. When E is HIGH, the switches are turned off.
Digital inputs include clamp diodes. This enables the use of current limiting resistors to interface
inputs to voltages in excess VCC
.
2. Features and benefits
•
Wide supply voltage range from 1.0 V to 6.0 V
•
Optimized for low-voltage applications: 1.0 V to 3.6 V
CMOS low power disssipation
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Low ON resistance:
•
•
•
•
•
•
180 Ω (typical) at VCC - VEE = 2.0 V
100 Ω (typical) at VCC - VEE = 3.0 V
75 Ω (typical) at VCC - VEE = 4.5 V
•
Logic level translation:
To enable 3 V logic to communicate with ±3 V analog signals
•
•
•
•
Typical ‘break before make’ built in
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
•
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.6 V to 5.5 V)
•
ESD protection:
•
•
HBM JESD22-A114-C exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
•
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Nexperia
74LV4053
Triple single-pole double-throw analog switch
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LV4053D
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
SOT403-1
SOT763-1
74LV4053PW
74LV4053BQ
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
4. Functional diagram
E
6
V
CC
16
13 1Y1
12 1Y0
14 1Z
LOGIC
LEVEL
CONVERSION
S1 11
DECODER
1
2
2Y1
2Y0
LOGIC
LEVEL
S2 10
CONVERSION
15 2Z
3
5
4
3Y1
LOGIC
LEVEL
CONVERSION
S3 9
3Y0
3Z
8
7
GND
V
001aak341
EE
Fig. 1. Functional diagram
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
2 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
6
EN
11
10
9
S1
S2
S3
1Y0
1Y1
1Z
12
13
14
2
MUX/DMUX
11
14
#
#
#
0
1
12
13
×
0
1
0/1
2Y0
2Y1
2Z
1
10
15
2
1
15
5
3Y0
3Y1
3Z
9
4
5
3
3
6
E
4
001aae125
001aae126
Fig. 2. Logic symbol
Fig. 3. IEC logic symbol
Y
V
V
EE
CC
V
CC
V
CC
V
V
EE
CC
V
EE
Z
from
logic
001aad544
Fig. 4. Schematic diagram (one switch)
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
3 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
5. Pinning information
5.1. Pinning
74LV4053
terminal 1
index area
2
3
4
5
6
7
15
14
13
12
11
10
2Y0
3Y1
3Z
2Z
1Z
1Y1
1Y0
S1
74LV4053
3Y0
E
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y1
2Y0
3Y1
3Z
V
CC
(1)
CC
V
2Z
V
S2
EE
1Z
1Y1
1Y0
S1
001aak343
3Y0
E
Transparent top view
V
S2
EE
(1) This is not a supply pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
GND
S3
001aak342
connected to VCC
.
Fig. 5. Pin configuration SOT109-1 (SO16) and
SOT403-1 (TSSOP16)
Fig. 6. Pin configuration SOT763-1 (DHVQFN16)
5.2. Pin description
Table 2. Pin description
Symbol
E
Pin
Description
6
enable input (active LOW)
supply voltage
VEE
7
GND
8
ground supply voltage
select input
S1, S2, S3
1Y0, 2Y0, 3Y0
1Y1, 2Y1, 3Y1
1Z, 2Z, 3Z
VCC
11, 10, 9
12, 2, 5
13, 1, 3
14, 15, 4
16
independent input or output
independent input or output
common output or input
supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Inputs
Channel on
E
L
Sn
L
nY0 to nZ
nY1 to nZ
switches off
L
H
H
X
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
4 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7.0
±20
±20
±25
Unit
V
supply voltage
[1]
[2]
[2]
[2]
-0.5
input clamping current
VI < -0.5 V or VI > VCC + 0.5 V
-
-
-
mA
mA
mA
ISK
switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V
ISW
switch current
VSW > -0.5 V or VSW < VCC + 0.5
V;source or sink current
Tstg
Ptot
storage temperature
total power dissipation
-65
-
+150
500
°C
Tamb = -40 °C to +125 °C
[3]
mW
[1] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current will flow out of terminals nYn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE
[2] The minimum input voltage rating may be exceeded if the input current rating is observed.
[3] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VCC
Parameter
Conditions
Min
Typ
Max
6
Unit
V
supply voltage
input voltage
see Fig. 7
1
0
3.3
VI
-
-
-
-
-
-
VCC
VCC
V
VSW
switch voltage
ambient temperature
0
V
Tamb
Δt/ΔV
in free air
-40
-
+125 °C
input transition rise and fall rate VCC = 1.0 V to 2.0 V
VCC = 2.0 V to 2.7 V
500
200
100
ns/V
-
ns/V
ns/V
VCC = 2.7 V to 3.6 V
-
001aak344
8.0
V
- GND
CC
(V)
6.0
4.0
2.0
0
operating area
0
2.0
4.0
6.0
CC
8.0
- V (V)
V
EE
Fig. 7. Guaranteed operating area as a function of the supply voltages
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
5 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
VIH
HIGH-level input voltage
VCC = 1.2 V
0.9
-
-
-
-
-
-
-
-
-
-
-
-
0.9
-
-
V
V
V
V
V
V
V
V
V
V
VCC = 2.0 V
1.4
1.4
VCC = 2.7 V to 3.6 V
VCC = 4.5 V
2.0
-
2.0
-
3.15
-
3.15
-
VCC = 6.0 V
4.20
-
4.20
-
VIL
LOW-level input voltage
input leakage current
VCC = 1.2 V
-
-
-
-
-
0.3
0.6
0.8
1.35
1.80
-
-
-
-
-
0.3
0.6
0.8
1.35
1.80
VCC = 2.0 V
VCC = 2.7 V to 3.6 V
VCC = 4.5 V
VCC = 6.0 V
II
VI = VCC or GND
VCC = 3.6 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
VCC = 6.0 V
IS(OFF)
IS(ON)
ICC
OFF-state leakage current VI = VIH or VIL; see Fig. 8
VCC = 3.6 V
VCC = 6.0 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
ON-state leakage current
supply current
VI = VIH or VIL; see Fig. 9
VCC = 3.6 V
-
-
-
-
1.0
2.0
-
-
1.0
2.0
μA
μA
VCC = 6.0 V
VI = VCC or GND; IO = 0 A
VCC = 3.6 V
-
-
-
-
-
-
20
40
-
-
-
40
80
μA
μA
μA
VCC = 6.0 V
ΔICC
additional supply current
per input; VI = VCC - 0.6 V;
VCC = 2.7 V to 3.6 V
500
850
CI
input capacitance
switch capacitance
-
-
-
3.5
5
-
-
-
-
-
-
-
-
-
pF
pF
pF
Csw
independent pins nYn
common pins nZ
8
[1] Typical values are measured at Tamb = 25 °C.
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
6 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
9.1. Test circuits
V
V
CC
CC
S1 to S3
nY0
nY1
1
2
S1 to S3
nY0
nY1
1
2
V
or V
V
or V
IH IL
IH
IL
switch
switch
I
S
nZ
E
nZ
E
I
I
S
S
GND = V
GND = V
EE
EE
V
GND
CC
V
V
I
V
V
O
O
I
001aak345
001aak346
VI = VCC or VEE and VO = VEE or VCC
.
VI = VCC or VEE and VO = open circuit.
Fig. 8. Test circuit for measuring OFF-state leakage
current
Fig. 9. Test circuit for measuring ON-state leakage
current
9.2. ON resistance
Table 7. ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Fig. 10 and Fig. 11.
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(peak) ON resistance (peak)
VI = 0 V to VCC - VEE
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
[2]
[2]
[2]
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
180
115
100
365
225
200
435
270
245
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
VI = 0 V to VCC - VEE
-
-
75
70
150
140
-
-
180
165
Ω
Ω
ΔRON
ON resistance
mismatch between
channels
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Ω
Ω
Ω
Ω
5
4
4
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
VI = GND
-
-
3
2
-
-
-
-
-
-
Ω
Ω
RON(rail) ON resistance (rail)
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
-
-
-
-
250
120
75
-
-
-
-
-
-
Ω
Ω
Ω
Ω
280
170
155
325
195
180
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
70
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
-
-
50
45
120
105
-
-
135
120
Ω
Ω
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
7 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
RON(rail) ON resistance (rail)
VI = VCC - VEE
VCC = 1.2 V; ISW = 100 μA
VCC = 2.0 V; ISW = 1000 μA
VCC = 2.7 V; ISW = 1000 μA
[2]
-
-
-
-
350
170
105
95
-
-
-
-
-
-
Ω
Ω
Ω
Ω
340
210
190
400
250
225
VCC = 3.0 V to 3.6 V;
ISW = 1000 μA
VCC = 4.5 V; ISW = 1000 μA
VCC = 6.0 V; ISW = 1000 μA
-
-
70
65
140
125
-
-
165
150
Ω
Ω
[1] Typical values are measured at Tamb = 25 °C.
[2] When supply voltages (VCC - VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of
1.2 V, it is recommended to use these devices only for transmitting digital signals.
9.3. On resistance waveform and test circuit
V
V
V
SW
CC
S1 to S3
nY0
nY1
1
2
V
or V
IL
IH
switch
nZ
E
GND = V
EE
GND
I
V
SW
I
001aak347
RON = VSW / ISW
.
Fig. 10. Test circuit for measuring RON
001aak348
200
V
= 2.0 V
CC
R
ON
(Ω)
150
V
= 3.0 V
CC
100
50
0
V
= 4.5 V
CC
0
1.2
2.4
3.6
4.8
V (V)
I
VI = 0 V to VCC - VEE
Fig. 11. Typical RON as a function of input voltage
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
8 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 14.
Symbol Parameter Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
tpd
propagation nYn, nZ to nZ, nYn; see Fig. 12
[2]
delay
VCC = 1.2 V
-
-
-
-
-
-
25
9
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
VCC = 2.7 V
17
13
10
9
20
15
12
10
8
6
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[2]
5
4
VCC = 6.0 V
3
7
ten
enable time E to nYn, nZ; see Fig. 13
VCC = 1.2 V
-
-
-
-
-
-
-
100
34
25
16
19
17
13
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
65
48
-
77
56
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[3]
38
32
25
45
38
29
VCC = 6.0 V
Sn to nYn, nZ; see Fig. 13
VCC = 1.2 V
[2]
-
-
-
-
-
-
-
125
43
31
20
24
21
16
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
82
60
-
97
71
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[3]
48
41
31
57
48
37
VCC = 6.0 V
tdis
disable time E to nYn, nZ; see Fig. 13
VCC = 1.2 V
[2]
-
-
-
-
-
-
-
95
34
26
17
20
18
15
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
61
46
-
73
54
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[3]
37
32
25
44
38
30
VCC = 6.0 V
Sn to nYn, nZ; see Fig. 13
VCC = 1.2 V
[2]
-
-
-
-
-
-
-
90
32
24
16
19
17
14
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
59
44
-
70
52
-
VCC = 2.7 V
VCC = 3.0 V to 3.6 V; CL = 15 pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V
[3]
[3]
36
31
24
42
36
28
VCC = 6.0 V
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
9 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
CPD
power
CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4]
-
36
-
-
-
pF
dissipation
capacitance
[1] All typical values are measured at Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
.
.
.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V).
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD x VCC 2 x fi x N + Σ((CL + CSW) x VCC 2 x fo) where:
fi = input frequency in MHz, fo = output frequency in MHz
CL = output load capacitance in pF
CSW = maximum switch capacitance in pF;
VCC = supply voltage in Volts
N = number of inputs switching
Σ(CL x VCC 2 x fo) = sum of the outputs.
10.1. Waveforms and test circuit
V
CC
nYn or nZ
input
V
M
V
V
EE
t
t
PLH
PHL
V
O
nZ or nYn
output
V
M
EE
001aak351
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 12. Propagation delay input (nYn, nZ) to output (nZ, nYn)
V
CC
Sn, E input
V
M
V
V
V
SS
t
t
PLZ
PZL
V
O
90 %
nYn or nZ output
LOW-to-OFF
OFF-to-LOW
10 %
EE
t
t
PHZ
PZH
V
O
90 %
nYn or nZ output
HIGH-to-OFF
OFF-to-HIGH
10 %
EE
switch ON
switch OFF
switch ON
001aak352
Measurement points are given in Table 9.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig. 13. Enable and disable times
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
10 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
Table 9. Measurement points
Supply voltage
VCC
Input
VM
Output
VM
VX
VY
< 2.7 V
0.5VCC
1.5 V
0.5VCC
0.5VCC
1.5 V
VOL + 0.1VCC
VOL + 0.3 V
VOL + 0.1VCC
VOH - 0.1VCC
VOH - 0.3 V
VOH - 0.1VCC
2.7 V to 3.6 V
> 3.6 V
0.5VCC
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
R
V
CC
L
V
V
O
I
G
DUT
R
T
C
L
R
L
V
EE
001aak353
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 14. Test circuit for measuring switching times
Table 10. Test data
Supply voltage Input
Load
CL
VEXT
VCC
VI
tr, tf
RL
tPHL, tPLH
open
tPZH, tPHZ
VEE
tPZL, tPLZ
2VCC
< 2.7 V
VCC
2.7 V
VCC
≤ 6 ns
≤ 6 ns
≤ 6 ns
50 pF
1 kΩ
2.7 V to 3.6 V
> 3.6 V
15 pF, 50 pF 1 kΩ
50 pF 1 kΩ
open
VEE
2VCC
open
VEE
2VCC
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
11 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
10.2. Additional dynamic parameters
Table 11. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf ≤ 6.0 ns; Tamb = 25 °C.
Symbol Parameter
Conditions
Min
Typ
Max Unit
THD
total harmonic
distortion
fi = 1 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 15
VCC = 3.0 V; VI = 2.75 V (p-p)
VCC = 6.0 V; VI = 5.5 V (p-p)
fi = 10 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 15
VCC = 3.0 V; VI = 2.75 V (p-p)
VCC = 6.0 V; VI = 5.5 V (p-p)
CL = 50 pF; RL = 50 Ω; see Fig. 16
VCC = 3.0 V
-
-
0.8
0.4
-
-
%
%
-
-
2.4
1.2
-
-
%
%
f(-3dB)
-3 dB frequency
response
[1]
[2]
[2]
-
-
180
200
-
-
MHz
MHz
VCC = 6.0 V
αiso
isolation (OFF-state)
crosstalk voltage
fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 18
VCC = 3.0 V
-
-
-50
-50
-
-
dB
dB
VCC = 6.0 V
Vct
between digital inputs and switch; fi = 1 MHz;
CL = 50 pF; RL = 600 Ω; see Fig. 20
VCC = 3.0 V
VCC = 6.0 V
-
-
0.11
0.12
-
-
V
V
Xtalk
crosstalk
between switches; fi = 1 MHz; CL = 50 pF;
RL = 600 Ω; see Fig. 21
VCC = 3.0 V
VCC = 6.0 V
-
-
-60
-60
-
-
dB
dB
[1] Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 Ω).
[2] Adjust fi voltage to obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 600 Ω).
10.2.1. Test circuits
V
V
CC
CC
2R
L
S1 to S3
nY0
nY1
1
2
V
or V
IH
IL
switch
nZ
E
10 µF
GND = V
EE
2R
L
C
L
GND
D
f
i
001aak354
Fig. 15. Test circuit for measuring total harmonic distortion
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
12 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
001aak361
5
(dB)
0
V
V
CC
CC
2R
L
S1 to S3
nY0
nY1
1
2
V
or V
IL
IH
switch
nZ
E
0.1 µF
GND = V
EE
2R
L
C
L
GND
dB
- 5
2
3
4
5
6
10
10
10
10
10
10
f
i
f (kHz)
VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω;
RSOURCE = 1 kΩ.
001aak355
Fig. 16. Test circuit for measuring frequency response Fig. 17. Typical frequency response
001aak360
0
(dB)
- 50
V
V
CC
CC
2R
L
S1 to S3
nY0
nY1
1
2
V
IH
or V
IL
switch
nZ
E
0.1 µF
- 100
GND = V
EE
2
3
4
5
6
10
10
10
10
10
10
V
2R
L
C
L
dB
CC
f (kHz)
f
i
VCC = 3.0 V; GND = 0 V; VEE = -3.0 V; RL = 50 Ω;
RSOURCE = 1 kΩ.
001aak356
Fig. 19. Typical isolation (OFF-state) as function of
frequency
Fig. 18. Test circuit for measuring isolation (OFF-state)
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
13 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
V
V
V
CC
CC
CC
2R
L
2R
L
S1 to S3
nY0
nY1
1
2
switch
nZ
E
G
GND = V
EE
2R
L
2R
L
C
L
V
O
V
V
or V
IH
IL
001aak357
a.Test circuit
logic
input (Sn, E)
off
on
off
V
V
ct
O
001aaj908
b. Input and output pulse definitions
VI may be connected to Sn or E.
Fig. 20. Test circuit for measuring crosstalk voltage between digital inputs and switch
V
V
V
CC
CC
CC
2R
2R
L
L
L
S1 to S3
nY0
nY1
V
or V
IL
IH
R
L
nZ
E
0.1 µF
GND = V
EE
2R
L
V
O
C
L
2R
GND
dB
V
I
001aak358
a. Switch closed condition
V
V
V
V
CC
CC
CC
CC
2R
L
2R
2R
L
L
L
S1 to S3
nY0
nY1
V
or V
IL
IH
nZ
E
GND = V
EE
GND
R
L
V
I
2R
2R
L
C
L
V
O
dB
001aak359
b. Switch open condition
Fig. 21. Test circuit for measuring crosstalk between switches
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
14 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
11. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 22. Package outline SOT109-1 (SO16)
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
15 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 23. Package outline SOT403-1 (TSSOP16)
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
16 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
1
b
c
E
h
e
e
y
D
D
E
L
v
w
y
1
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig. 24. Package outline SOT763-1 (DHVQFN16)
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
17 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
12. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
ESD
Description
Complementary Metal-Oxide Semiconductor
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 13. Revision history
Document ID
74LV4053 v.8
Modifications:
Release date
20210915
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LV4053 v.7
•
•
Type number 74LV4053DB (SOT338-1/SSOP16) removed.
Section 1 and Section 2 updated.
74LV4053 v.7
Modifications:
20200923
Product data sheet
-
74LV4053 v.6
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Table 4: Derating values for Ptot total power dissipation updated.
74LV4053 v.6
Modifications:
20160317
Type number 74LV4053N (SOT38-4) removed.
20140918 Product data sheet
Fig. 6: Figure note added for DHVQFN16 package.
20090810 Product data sheet
Product data sheet
-
74LV4053 v.5
74LV4053 v.4
74LV4053 v.3
•
74LV4053 v.5
Modifications:
-
•
74LV4053 v.4
Modifications:
-
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Added type number 74LV4053BQ (DHVQFN16 package)
RON values changed in Section 2.
Package version SOT38-1 changed to SOT38-4 in Section 5, and Section 11.
74LV4053 v.3
74LV4053 v.2
19980623
19970715
Product specification
Product specification
-
-
74LV4053 v.2
-
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
18 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
14. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
19 / 20
Nexperia
74LV4053
Triple single-pole double-throw analog switch
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................4
5.1. Pinning.........................................................................4
5.2. Pin description.............................................................4
6. Functional description................................................. 4
7. Limiting values............................................................. 5
8. Recommended operating conditions..........................5
9. Static characteristics....................................................6
9.1. Test circuits..................................................................7
9.2. ON resistance..............................................................7
9.3. On resistance waveform and test circuit......................8
10. Dynamic characteristics............................................ 9
10.1. Waveforms and test circuit...................................... 10
10.2. Additional dynamic parameters............................... 12
10.2.1. Test circuits...........................................................12
11. Package outline........................................................ 15
12. Abbreviations............................................................18
13. Revision history........................................................18
14. Legal information......................................................19
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 September 2021
©
74LV4053
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 8 — 15 September 2021
20 / 20
相关型号:
74LV4053PWDH-T
IC TRIPLE 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16, PLASTIC, TSSOP-16, Multiplexer or Switch
NXP
74LV4060D-Q100
LV/LV-A/LVX/H SERIES, ASYN NEGATIVE EDGE TRIGGERED 14-BIT UP BINARY COUNTER, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16
NXP
©2020 ICPDF网 联系我们和版权申明