74LVC1G99DP [NEXPERIA]
Ultra-configurable multiple function gate; 3-stateProduction;
| 型号： | 74LVC1G99DP |
| 厂家： | 
Nexperia |
| 描述： | Ultra-configurable multiple function gate; 3-stateProduction 光电二极管 逻辑集成电路 |
| 文件： | 总25页 (文件大小：329K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Rev. 11 — 25 July 2019
Product data sheet
1. General description
The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state
output. The device can be configured as one of several logic functions including, AND, OR,
NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to
configure the device as all inputs can be connected directly to VCC or GND. The 3-state output is
controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a
high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied
to the Schmitt trigger inputs (A, B, C and D).
Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input signals,
transforming them into sharply defined, jitter free output signals. By eliminating leakage current
paths to VCC and GND, the inputs and disabled output are also over-voltage tolerant, making the
device suitable for mixed-voltage applications.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry
disables the output, preventing the damaging backflow current through the device when it is
powered down.
The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.
2. Features and benefits
•
Wide supply voltage range from 1.65 V to 5.5 V
•
•
•
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
•
•
•
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
•
ESD protection:
•
•
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
•
•
•
•
•
•
•
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVC1G99DP
74LVC1G99GT
74LVC1G99GF
74LVC1G99GN
74LVC1G99GS
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
XSON8
XSON8
XSON8
XSON8
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 × 1.95 × 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1 × 0.5 mm
SOT1089
SOT1116
SOT1203
extremely thin small outline package; no leads;
8 terminals; body 1.2 × 1.0 × 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 × 1.0 × 0.35 mm
4. Marking
Table 2. Marking codes
Type number
Marking code [1]
74LVC1G99DP
74LVC1G99GT
74LVC1G99GF
74LVC1G99GN
74LVC1G99GS
V99
V99
YF
YF
YF
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
OE
A
B
Y
C
D
001aah322
Fig. 1. Logic symbol
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
2 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
6. Pinning information
6.1. Pinning
74LVC1G99
OE
A
1
2
3
4
8
7
6
5
V
Y
CC
74LVC1G99
B
D
C
1
2
3
4
8
7
6
5
OE
A
V
Y
CC
GND
B
D
C
001aah324
Transparent top view
GND
001aah323
Fig. 3. Pin configuration SOT833-1, SOT1089, SOT1116
and SOT1203 (XSON8)
Fig. 2. Pin configuration SOT505-2 (TSSOP8)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
1
Description
OE
A
output enable input OE (active LOW)
data input
2
B
3
data input
GND
C
4
ground (0 V)
5
data input
D
6
data input
Y
7
data output
VCC
8
supply voltage
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
3 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Input
Output
OE
L
D
L
C
L
B
L
A
L
Y
L
L
L
L
L
H
L
H
L
L
L
L
H
H
L
L
L
L
H
L
H
L
L
L
H
H
H
H
L
L
L
L
H
L
L
L
L
H
H
L
H
H
H
L
L
L
H
L
L
H
H
H
H
H
H
H
H
X
L
L
L
H
L
L
L
H
H
L
H
L
L
L
H
L
L
H
H
H
H
X
H
H
L
L
L
H
L
L
H
H
X
L
H
X
L
H
Z
7.1. Logic configurations
Table 5. Function selection table
Primary function
Complementary function
3-state buffer
3-state inverter
3-state 2-input multiplexer
3-state 2-input multiplexer with inverting output
3-state 2-input AND
3-state 2-input NOR with two inverting inputs
3-state 2-input NOR with one inverting input
3-state 2-input NOR
3-state 2-input AND with one inverting input
3-state 2-input AND with two inverting inputs
3-state 2-input NAND
3-state 2-input OR with two inverting inputs
3-state 2-input OR with one inverting input
3-state 2-input OR
3-state 2-input NAND with one inverting input
3-state 2-input NAND with two inverting inputs
3-state 2-input XOR
3-state 2-input XNOR
3-state 2-input XOR with one inverting input
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
4 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
7.2. 3-state buffer functions available
Table 6. Function table
H = HIGH voltage level; L = LOW voltage level; See Fig. 4.
Function
Input
OE
L
A
B
C
D
3-state buffer
input
H or L
L
L
L
H or L
input
H
L
L
L
H
input
input
L
L
L
H
L
H
L
H
H or L
input
input
input
L
H or L
L
L
L
H
L
H or L
OE
input
Y
001aah326
Fig. 4. 3-state buffer function
7.3. 3-state inverter functions available
Table 7. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care. See Fig. 5.
Function
Input
OE
L
A
B
C
D
3-state inverter
input
H or L
input
H
L
H
L
X
H
H
L
L
input
input
L
H
L
H
L
L
L
H
H or L
H
input
input
input
L
H or L
H
H
L
H
H or L
OE
input
Y
001aah327
Fig. 5. 3-state inverter function
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
5 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
7.4. 3-state multiplexer functions available
Table 8. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 6.
Function
Input
OE
L
A
B
C
D
L
3-state 2-input
multiplexer
input 1
input 2
input 1
input 2
input 2
input 1
input 2
input 1
input 1 or input 2
input 2 or input 1
input 1 or input 2
input 2 or input 1
L
L
L
H
H
L
OE
OE
input 1
input 1
Y
Y
input 2
A/B
input 2
A/B
001aah328
Fig. 6. 3-state 2-input multiplexer function
7.5. 3-state AND/NOR functions available
Table 9. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 7.
Number of inputs
Function
Input
OE
L
AND/NAND
3-state AND
3-state AND
OR/NOR
A
L
L
B
C
D
L
L
2
2
3-state NOR
3-state NOR
input 1
input 2
input 2
input 1
L
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah329
Fig. 7. 3-state AND/NOR function
Table 10. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 8.
Number of inputs
Function
Input
AND/NAND
3-state AND
3-state AND
OR/NOR
OE
L
A
B
C
D
L
2
2
3-state NOR
3-state NOR
input 2
H
L
input 1
input 2
L
input 1
H
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah330
Fig. 8. 3-state AND/NOR function
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
6 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Table 11. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 9.
Number of inputs
Function
Input
AND/NAND
3-state AND
3-state AND
OR/NOR
OE
L
A
B
C
D
L
2
2
3-state NOR
3-state NOR
input 1
H
L
input 2
input 1
L
input 2
H
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah331
Fig. 9. 3-state AND/NOR function
Table 12. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 10.
Number of inputs
Function
Input
AND/NAND
3-state AND
3-state AND
OR/NOR
OE
L
A
B
H
H
C
D
H
H
2
2
3-state NOR
3-state NOR
input 1
input 2
input 2
input 1
L
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah332
Fig. 10. 3-state AND/NOR function
7.6. 3-state NAND/OR functions available
Table 13. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 11.
Number of inputs
Function
Input
OE
L
AND/NAND
3-state NAND
3-state NAND
OR/NOR
A
L
L
B
C
D
H
H
2
2
3-state OR
3-state OR
input 1
input 2
input 2
input 1
L
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah333
Fig. 11. 3-state NAND/OR function
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
7 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Table 14. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 12.
Number of inputs
Function
Input
AND/NAND
3-state NAND
3-state NAND
OR/NOR
OE
L
A
B
C
D
H
L
2
2
3-state OR
3-state OR
input 2
H
L
input 1
input 2
L
input 1
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah334
Fig. 12. 3-state NAND/OR function
Table 15. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 13.
Number of inputs
Function
Input
AND/NAND
3-state NAND
3-state NAND
OR/NOR
OE
L
A
B
C
D
H
L
2
2
3-state OR
3-state OR
input 1
H
L
input 2
input 1
L
input 2
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah335
Fig. 13. 3-state AND/NOR function
Table 16. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 14.
Number of inputs
Function
Input
AND/NAND
3-state NAND
3-state NAND
OR/NOR
OE
L
A
B
H
H
C
D
L
L
2
2
3-state OR
3-state OR
input 1
input 2
input 2
input 1
L
OE
input 1
input 2
OE
input 1
input 2
Y
Y
001aah336
Fig. 14. 3-state AND/NOR function
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
8 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
7.7. 3-state XOR/XNOR functions available
Table 17. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 15.
Function
Input
OE
L
A
B
C
D
3-state XOR
input 1
input 2
H or L
H or L
L
H or L
H or L
input 1
input 2
H
L
input 2
input 1
input 2
input 1
input 2
input 1
L
L
L
H
L
H
L
input 1
input 2
L
L
H
OE
input 1
input 2
Y
001aah337
Fig. 15. 3-state XOR function
Table 18. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 16.
Function
Input
OE
L
A
B
C
D
3-state XOR
H
L
input 1
input 2
OE
input 1
input 2
Y
001aah338
Fig. 16. 3-state XOR function
Table 19. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 17.
Function
Input
OE
L
A
B
C
D
3-state XOR
H
L
input 1
input 2
OE
input 1
input 2
Y
001aah339
Fig. 17. 3-state XOR function
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
9 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Table 20. Function table
H = HIGH voltage level; L = LOW voltage level. See Fig. 18.
Function
Input
OE
L
A
H
H
B
L
L
C
D
3-state XNOR
input 1
input 2
input 2
input 1
L
OE
input 1
input 2
Y
001aah340
Fig. 18. 3-state XNOR function
8. Limiting values
Table 21. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-50
-0.5
-
Max
+6.5
-
Unit
V
VCC
IIK
supply voltage
input clamping current
input voltage
VI < 0 V
mA
V
VI
[1]
+6.5
±50
IOK
VO
output clamping current
output voltage
VO > VCC or VO < 0 V
Active mode
mA
V
[1]
[1]
-0.5
-0.5
-
VCC + 0.5
+6.5
±50
Power-down mode; VCC = 0 V
VO = 0 V to VCC
V
IO
output current
mA
mA
mA
mW
°C
ICC
IGND
Ptot
Tstg
supply current
-
100
ground current
-100
-
-
total power dissipation
storage temperature
Tamb = -40 °C to +125 °C
[2]
250
-65
+150
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SOT505-2 (TSSOP8) packages: Ptot derates linearly with 4.6 mW/K above 96 °C.
For SOT833-1 (XSON8) packages: Ptot derates linearly with 3.1 mW/K above 68 °C.
For SOT1089 (XSON8) packages: Ptot derates linearly with 4.0 mW/K above 88 °C.
For SOT1116 (XSON8) packages: Ptot derates linearly with 4.2 mW/K above 90 °C.
For SOT1203 (XSON8) packages: Ptot derates linearly with 3.6 mW/K above 81 °C.
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
10 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
9. Recommended operating conditions
Table 22. Operating conditions
Symbol Parameter
Conditions
Min
Max
5.5
5.5
VCC
5.5
+125
20
Unit
V
VCC
VI
supply voltage
input voltage
output voltage
1.65
0
0
V
VO
Active mode
V
Power-down mode; VCC = 0 V
0
V
Tamb
ambient temperature
-40
-
°C
Δt/ΔV
input transition rise and fall rate
VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 4.5 V
VCC = 4.5 V to 5.5 V
ns/V
ns/V
ns/V
-
10
-
5
10. Static characteristics
Table 23. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ [1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
VOH
HIGH-level output VI = VT+ or VT-
voltage
IO = -100 μA;
VCC - 0.1
-
-
VCC - 0.1
-
V
VCC = 1.65 V to 5.5 V
IO = -4 mA; VCC = 1.65 V
IO = -8 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -24 mA; VCC = 3.0 V
IO = -32 mA; VCC = 4.5 V
1.2
1.9
2.2
2.3
3.8
-
-
-
-
-
-
-
-
-
-
0.95
1.7
1.9
2.0
3.4
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level output VI = VT+ or VT-
voltage
IO = 100 μA;
-
-
0.1
-
0.1
V
VCC = 1.65 V to 5.5 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
IO = 32 mA; VCC = 4.5 V
-
-
-
-
-
-
-
0.45
0.3
-
-
-
-
-
-
0.70
0.45
0.60
0.80
0.80
±1
V
-
V
-
0.4
V
-
-
0.55
0.55
±1
V
V
II
input leakage
current
VCC = 0 V to 5.5 V;
VI = 5.5 V or GND
±0.1
μA
IOZ
IOFF
OFF-state output VCC = 3.6 V; VI = VIH or VIL;
current VO = 5.5 V or GND
-
-
±0.1
±0.1
±2
±2
-
-
±2
±2
μA
μA
power-off leakage VCC = 0 V; VI or VO = 5.5 V
current
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
11 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ [1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
ICC
ΔICC
CI
supply current
VCC = 1.65 V to 5.5 V;
VI = 5.5 V or GND; IO = 0 A
-
0.1
4
-
4
μA
μA
pF
additional supply per pin; VCC = 2.3 V to 5.5 V;
current VI = VCC - 0.6 V; IO = 0 A
-
-
5
500
-
-
-
500
-
input capacitance VCC = 3.3 V; VI = GND to VCC
2.5
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
10.1. Transfer characteristics
Table 24. Transfer characteristics
Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 26
Symbol Parameter
Conditions
-40 °C to +85 °C
-40 °C to +125 °C Unit
Min
Typ [1]
Max
Min
Max
VT+
VT-
VH
positive-going
threshold voltage
see Fig. 19, Fig. 20, Fig. 21,
Fig. 22 and Fig. 23
VCC = 1.8 V
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 5.5 V
0.70
1.11
1.50
2.16
2.61
1.02
1.42
1.79
2.52
2.99
1.20
1.60
2.00
2.74
3.33
0.67
1.08
1.47
2.13
2.58
1.20
1.60
2.00
2.74
3.33
V
V
V
V
V
negative-going
threshold voltage
see Fig. 19, Fig. 20, Fig. 21,
Fig. 22 and Fig. 23
VCC = 1.8 V
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 5.5 V
0.30
0.58
0.80
1.21
1.45
0.53
0.77
1.04
1.55
1.86
0.72
1.00
1.30
1.90
2.29
0.30
0.58
0.80
1.21
1.45
0.75
1.03
1.33
1.93
2.32
V
V
V
V
V
hysteresis voltage
(VT+ - VT-); see Fig. 19, Fig. 20,
Fig. 21, Fig. 22 and Fig. 23
VCC = 1.8 V
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 5.5 V
0.30
0.40
0.50
0.71
0.71
0.48
0.64
0.75
0.97
1.13
0.62
0.80
1.00
1.20
1.40
0.23
0.34
0.44
0.65
0.65
0.62
0.80
1.00
1.20
1.40
V
V
V
V
V
[1] All typical values are measured at Tamb = 25 °C
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
10.2. Waveforms transfer characteristics
V
O
V
T+
V
I
V
H
V
T-
V
I
V
V
O
H
V
V
T+
T-
mna207
mna208
Fig. 19. Transfer characteristic
Fig. 20. Definition of VT+, VT- and VH
V
O
V
T+
V
I
V
H
V
T-
V
O
V
I
V
H
V
T-
V
T+
mnb154
mnb155
Fig. 21. Transfer characteristic
Fig. 22. Definition of VT+, VT- and VH
001aab594
16
I
CC
(mA)
12
8
4
0
0
1
2
3
V (V)
I
Fig. 23. Typical 74LVC1G99 transfer characteristic; VCC = 3.0 V
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
11. Dynamic characteristics
Table 25. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 26.
Symbol Parameter Conditions
-40 °C to +85 °C
Typ [1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
tpd
propagation delay A to Y; see Fig. 24
VCC = 1.65 V to 1.95 V
[2]
[2]
[2]
[2]
2.8
2.0
2.0
1.8
1.8
7.5
5.0
5.4
4.5
3.8
30.8
11.7
9.0
2.8
2.0
2.0
1.8
1.8
38.5
14.6
11.3
10.5
6.9
ns
ns
ns
ns
ns
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
B to Y; see Fig. 24
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
8.4
5.5
2.8
2.0
2.0
1.8
1.8
7.5
5.0
5.4
4.5
3.8
28.9
11.3
9.0
2.8
2.0
2.0
1.8
1.8
36.2
14.2
11.3
10.3
6.8
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
C to Y; see Fig. 24
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
8.2
5.4
3.2
2.3
2.3
2.3
1.8
7.8
5.2
5.3
4.6
3.8
29.8
12.3
9.6
3.2
2.3
2.3
2.3
1.8
37.3
15.4
12.0
10.8
7.2
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
D to Y; see Fig. 24
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
8.6
5.7
2.8
2.0
2.0
1.8
1.6
7.0
4.6
4.8
4.1
3.4
25.7
10.7
9.2
2.8
2.0
2.0
1.8
1.6
32.2
13.4
11.5
9.5
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
7.6
5.2
6.5
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74LVC1G99
Ultra-configurable multiple function gate; 3-state
Symbol Parameter
Conditions
-40 °C to +85 °C
Typ [1]
-40 °C to +125 °C Unit
Min
Max
Min
Max
ten
enable time
OE to Y; see Fig. 25
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
[3]
[4]
[5]
2.0
1.4
1.4
1.4
1.4
5.7
3.8
4.2
3.5
2.7
25.2
11.3
8.6
2.0
1.4
1.4
1.4
1.4
32.0
14.0
11.0
9.0
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
OE to Y; see Fig. 25
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
7.0
4.7
6.0
tdis
disable time
3.0
2.0
2.0
2.1
1.0
5.7
3.6
4.5
4.5
3.4
15.0
5.8
6.6
5.9
4.5
3.0
2.0
2.0
2.1
1.0
19.0
7.3
8.2
7.4
5.6
ns
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CPD
power dissipation per buffer (output enabled);
capacitance
fi = 10 MHz; CL = 50 pF;
VI = GND to VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
-
-
-
-
-
14
16
18
25
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
pF
pF
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
[1] All typical values are measured at nominal VCC and Tamb = 25 °C.
[2] tpd is the same as tPLH and tPHL
[3] ten is the same as tPZH and tPZL
[4] tdis is the same as tPHZ and tPLZ
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
11.1. Waveforms and test circuit
V
I
V
V
M
A, B, C, D input
GND
M
t
t
PLH
PHL
V
OH
V
V
V
V
Y output
M
M
V
OL
t
t
PHL
PLH
V
OH
Y output
M
M
V
OL
001aah341
Measurement points are given in Table 26.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 24. The data input (A, B, C, D) to output (Y) propagation delays
V
I
OE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
mna644
Measurement points are given in Table 26.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 25. 3-state enable and disable times
Table 26. Measurement points
Supply voltage
VCC
Input
VM
Output
VM
VX
VY
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5VCC
0.5VCC
1.5 V
1.5 V
0.5VCC
0.5VCC
0.5VCC
1.5 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
VOH - 0.15 V
VOH - 0.15 V
VOH - 0.3 V
VOH - 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5VCC
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
V
EXT
V
CC
R
L
V
V
O
I
G
DUT
R
T
C
L
R
L
mna616
Test data is given in Table 27.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig. 26. Test circuit for measuring switching times
Table 27. Test data
Supply voltage Input
VI
Load
CL
VEXT
tr = tf
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
2VCC
6 V
1.65 V to 1.95 V VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
2.3 V to 2.7 V
2.7 V
VCC
500 Ω
500 Ω
500 Ω
500 Ω
open
GND
2.7 V
2.7 V
VCC
open
GND
3.0 V to 3.6 V
4.5 V to 5.5 V
open
GND
6 V
open
GND
2VCC
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Product data sheet
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
12. Package outline
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
D
E
A
X
c
H
v
M
y
A
E
Z
5
8
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
H
E
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
max.
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
4.1
3.9
0.47
0.33
0.70
0.35
8°
0°
mm
1.1
0.65
0.5
0.2
0.13
0.1
0.25
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-01-16
SOT505-2
- - -
Fig. 27. Package outline SOT505-2 (TSSOP8)
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Product data sheet
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18 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
b
1
2
3
4
4×
(2)
L
L
1
e
8
7
6
5
e
e
e
1
1
1
8×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
1
L
L
1
max max
0.25
0.17
2.0
1.9
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
07-11-14
07-12-07
SOT833-1
- - -
- - -
MO-252
Fig. 28. Package outline SOT833-1 (XSON8)
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Product data sheet
Rev. 11 — 25 July 2019
19 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
SOT1089
E
terminal 1
index area
D
A
A
1
detail X
(2)
(4×)
e
L
(2)
(8×)
b
4
5
e
1
1
8
terminal 1
index area
L
X
1
0
0.5
1 mm
scale
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
L
1
1
max 0.5 0.04 0.20 1.40 1.05
0.35 0.40
0.15 1.35 1.00 0.55 0.35 0.30 0.35
0.12 1.30 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1089_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
MO-252
JEITA
10-04-09
10-04-12
SOT1089
Fig. 29. Package outline SOT1089 (XSON8)
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Product data sheet
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20 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
SOT1116
b
4
(2)
1
2
3
(4×)
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)
(8×)
A
1
A
D
E
terminal 1
index area
0
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
L
1
1
max 0.35 0.04 0.20 1.25 1.05
0.35 0.40
0.15 1.20 1.00 0.55 0.3 0.30 0.35
0.12 1.15 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1116_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
10-04-02
10-04-07
SOT1116
Fig. 30. Package outline SOT1116 (XSON8)
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21 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
SOT1203
b
4
(2)
(4×)
1
2
3
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)
(8×)
A
1
A
D
E
terminal 1
index area
0
L
0.5
scale
1 mm
Dimensions
Unit
(1)
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.40 1.05
0.35 0.40
0.15 1.35 1.00 0.55 0.35 0.30 0.35
0.12 1.30 0.95 0.27 0.32
mm nom
min
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
sot1203_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
10-04-02
10-04-06
SOT1203
Fig. 31. Package outline SOT1203 (XSON8)
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22 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
13. Abbreviations
Table 28. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MM
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 29. Revision history
Document ID
74LVC1G99 v.11
Modifications:
Release date
20190725
Data sheet status
Change notice Supersedes
- 74LVC1G99 v.10.1
Product data sheet
•
•
Type number 74LVC1G99GM (SOT902-2) removed.
Table 21: Derating values for Ptot total power dissipation updated.
74LVC1G99 v.10.1
Modifications:
20181022
Table 12: input D logic level changed to HIGH.
20180927 Product data sheet
Product data sheet
-
74LVC1G99 v.10
•
74LVC1G99 v.10
Modifications:
-
74LVC1G99 v.9
•
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number 74LVC1G99GD (SOT996-2) removed.
74LVC1G99 v.9
Modifications:
20161212
Table 23: The maximum limits for leakage current and supply current have changed.
20130405 Product data sheet 74LVC1G99 v.7
For type number 74LVC1G99GD XSON8U has changed to XSON8.
20120622 Product data sheet 74LVC1G99 v.6
For type number 74LVC1G99GM the SOT code has changed to SOT902-2.
Product data sheet
-
74LVC1G99 v.8
•
74LVC1G99 v.8
Modifications:
-
•
74LVC1G99 v.7
Modifications:
-
•
74LVC1G99 v.6
Modifications:
20111201
Product data sheet
-
74LVC1G99 v.5
•
Legal pages updated.
74LVC1G99 v.5
74LVC1G99 v.4
74LVC1G99 v.3
74LVC1G99 v.2
74LVC1G99 v.1
20101021
20100416
20091203
20080208
20080103
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
-
-
-
-
-
74LVC1G99 v.4
74LVC1G99 v.3
74LVC1G99 v.2
74LVC1G99 v.1
-
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Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
15. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
24 / 25
Nexperia
74LVC1G99
Ultra-configurable multiple function gate; 3-state
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Marking..........................................................................2
5. Functional diagram.......................................................2
6. Pinning information......................................................3
6.1. Pinning.........................................................................3
6.2. Pin description.............................................................3
7. Functional description................................................. 4
7.1. Logic configurations.....................................................4
7.2. 3-state buffer functions available.................................5
7.3. 3-state inverter functions available.............................. 5
7.4. 3-state multiplexer functions available.........................6
7.5. 3-state AND/NOR functions available..........................6
7.6. 3-state NAND/OR functions available..........................7
7.7. 3-state XOR/XNOR functions available....................... 9
8. Limiting values........................................................... 10
9. Recommended operating conditions........................11
10. Static characteristics................................................11
10.1. Transfer characteristics............................................12
10.2. Waveforms transfer characteristics..........................13
11. Dynamic characteristics...........................................14
11.1. Waveforms and test circuit.......................................16
12. Package outline........................................................ 18
13. Abbreviations............................................................23
14. Revision history........................................................23
15. Legal information......................................................24
© Nexperia B.V. 2019. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 25 July 2019
©
74LVC1G99
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2019. All rights reserved
Product data sheet
Rev. 11 — 25 July 2019
25 / 25
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