BUK964R2-55B [NEXPERIA]

N-channel TrenchMOS logic level FETProduction;
BUK964R2-55B
型号: BUK964R2-55B
厂家: Nexperia    Nexperia
描述:

N-channel TrenchMOS logic level FETProduction

开关 脉冲 晶体管
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BUK964R2-55B  
N-channel TrenchMOS logic level FET  
Rev. 03 — 4 June 2010  
Product data sheet  
1. Product profile  
1.1 General description  
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic  
package using TrenchMOS technology. This product has been designed and qualified to  
the appropriate AEC standard for use in automotive critical applications.  
1.2 Features and benefits  
Low conduction losses due to low  
Suitable for logic level gate drive  
on-state resistance  
sources  
Q101 compliant  
Suitable for thermally demanding  
environments due to 175 °C rating  
1.3 Applications  
12 V and 24 V loads  
Automotive systems  
General purpose power switching  
Motors, lamps and solenoids  
1.4 Quick reference data  
Table 1.  
Symbol  
VDS  
Quick reference data  
Parameter  
Conditions  
Min Typ Max Unit  
drain-source  
voltage  
Tj 25 °C; Tj 175 °C  
-
-
-
-
-
-
55  
V
[1]  
ID  
drain current  
VGS = 5 V; Tmb = 25 °C;  
75  
A
see Figure 3; see Figure 1  
Ptot  
total power  
dissipation  
Tmb = 25 °C; see Figure 2  
300  
W
Static characteristics  
RDSon drain-source  
VGS = 5 V; ID = 25 A;  
Tj = 25 °C;  
see Figure 11; see Figure 12  
-
-
3.5  
3.1  
4.2  
3.7  
mΩ  
mΩ  
on-state  
resistance  
VGS = 10 V; ID = 25 A;  
Tj = 25 °C  
Avalanche ruggedness  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
Table 1.  
Symbol  
EDS(AL)S  
Quick reference data …continued  
Parameter  
Conditions  
Min Typ Max Unit  
non-repetitive  
drain-source  
ID = 75 A; Vsup 55 V;  
RGS = 50 ; VGS = 5 V;  
-
-
-
1.2  
-
J
avalanche energy Tj(init) = 25 °C; unclamped  
Dynamic characteristics  
QGD gate-drain charge VGS = 5 V; ID = 25 A;  
DS = 44 V; Tj = 25 °C;  
see Figure 13  
37  
nC  
V
[1] Continuous current is limited by package.  
2. Pinning information  
Table 2.  
Pinning information  
Symbol Description  
Pin  
1
Simplified outline  
Graphic symbol  
G
D
S
D
gate  
drain[1]  
mb  
D
S
2
3
source  
G
mb  
mounting base; connected to  
drain  
mbb076  
2
1
3
SOT404 (D2PAK)  
[1] It is not possible to make a connection to pin 2.  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
BUK964R2-55B  
D2PAK  
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404  
(one lead cropped)  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
2 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Typ  
Max  
55  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
drain current  
Tj 25 °C; Tj 175 °C  
RGS = 20 kΩ  
-
-
-
-
-
VDGR  
VGS  
-
55  
V
-15  
-
15  
V
[1]  
ID  
Tmb = 25 °C; VGS = 5 V; see Figure 3;  
see Figure 1  
75  
A
[1]  
[2]  
Tmb = 100 °C; VGS = 5 V; see Figure 1  
-
-
-
-
75  
A
A
Tmb = 25 °C; VGS = 5 V; see Figure 1;  
see Figure 3  
191  
IDM  
peak drain current  
Tmb = 25 °C; tp 10 µs; pulsed;  
-
-
765  
A
see Figure 3  
Ptot  
Tstg  
Tj  
total power dissipation Tmb = 25 °C; see Figure 2  
storage temperature  
-
-
-
-
300  
175  
175  
W
-55  
-55  
°C  
°C  
junction temperature  
Source-drain diode  
[1]  
[3]  
IS  
source current  
Tmb = 25 °C  
-
-
-
-
-
-
75  
A
A
A
191  
765  
ISM  
peak source current  
tp 10 µs; pulsed; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S non-repetitive  
ID = 75 A; Vsup 55 V; RGS = 50 ;  
-
-
1.2  
J
drain-source  
VGS = 5 V; Tj(init) = 25 °C; unclamped  
avalanche energy  
[1] Continuous current is limited by package.  
[2] Current is limited by power dissipation chip rating.  
[3] Current is limited by power dissipation chip rating.  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
3 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
03na19  
03ng54  
120  
200  
ID  
P
(%)  
der  
(A)  
150  
100  
50  
80  
(1)  
40  
0
25  
0
0
50  
100  
150  
200  
50  
75  
100 125 150 175 200  
Tmb (°C)  
T
(°C)  
mb  
Fig 1. Continuous drain current as a function of  
mounting base temperature  
Fig 2. Normalized total power dissipation as a  
function of mounting base temperature  
03ng55  
103  
tp = 10 μs  
ID  
Limit RDSon = VDS / ID  
(A)  
102  
100 μs  
(1)  
1 ms  
DC  
10 ms  
10  
100 ms  
1
10-1  
1
10  
102  
VDS (V)  
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
4 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
5. Thermal characteristics  
Table 5.  
Symbol  
Rth(j-mb)  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance  
from junction to  
mounting base  
see Figure 4  
-
-
0.5  
K/W  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
minimum footprint ; mounted on a  
printed circuit-board  
-
50  
-
K/W  
03ng56  
1
Zth(j-mb)  
(K/W)  
δ
= 0.5  
0.2  
0.1  
10-1  
10-2  
10-3  
0.05  
tp  
P
δ =  
T
0.02  
single shot  
t
tp  
T
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
1
tp (s)  
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
5 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
6. Characteristics  
Table 6.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C  
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C  
50  
55  
1.1  
-
-
V
V
V
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C;  
1.5  
2
voltage  
see Figure 10  
ID = 1 mA; VDS = VGS; Tj = -55 °C;  
see Figure 10  
-
-
-
2.3  
-
V
V
ID = 1 mA; VDS = VGS; Tj = 175 °C;  
see Figure 10  
0.5  
IDSS  
drain leakage current  
gate leakage current  
VDS = 55 V; VGS = 0 V; Tj = 25 °C  
VDS = 55 V; VGS = 0 V; Tj = 175 °C  
VDS = 0 V; VGS = 15 V; Tj = 25 °C  
VDS = 0 V; VGS = -15 V; Tj = 25 °C  
-
-
-
-
-
0.02  
-
1
µA  
µA  
nA  
nA  
mΩ  
500  
100  
100  
4.2  
IGSS  
2
2
RDSon  
drain-source on-state  
resistance  
VGS = 5 V; ID = 25 A; Tj = 25 °C;  
see Figure 11; see Figure 12  
3.5  
VGS = 4.5 V; ID = 25 A; Tj = 25 °C  
-
-
-
-
4.4  
8.4  
mΩ  
mΩ  
VGS = 5 V; ID = 25 A; Tj = 175 °C;  
see Figure 11; see Figure 12  
VGS = 10 V; ID = 25 A; Tj = 25 °C  
-
3.1  
3.7  
mΩ  
Dynamic characteristics  
QG(tot)  
QGS  
QGD  
Ciss  
total gate charge  
ID = 25 A; VDS = 44 V; VGS = 5 V;  
Tj = 25 °C; see Figure 13  
-
-
-
-
-
-
95  
17  
37  
-
-
-
nC  
nC  
nC  
gate-source charge  
gate-drain charge  
input capacitance  
output capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz;  
Tj = 25 °C; see Figure 14  
7665 10220 pF  
1044 1253 pF  
Coss  
Crss  
reverse transfer  
capacitance  
466  
638  
pF  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 30 V; RL = 1.2 ; VGS = 5 V;  
RG(ext) = 10 ; Tj = 25 °C  
-
-
-
-
-
63  
-
-
-
-
-
ns  
ns  
ns  
ns  
nH  
232  
273  
178  
2.5  
turn-off delay time  
fall time  
LD  
internal drain  
inductance  
from upper edge of drain mounting base  
to centre of die SOT404 ; Tj = 25 °C  
from drain lead 6 mm from package to  
centre of die ; Tj = 25 °C  
-
-
4.5  
7.5  
-
-
nH  
nH  
LS  
internal source  
inductance  
from source lead to source bond pad ;  
Tj = 25 °C  
Source-drain diode  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
6 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
Table 6.  
Symbol  
VSD  
Characteristics …continued  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
source-drain voltage  
IS = 40 A; VGS = 0 V; Tj = 25 °C;  
see Figure 15  
-
0.85  
1.2  
V
trr  
reverse recovery time IS = 20 A; dIS/dt = -100 A/µs;  
-
-
78  
-
-
ns  
VGS = -10 V; VDS = 30 V; Tj = 25 °C  
Qr  
recovered charge  
171  
nC  
03nh05  
03nh06  
350  
5
4
3.8  
3.6  
I
10  
5
D
(A)  
300  
R
DSon  
(mΩ)  
3.4  
4.5  
250  
200  
150  
100  
50  
3.2  
4
3.5  
3
V
GS  
= 3 V  
2.8  
2.6  
2.4  
2.2  
0
0
2
4
6
8
10  
0
5
10  
15  
V
(V)  
V
GS  
(V)  
DS  
Fig 5. Output characteristics: drain current as a  
function of drain-source voltage; typical values  
Fig 6. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
03ng53  
03nh03  
1  
10  
200  
I
D
g
(S)  
fs  
(A)  
2  
3  
4  
5  
6  
10  
150  
min  
typ  
max  
10  
10  
10  
10  
100  
50  
0
0
20  
40  
60  
80  
0
1
2
3
V
(V)  
I (A)  
D
GS  
Fig 7. Sub-threshold drain current as a function of  
gate-source voltage  
Fig 8. Forward transconductance as a function of  
drain current; typical values  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
7 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
03ng52  
03nh04  
2.5  
100  
I
V
D
GS(th)  
(V)  
(A)  
2.0  
1.5  
1.0  
0.5  
0
80  
max  
60  
40  
20  
typ  
min  
T = 175 °C  
T = 25 °C  
j
j
0
0
0.5  
1.0  
1.5  
2.0  
2.5  
V
3.0  
(V)  
60  
0
60  
120  
180  
T (°C)  
j
GS  
Fig 9. Transfer characteristics: drain current as a  
function of gate-source voltage; typical values  
Fig 10. Gate-source threshold voltage as a function of  
junction temperature  
03nh07  
03ne89  
9
DSon  
2
R
(mΩ)  
a
8
7
6
5
4
3
1.5  
V
= 3 V  
3.2  
GS  
3.4  
1
0.5  
0
3.6  
3.8  
4
5
10  
0
100  
200  
300  
400  
-60  
0
60  
120  
180  
T ( C)  
°
j
I
D
(A)  
Fig 11. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
Fig 12. Drain-source on-state resistance as a function  
of drain current; typical values  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
8 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
03nh02  
03nh08  
5
12000  
V
GS  
(V)  
C
(pF)  
4
3
2
1
0
C
iss  
V
= 14 V  
DD  
8000  
4000  
0
V
= 44 V  
DD  
C
C
oss  
rss  
1  
2
0
20  
40  
60  
80  
100  
(nC)  
10  
1
10  
10  
Q
V
(V)  
DS  
G
Fig 13. Gate-source threshold voltage as a function of  
junction temperature  
Fig 14. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
03nh01  
100  
I
S
(A)  
80  
60  
40  
20  
0
T = 175 °C  
j
T = 25 °C  
j
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
(V)  
V
SD  
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
9 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
7. Package outline  
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)  
SOT404  
A
A
E
1
mounting  
base  
D
1
D
H
D
2
L
p
1
3
c
b
e
e
Q
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
D
E
A
A
b
UNIT  
c
D
e
L
H
Q
1
1
p
D
max.  
4.50  
4.10  
1.40  
1.27  
0.85  
0.60  
0.64  
0.46  
1.60  
1.20  
10.30  
9.70  
2.90 15.80 2.60  
2.10 14.80 2.20  
mm  
11  
2.54  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
05-02-11  
06-03-16  
SOT404  
Fig 16. Package outline SOT404 (D2PAK)  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
10 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
8. Revision history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
BUK964R2-55B v.3  
Modifications:  
20100604  
Product data sheet  
-
BUK95_964R2_55B-02  
The format of this data sheet has been redesigned to comply with the new identity guidelines  
of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Type number BUK964R2-55B separated from data sheet BUK95_964R2_55B-02.  
BUK95_964R2_55B-02 20021008  
(9397 750 10277)  
Product data  
-
-
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
11 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
9. Legal information  
9.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term 'short data sheet' is explained in section "Definitions".  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product  
status information is available on the Internet at URL http://www.nexperia.com.  
Suitability for use in automotive applications — This Nexperia  
product has been qualified for use in automotive  
9.2 Definitions  
applications. The product is not designed, authorized or warranted to be  
suitable for use in medical, military, aircraft, space or life support equipment,  
nor in applications where failure or malfunction of a Nexperia  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. Nexperia accepts no  
liability for inclusion and/or use of Nexperia products in such  
equipment or applications and therefore such inclusion and/or use is at the  
customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Nexperia does not accept any liability related to any default,  
damage, costs or problem which is based on a weakness or default in the  
customer application/use or the application/use of customer’s third party  
customer(s) (hereinafter both referred to as “Application”). It is customer’s  
sole responsibility to check whether the Nexperia product is  
suitable and fit for the Application planned. Customer has to do all necessary  
testing for the Application in order to avoid a default of the Application and the  
product. Nexperia does not accept any liability in this respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the Nexperia product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Limiting values — Stress above one or more limiting values (as defined in the  
Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
9.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — Nexperia  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. Nexperia hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of Nexperia products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of Nexperia.  
Right to make changes — Nexperia reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
12 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
Export control — This document as well as the item(s) described herein may  
be subject to export control regulations. Export might require a prior  
authorization from national authorities.  
10. Contact information  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
BUK964R2-55B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 4 June 2010  
13 of 14  
BUK964R2-55B  
Nexperia  
N-channel TrenchMOS logic level FET  
11. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
1.1  
1.2  
1.3  
1.4  
General description . . . . . . . . . . . . . . . . . . . . . .1  
Features and benefits. . . . . . . . . . . . . . . . . . . . .1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1  
Quick reference data . . . . . . . . . . . . . . . . . . . . .1  
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2  
Ordering information. . . . . . . . . . . . . . . . . . . . . .2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3  
Thermal characteristics . . . . . . . . . . . . . . . . . . .5  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11  
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .12  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13  
9.1  
9.2  
9.3  
9.4  
10  
Contact information. . . . . . . . . . . . . . . . . . . . . .13  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 04 June 2010  

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