BUK9K52-60RA [NEXPERIA]
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche technologyProduction;
| 型号： | BUK9K52-60RA |
| 厂家： | 
Nexperia |
| 描述： | Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche technologyProduction |
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BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in
LFPAK56D using Repetitive Avalanche technology
2 December 2020
Product data sheet
1. General description
Dual, logic level N-channel MOSFET in an LFPAK56D package, using Application Specific
(ASFET) repetitive avalanche silicon technology. This product has been designed and qualified to
AEC-Q101 for use in repetitive avalanche applications.
2. Features and benefits
•
Fully automotive qualified to AEC-Q101 at 175 °C
Repetitive Avalanche rated to 30 °C Tj rise:
Tested to 1 Bn avalanche events
LFPAK copper clip package technology:
•
•
•
•
•
High robustness and reliability
Gull wing leads for high manufacturability and AOI
3. Applications
•
•
•
•
•
12 V, 24 V and 48 V automotive systems
Repetitive avalanche topologies
Engine control
Transmission control
Actuator and auxiliary loads
4. Quick reference data
Table 1. Quick reference data
Symbol
VDS
Parameter
Conditions
Min
Typ
Max
60
Unit
V
drain-source voltage
drain current
25 °C ≤ Tj ≤ 175 °C
VGS = 5 V; Tmb = 25 °C; Fig. 2
-
-
-
-
-
-
ID
16
A
Ptot
total power dissipation Tmb = 25 °C; Fig. 1
32
W
Static characteristics FET1 and FET2
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 15
26.7
-
47.3
2.3
55
-
mΩ
nC
Dynamic characteristics FET1 and FET2
QGD gate-drain charge
ID = 5 A; VDS = 48 V; VGS = 5 V;
Tj = 25 °C; Fig. 17; Fig. 18
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol
S1
Description
source1
gate1
Simplified outline
Graphic symbol
8
7
6
5
D1
D2
D2
D1
2
G1
3
S2
source2
gate2
4
G2
5
D2
drain2
S1
G1
S2
G2
mbk725
6
D2
drain2
7
D1
drain1
1
2
3
4
8
D1
drain1
LFPAK56D; Dual
LFPAK (SOT1205)
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
BUK9K52-60RA
LFPAK56D;
Dual LFPAK
plastic, single ended surface mounted package (LFPAK56D); 8
leads
SOT1205
7. Marking
Table 4. Marking codes
Type number
Marking code
95260RA
BUK9K52-60RA
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
Unit
drain-source voltage
drain-gate voltage
gate-source voltage
25 °C ≤ Tj ≤ 175 °C
-
60
V
VDGR
VGS
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ
DC; Tj ≤ 175 °C
-
60
V
-10
10
V
Pulsed; Tj ≤ 175 °C
[1] [2] -15
15
V
Ptot
ID
total power dissipation
drain current
Tmb = 25 °C; Fig. 1
-
32
W
A
VGS = 5 V; Tmb = 25 °C; Fig. 2
VGS = 5 V; Tmb = 100 °C; Fig. 2
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
-
16
-
11
A
IDM
peak drain current
storage temperature
junction temperature
-
64
A
Tstg
Tj
-55
-55
-
175
175
260
°C
°C
°C
Tsld(M)
peak soldering
temperature
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
2 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
Symbol
Parameter
Conditions
Min
Max
Unit
Source-drain diode FET1 and FET2
IS
source current
Tmb = 25 °C
-
-
16
64
A
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)R repetitive drain-source
avalanche energy
ID = 0.5 A; Vsup ≤ 60 V; RGS = 10 Ω; VGS
=10 V; Tj(rise) ≤ 30 °C; unclamped; Fig. 4;
Fig. 5; Fig. 6
[3] [4]
[5]
-
19.5
mJ
Avalanche ruggedness FET1 and FET2
EDS(AL)S non-repetitive drain-
ID = 16 A; Vsup ≤ 60 V; VGS = 5 V;
[6] [7]
-
11.9
mJ
source avalanche energy Tj(init) = 25 °C; Fig. 7
[1] Accumulated Pulse duration up to 50 hours delivers zero defect ppm
[2] Significantly longer life times are achieved by lowering Tj and or VGS
[3] Repetitive avalanche rating is limited by maximum junction temperature of 175 °C and junction rise of 30 °C
[4] Refer to Fig. 5 for the limiting number of avalanche events
[5] Refer to Fig. 6 Rdson at Vgs=5V will increase as a function of repetitive avalanche cycles
[6] Refer to application note AN10273 for further information
[7] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C
03aa16
003aaj559
120
20
16
12
8
I
D
(A)
P
der
(%)
80
40
4
0
0
0
50
100
150
200
0
30
60
90
120
150
(°C)
180
T
mb
T
(°C)
mb
Fig. 2. Continuous drain current as a function of
mounting base temperature
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
3 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
aaa-031647
2
10
I
D
(A)
Limit R
= V / I
DS D
DSon
t
p
= 10 µs
10
100 µs
DC
1
1 ms
10 ms
100 ms
-1
10
2
1
10
10
V
DS
(V)
Tmb = 25 °C; IDM is a single pulse
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
aaa-031645
aaa-031643
2
10
10
10
I
AL
No. Events
(A)
10
9
10
1
-1
8
10
10
-3
-2
-1
-1
2
10
10
10
1
AL
10
10
1
10
Per Event (mJ)
10
t
(ms)
E
DS(AL)
Tj is limited to 175 °C and Tj(rise) is limited to 30 °C
Fig. 5. Repetitive avalanche rating; maximum number
of avalanche events as a function of avalanche
energy
Fig. 4. Repetitive avalanche rating; avalanche current
as a function of avalanche time
aaa-032338
50
40
30
20
10
0
1
2
10
10
% of cycle limit
Fig. 6. Percentage Rdson at 5V increase as a function of avalanche cycles
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
4 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
aaa-031644
2
10
I
AL
(A)
10
1
-1
10
-3
-2
-1
10
10
10
1
AL
10
t
(ms)
Tj(int) = 25 °C
Fig. 7. Single pulse avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from Fig. 8
junction to mounting
base
-
-
4.68
K/W
Rth(j-a)
thermal resistance from Minimum footprint; mounted on a
-
95
-
K/W
junction to ambient
printed circuit board
003aaj557
10
Z
th(j-mb)
= 0.5
δ
(K/W)
0.2
1
0.1
0.05
0.02
tp
δ =
T
P
10-1
single shot
t
tp
T
10-2
10-6
10-5
10-4
10-3
10-2
10-1
1
t (s)
p
Fig. 8. Transient thermal impedance from junction to mounting base as a function of pulse duration
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
5 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics FET1 and FET2
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
54
60
1.4
-
-
V
V
V
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C; Fig. 13;
1.7
2.1
voltage
Fig. 14
ID = 1 mA; VDS=VGS; Tj = 175 °C;
Fig. 13; Fig. 14
0.5
-
-
-
-
V
V
ID = 1 mA; VDS=VGS; Tj = -55 °C;
Fig. 13; Fig. 14
2.45
IDSS
drain leakage current
gate leakage current
VDS = 60 V; VGS = 0 V; Tj = 25 °C
VDS = 60 V; VGS = 0 V; Tj = 175 °C
VGS = -10 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; VDS = 0 V; Tj = 25 °C
VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 15
-
0.02
1
µA
µA
nA
-
-
500
100
100
55
IGSS
-
2
-
2
nA
RDSon
drain-source on-state
resistance
26.7
-
47.3
mΩ
mΩ
VGS = 5 V; ID = 5 A; Tj = 175 °C; Fig. 15;
Fig. 16
106.9 124
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 15
23.8
41.4
49
mΩ
Dynamic characteristics FET1 and FET2
QG(tot)
QGS
QGD
Ciss
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
ID = 5 A; VDS = 48 V; VGS = 5 V;
Tj = 25 °C; Fig. 17; Fig. 18
-
-
-
-
-
-
5.6
1.1
2.3
544
74
-
nC
nC
nC
pF
pF
pF
-
-
VDS = 25 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; Fig. 19
725
89
55
Coss
Crss
reverse transfer
capacitance
40
td(on)
tr
td(off)
tf
turn-on delay time
rise time
VDS = 48 V; RL = 10 Ω; VGS = 5 V;
RG(ext) = 5 Ω; Tj = 25 °C
-
-
-
-
6.2
10.1
10.7
9
-
-
-
-
ns
ns
ns
ns
turn-off delay time
fall time
Source-drain diode FET1 and FET2
VSD
trr
source-drain voltage
IS = 5 A; VGS = 0 V; Tj = 25 °C; Fig. 20
-
-
-
0.78
17.7
11.6
1.2
V
reverse recovery time IS = 5 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
-
ns
nC
VDS = 30 V; Tj = 25 °C
Qr
recovered charge
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
6 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
003aaj548
003aaj549
30
80
I
D
g
(A)
fs
(S)
60
20
40
20
0
10
T = 175
j
C
T = 25 C
°
j
°
0
0
4
8
12
16
20
0
2
4
6
8
V
(V)
I
(A)
GS
D
Fig. 9. Forward transconductance as a function of
drain current; typical values
Fig. 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aaj550
003aaj551
180
20
I
4.5
D
R
(m
(A)
DSon
10
3.5
)
Ω
16
120
60
0
12
8
V
(V) =
3
GS
2.8
4
2.6
2.4
0
0
4
8
12
16
0
2
4
6
V
(V)
V
(V)
DS
GS
Fig. 11. Drain-source on-state resistance as a function Fig. 12. Output characteristics: drain current as a
of gate-source voltage; typical values
function of drain-source voltage; typical values
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
7 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
003aah026
003aah025
3
10-1
VGS(th)
(V)
2.5
ID
(A)
10-2
max
typ
2
1.5
1
min
typ
max
10-3
10-4
10-5
10-6
min
0.5
0
-60
0
60
120
180
0
1
2
3
T ( C)
VGS (V)
°
j
Fig. 13. Gate-source threshold voltage as a function of
junction temperature
Fig. 14. Sub-threshold drain current as a function of
gate-source voltage
003aaj556
003aaj816
150
2.4
3
2.8
R
DSon
a
(m
)
Ω
120
V
(V) =
3.5
GS
1.6
90
0.8
4.5
10
60
0
-60
30
0
60
120
180
2
6
10
14
18
22
Tj °C)
(
I (A)
D
Fig. 15. Drain-source on-state resistance as a function
of drain current; typical values
Fig. 16. Normalized drain-source on-state resistance
factor as a function of junction temperature
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
8 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
003aaj553
10
VGS
(V)
V
DS
VDS
=
48 V
8
6
4
2
0
I
D
14 V
V
V
GS(pl)
GS(th)
V
GS
Q
GS2
Q
GS1
Q
Q
GS
GD
0
5
10
15
QG (nC)
Q
G(tot)
003aaa508
Fig. 17. Gate charge waveform definitions
Fig. 18. Gate-source voltage as a function of gate
charge; typical values
003aaj554
003aaj555
104
25
I
S
C
(A)
(pF)
20
103
C
iss
15
10
102
10
1
C
C
oss
rss
T = 25 C
°
T = 150 C
°
j
j
5
0
10-1
1
10
102
0
0.3
0.6
0.9
1.2
V
(V)
V
(V)
SD
DS
Fig. 19. Input, output and reverse transfer capacitances Fig. 20. Source current as a function of source-drain
as a function of drain-source voltage; typical
values
voltage; typical values
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
9 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
11. Package outline
Plastic single ended surface mounted package LFPAK56D; 8 leads
SOT1205
E
A
A
b
c
1
1
L
1
mounting
base
D
1
D
2
D
H
L
1
2
3
4
X
b
(8x)
e
c
E
1
w
A
E
2
C
A
1
θ
L
p
y
C
detail X
0
2.5
5 mm
scale
Dimensions
Unit
D
(ref)
2
(1)
(1)
(1)
E
(1)
A
A
b
b
c
c
D
D
1
E
E
e
H
L
L
L
p
w
y
θ
1
1
1
1
2
1
°
8
0
max 1.05 0.1 0.50 4.4 0.25 0.30 4.70 4.55 3.5 5.30 1.8 0.85
nom
min 1.02 0.0 0.35 4.1 0.19 0.24 4.45 4.35 3.4 4.95 1.6 0.60
6.2 1.3 0.55 0.85
5.9 0.8 0.30 0.40
mm
1.27
0.25 0.1
°
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot1205_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
14-08-21
14-10-28
SOT1205
Fig. 21. Package outline LFPAK56D; Dual LFPAK (SOT1205)
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
10 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
12. Soldering
Footprint information for reflow soldering of LFPAK56D package
SOT1205
5.85
0.57
0.57
0.7
1.97
1.27
0.65
0.025
1.9
3.325
3.175
3.2
2.0
1.275
0.8
1.0
1.875
2.1
2.7
3.85
3.975
0.025
1.1
1.15
0.65
1.27
1.44
0.7
1.1
solder land
solder land plus solder paste
solder paste deposit
occupied area
14-07-28
solder resist
Dimensions in mm
sot1205_fr
Issue date
20-04-20
Fig. 22. Reflow soldering footprint for LFPAK56D; Dual LFPAK (SOT1205)
©
BUK9K52-60RA
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Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
11 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
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Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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[1][2]
status [3]
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data sheet
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data sheet
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data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
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[2] The term 'short data sheet' is explained in section "Definitions".
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the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
12 / 13
Nexperia
BUK9K52-60RA
Dual N-channel 60 V, 55 mOhm logic level MOSFET in LFPAK56D using Repetitive Avalanche
technology
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 2
9. Thermal characteristics............................................... 5
10. Characteristics............................................................6
11. Package outline........................................................ 10
12. Soldering................................................................... 11
13. Legal information......................................................12
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 2 December 2020
©
BUK9K52-60RA
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
2 December 2020
13 / 13
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