HEF4051BT-Q100 [NEXPERIA]
8-channel analog multiplexer/demultiplexerProduction;
| 型号： | HEF4051BT-Q100 |
| 厂家： | 
Nexperia |
| 描述： | 8-channel analog multiplexer/demultiplexerProduction |
| 文件： | 总18页 (文件大小：287K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
Rev. 3 — 29 July 2021
Product data sheet
1. General description
The HEF4051B-Q100 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog
or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs
(S1, S2 and S3), eight independent inputs/outputs (Yn), a common input/output (Z) and a digital
enable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of VCC
.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
ESD protection:
•
•
•
MIL-STD-833, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
3. Applications
•
•
•
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
4. Ordering information
Table 1. Ordering information
All types operate from -40 °C to +125 °C.
Type number
Package
Name
Description
Version
HEF4051BT-Q100
SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
SOT403-1
HEF4051BTT-Q100 TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
5. Functional diagram
V
DD
16
13 Y0
14 Y1
15 Y2
12 Y3
S1 11
S2 10
LOGIC
LEVEL
CONVERSION
1
5
2
4
3
Y4
Y5
Y6
Y7
Z
1 - OF - 8
DECODER
S3 9
E
6
8
7
V
V
001aac277
SS
EE
Fig. 1. Functional diagram
Yn
V
V
DD
DD
Z
V
EE
001aac281
Fig. 2. Schematic diagram (one switch)
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
2 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
11
1
0
7
10
9
X
3
6
EN
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
13
14
15
12
1
S1
S2
S3
MUX/DMUX
11
10
9
13
14
15
12
1
0
1
2
3
4
5
6
3
5
5
2
2
E
6
4
3
4
7
Z
001aac278
001aac279
Fig. 3. Logic symbol
Fig. 4. IEC logic symbol
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
3 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
LEVEL
CONVERTER
S1
S2
S3
E
LEVEL
CONVERTER
LEVEL
CONVERTER
LEVEL
CONVERTER
Z
001aac280
Fig. 5. Logic diagram
©
HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
4 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
6. Pinning information
6.1. Pinning
HEF4051B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Y4
Y6
Z
V
DD
Y2
Y1
Y0
Y3
S1
S2
S3
Y7
Y5
E
V
EE
SS
V
001aac282
Fig. 6. Pin configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16)
6.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
E
6
enable input (active LOW)
supply voltage
VEE
7
VSS
8
ground supply voltage
select input
S1, S2, S3
11, 10, 9
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7
13, 14, 15, 12, 1, 5, 2, 4
independent input or output
common output or input
supply voltage
Z
3
VDD
16
7. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Input
Channel ON
E
L
L
L
L
L
L
L
L
H
S3
L
S2
L
S1
L
Y0 to Z
Y1 to Z
Y2 to Z
Y3 to Z
Y4 to Z
Y5 to Z
Y6 to Z
Y7 to Z
switches off
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
X
L
H
L
H
H
X
H
X
©
HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
5 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
-0.5
-18
-
Max
+18
+0.5
±10
Unit
V
VDD
VEE
IIK
supply voltage
supply voltage
referenced to VDD
[1]
V
input clamping current
pins Sn and E;
mA
VI < -0.5 V or VI > VDD + 0.5 V
VI
input voltage
-0.5
VDD + 0.5
±10
V
II/O
IDD
Tstg
Tamb
Ptot
P
input/output current
supply current
-
-
mA
mA
°C
50
storage temperature
ambient temperature
total power dissipation
power dissipation
-65
-40
-
+150
+125
500
°C
Tamb = -40 °C to +125 °C
per output
[2]
mW
mW
-
100
[1] To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE
.
[2] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
9. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
15
Unit
V
VDD
VI
supply voltage
see Fig. 7
3
0
-
-
-
-
-
-
input voltage
VDD
+125
3.75
0.5
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
VDD = 5 V
VDD = 10 V
VDD = 15 V
μs/V
μs/V
μs/V
-
-
0.08
001aac285
15
V
- V
DD SS
(V)
10
operating area
5
0
0
5
10
15
V
- V (V)
EE
DD
Fig. 7. Operating area as a function of the supply voltages
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
6 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
10. Static characteristics
Table 6. Static characteristics
VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °C Unit
Min
3.5
7.0
Max
-
Min
Max
-
Min
Max
-
Min
Max
-
VIH
VIL
II
HIGH-level
input voltage
|IO| < 1 μA
5 V
3.5
3.5
3.5
V
V
V
V
V
V
10 V
-
7.0
-
7.0
-
7.0
-
15 V 11.0
-
11.0
-
11.0
-
11.0
-
LOW-level
input voltage
|IO| < 1 μA
5 V
-
-
-
-
1.5
3.0
4.0
±0.1
-
-
-
-
1.5
3.0
4.0
±0.1
-
-
-
-
1.5
3.0
4.0
±1.0
-
-
-
-
1.5
3.0
4.0
10 V
15 V
15 V
input leakage
current
±1.0 μA
IS(OFF) OFF-state
leakage
Z port;
all channels OFF;
see Fig. 8
15 V
15 V
-
-
-
-
-
-
1000
200
-
-
-
-
-
-
-
-
nA
nA
current
Y port;
per channel;
see Fig. 9
IDD
supply current IO = 0 A
5 V
10 V
15 V
-
-
-
-
-
5
10
20
-
-
-
-
-
5
-
-
-
-
150
300
600
-
-
-
-
-
150 μA
300 μA
600 μA
10
20
7.5
CI
input
Sn, E inputs
-
pF
capacitance
10.1. Test circuits
V
V
DD
DD
S1 to S3
V
or V
S1 to S3
Y0
Yn
1
2
DD
SS
V
or V
DD
SS
SS
switch
Z
E
Yn
I
S
Z
E
I
S
V
= V
EE
SS
V
= V
EE
SS
V
V
DD
V
V
I
V
V
O
O
I
001aak513
001aak514
Fig. 8. Test circuit for measuring OFF-state leakage
current Z port
Fig. 9. Test circuit for measuring OFF-state leakage
current Yn port
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HEF4051B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
7 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
10.2. ON resistance
Table 7. ON resistance
Tamb = 25 °C; ISW = 200 μA; VSS = VEE = 0 V.
Symbol Parameter
Conditions
VI = 0 V to VDD - VEE
VDD - VEE
5 V
Typ
350
80
Max
2500
245
175
340
160
115
365
200
155
-
Unit
Ω
RON(peak) ON resistance (peak)
;
see Fig. 10 and Fig. 11
10 V
15 V
5 V
Ω
60
Ω
RON(rail)
ON resistance (rail)
VI = 0 V;
see Fig. 10 and Fig. 11
115
50
Ω
10 V
15 V
5 V
Ω
40
Ω
VI = VDD - VEE
;
120
65
Ω
see Fig. 10 and Fig. 11
10 V
15 V
5 V
Ω
50
Ω
ΔRON
ON resistance mismatch
between channels
VI = 0 V to VDD - VEE
;
25
Ω
see Fig. 10
10 V
15 V
10
-
Ω
5
-
Ω
10.2.1. ON resistance waveform and test circuit
001aae648
400
R
ON
(Ω)
V
= 5 V
DD
300
V
V
V
SW
DD
200
100
0
S1 to S3
V
or V
DD
SS
SS
Z
E
Yn
10 V
V
= V
EE
SS
V
15 V
I
V
I
SW
001aak512
0
5
10
15
V (V)
I
RON = VSW / ISW
.
Fig. 10. Test circuit for measuring RON
Fig. 11. Typical RON as a function of input voltage
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
8 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
11. Dynamic characteristics
Table 8. Dynamic characteristics
Tamb = 25 °C; VSS = VEE = 0 V; for test circuit see Fig. 15.
Symbol Parameter
tPHL HIGH to LOW propagation delay
Conditions
VDD
5 V
Typ
15
Max
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Yn, Z to Z, Yn; see Fig. 12
10 V
15 V
5 V
5
10
5
10
Sn to Yn, Z; see Fig. 13
Yn, Z to Z, Yn; see Fig. 12
Sn to Yn, Z; see Fig. 13
E to Yn, Z; see Fig. 14
E to Yn, Z; see Fig. 14
E to Yn, Z; see Fig. 14
E to Yn, Z; see Fig. 14
150
60
300
120
90
10 V
15 V
5 V
45
tPLH
LOW to HIGH propagation delay
15
30
10 V
15 V
5 V
5
10
5
10
150
65
300
130
90
10 V
15 V
5 V
45
tPHZ
tPZH
tPLZ
tPZL
HIGH to OFF-state propagation
delay
120
90
240
180
170
280
110
80
10 V
15 V
5 V
85
OFF-state to HIGH propagation
delay
140
55
10 V
15 V
5 V
40
LOW to OFF-state propagation
delay
145
120
115
140
55
290
240
230
280
110
80
10 V
15 V
5 V
OFF-state to LOW propagation
delay
10 V
15 V
40
©
HEF4051B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
9 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
11.1. Waveforms and test circuit
V
DD
Yn or Z
input
V
M
V
DD
Sn input
V
M
V
EE
V
SS
t
t
PLH
PHL
t
t
PHL
PLH
V
V
O
O
90 %
Yn or Z
Z or Yn
output
V
output
M
10 %
switch ON
V
EE
V
switch OFF
switch OFF
EE
001aak509
001aak510
Measurement points are given in Table 9.
Measurement points are given in Table 9.
Fig. 12. Yn, Z to Z, Yn propagation delays
Fig. 13. Sn to Yn, Z propagation delays
V
DD
E input
V
M
V
V
V
SS
t
t
PLZ
PZL
V
O
90 %
Yn or Z output
LOW-to-OFF
OFF-to-LOW
10 %
EE
t
t
PHZ
PZH
V
O
90 %
Yn or Z output
HIGH-to-OFF
OFF-to-HIGH
10 %
EE
switch ON
switch OFF
switch ON
001aak511
Measurement points are given in Table 9.
Fig. 14. Enable and disable times
Table 9. Measurement points
Supply voltage
Input
VM
Output
VDD
VM
5 V to 15 V
0.5VDD
0.5VDD
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
10 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
M
positive
pulse
V
M
10 %
0 V
t
W
V
V
DD
V
V
I
DD
V
I
S1
O
R
L
PULSE
GENERATOR
open
DUT
R
T
C
L
V
V
SS
EE
001aaj903
Test data is given in Table 10.
Definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including test jig and probe.
RL = Load resistance.
Fig. 15. Test circuit for measuring switching times
Table 10. Test data
Input
Yn, Z
Load
CL
S1 position
tPHL [1]
Sn and E tr, tf
VM
RL
tPLH
tPZH, tPHZ tPZL, tPLZ other
VDD or VEE VDD or VSS ≤ 20 ns
0.5VDD
50 pF
10 kΩ
VDD or VEE VEE
VEE
VDD
VEE
[1] For Yn to Z or Z to Yn propagation delays use VEE. For Sn to Yn or Z propagation delays use VDD
.
11.2. Additional dynamic parameters
Table 11. Additional dynamic characteristics
VSS = VEE = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
VDD
5 V
Typ
Max Unit
THD
total harmonic
distortion
see Fig. 16; RL = 10 kΩ; CL = 15 pF;
channel ON; VI = 0.5VDD (p-p); fi = 1 kHz
[1] 0.25
[1] 0.04
[1] 0.04
-
-
-
-
-
-
-
%
10 V
15 V
%
%
f(-3dB)
-3 dB frequency
response
see Fig. 17; RL = 1 kΩ; CL = 5 pF; channel ON; 5 V
VI = 0.5VDD (p-p)
[1]
[1]
[1]
[1]
13
40
MHz
MHz
MHz
dB
10 V
15 V
70
αiso
Vct
isolation (OFF-state) see Fig. 18; fi = 1 MHz; RL = 1 kΩ; CL = 5 pF; 10 V
channel OFF; VI = 0.5VDD (p-p)
-50
crosstalk voltage
digital inputs to switch; see Fig. 19;
RL = 10 kΩ; CL = 15 pF;
E or Sn = VDD (square-wave)
10 V
50
-
-
mV
dB
Xtalk
crosstalk
between switches; see Fig. 20; fi = 1 MHz;
RL = 1 kΩ; VI = 0.5VDD (p-p)
10 V
[1]
-50
[1] fi is biased at 0.5 VDD; VI = 0.5VDD (p-p).
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
11 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
Table 12. Dynamic power dissipationPD
PD can be calculated from the formulas shown; VEE = VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol
Parameter
VDD
5 V
Typical formula for PD (μW)
PD = 1000 × fi + Σ(fo × CL) × VDD
PD = 5500 × fi + Σ(fo × CL) × VDD
where:
2
2
PD
dynamic power
dissipation
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
10 V
15 V
2
PD = 15000 × fi + Σ(fo × CL) × VDD
Σ(CL × fo) = sum of the outputs.
11.2.1. Test circuits
V
DD
V
DD
S1 to S3
V
or V
DD
SS
SS
S1 to S3
V
or V
Z
E
Yn
DD
SS
SS
Z
E
Yn
V
= V
EE
SS
V
R
L
C
L
D
V
= V
SS EE
V
R
L
C
L
dB
f
i
f
i
001aak516
001aak517
Fig. 16. Test circuit for measuring total harmonic
distortion
Fig. 17. Test circuit for measuring frequency response
V
DD
S1 to S3
Y0
Yn
1
2
V
or V
DD
SS
SS
switch
R
Z
E
V
= V
SS
EE
V
C
L
dB
L
f
i
001aak518
Fig. 18. Test circuit for measuring isolation (OFF-state)
0.5V
V
0.5V
DD
DD
DD
R
L
R
L
S1 to S3
Y0
Yn
1
2
logic
input (Sn, E)
switch
off
on
off
Z
E
G
V
= V
SS
EE
C
L
V
O
V
V
or V
SS
DD
V
V
ct
O
001aak519
001aaj908
a. Test circuit
b. Input and output pulse definitions
Fig. 19. Test circuit for measuring crosstalk voltage between digital inputs and switch
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
12 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
V
DD
V
DD
S1 to S3
Y0
Yn
S1 to S3
Y0
Yn
V
or V
DD
SS
SS
V
or V
DD
SS
SS
Z
E
Z
E
V
= V
EE
SS
V
= V
EE
SS
V
V
I
R
L
V
R
L
V
O
R
L
R
L
V
O
V
I
001aak520
001aak521
a. Switch closed condition
Fig. 20. Test circuit for measuring crosstalk between switches
b. Switch open condition
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
13 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 21. Package outline SOT109-1 (SO16)
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HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
14 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
1
0.2
0.13
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig. 22. Package outline SOT403-1 (TSSOP16)
©
HEF4051B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
15 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
13. Abbreviations
Table 13. Abbreviations
Acronym
Description
CMOS
DUT
ESD
HBM
MIL
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
MM
Machine Model
14. Revision history
Table 14. Revision history
Document ID
Release date Data sheet status
20210729 Product data sheet
Change notice Supersedes
- HEF4051B_Q100 v.2
HEF4051B_Q100 v.3
Modifications:
•
The format of this data sheet has been redesigned to comply with the identity
guidelines of Nexperia.
•
•
•
Legal texts have been adapted to the new company name where appropriate.
Section 1 and Section 2 updated.
Section 8: Derating values for Ptot total power dissipation updated.
HEF4051B_Q100 v.2
Modifications:
20140911
Fig. 19: Test circuit modified
20120712 Product data sheet
Product data sheet
-
-
HEF4051B_Q100 v.1
-
•
HEF4051B_Q100 v.1
©
HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
16 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
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Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
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minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
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Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
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Definitions
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warranties as to the accuracy or completeness of information included herein
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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with the same product type number(s) and title. A short data sheet is
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sold subject to the general terms and conditions of commercial sale, as
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terms and conditions with regard to the purchase of Nexperia products by
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Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Disclaimers
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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Limited warranty and liability — Information in this document is believed
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or completeness of such information and shall have no liability for the
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Translations — A non-English (translated) version of a document is for
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between the translated and English versions.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
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Notwithstanding any damages that customer might incur for any reason
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Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
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Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
HEF4051B_Q100
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Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
17 / 18
Nexperia
HEF4051B-Q100
8-channel analog multiplexer/demultiplexer
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................5
6.1. Pinning.........................................................................5
6.2. Pin description.............................................................5
7. Functional description................................................. 5
8. Limiting values............................................................. 6
9. Recommended operating conditions..........................6
10. Static characteristics..................................................7
10.1. Test circuits................................................................7
10.2. ON resistance............................................................8
10.2.1. ON resistance waveform and test circuit................ 8
11. Dynamic characteristics.............................................9
11.1. Waveforms and test circuit.......................................10
11.2. Additional dynamic parameters................................11
11.2.1. Test circuits........................................................... 12
12. Package outline........................................................ 14
13. Abbreviations............................................................16
14. Revision history........................................................16
15. Legal information......................................................17
© Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 29 July 2021
©
HEF4051B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2021. All rights reserved
Product data sheet
Rev. 3 — 29 July 2021
18 / 18
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