HEF4077BT-Q100 [NEXPERIA]
Quad 2-input EXCLUSIVE-NOR gateProduction;
| 型号： | HEF4077BT-Q100 |
| 厂家： | 
Nexperia |
| 描述： | Quad 2-input EXCLUSIVE-NOR gateProduction 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：190K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
Rev. 2 — 22 February 2022
Product data sheet
1. General description
The HEF4077B is a quad 2-input EXCLUSIVE-NOR gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of VDD
.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from -40 °C to +85 °C
•
•
•
•
•
•
•
•
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
•
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name Description
Version
HEF4077BT-Q100 -40 °C to +85 °C
SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
4. Functional diagram
1
2
1A
1B
1Y
2Y
3
4
5
6
2A
2B
8
9
3A
3B
3Y 10
4Y 11
12 4A
13 4B
1A
1B
1Y
aaa-012675
aaa-012674
Fig. 1. Functional diagram
Fig. 2. Logic diagram (one gate)
5. Pinning information
5.1. Pinning information
HEF4077B
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
1Y
2Y
2A
2B
V
DD
4B
4A
4Y
3Y
3B
3A
8
V
SS
aaa-012676
Fig. 3. Pin configuration SOT108-1 (SO14)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
input
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
VSS
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
7
input
output
ground (0 V)
supply voltage
VDD
14
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
2 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
6. Functional description
Table 3. Functional table
H = HIGH voltage level; L = LOW voltage level.
Input
Output
nA
L
nB
L
nY
H
L
L
H
L
H
H
L
H
H
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min
Max
+18
Unit
V
VDD
IIK
supply voltage
-0.5
input clamping current
input voltage
VI < -0.5 V or VI > VDD + 0.5 V
VO < -0.5 V or VO > VDD + 0.5 V
-
±10
mA
V
VI
-0.5
VDD + 0.5
±10
IOK
II/O
IDD
Tstg
Tamb
Ptot
P
output clamping current
input/output current
supply current
-
mA
mA
mA
°C
-
-
±10
50
storage temperature
ambient temperature
total power dissipation
power dissipation
-65
-40
-
+150
+85
°C
Tamb = -40 °C to +85 °C
per output
500
mW
mW
-
100
8. Recommended operating conditions
Table 5. Operating conditions
Symbol Parameter
Conditions
Min
Max
15
Unit
V
VDD
VI
supply voltage
3
0
input voltage
VDD
+85
3.75
0.5
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
VDD = 5 V
VDD = 10 V
VDD = 15 V
μs/V
μs/V
μs/V
-
-
0.08
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
3 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
9. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD, unless otherwise specified.
Symbol Parameter
Conditions
VDD
Tamb = -40 °C
Tamb = 25 °C
Tamb = 85 °C
Unit
Min
3.5
7.0
11.0
-
Max
-
Min
Max
-
Min
Max
-
VIH
HIGH-level
input voltage
|IO| < 1 μA
5 V
3.5
3.5
V
V
V
V
V
V
V
V
V
V
V
V
mA
10 V
15 V
5 V
-
7.0
-
7.0
-
-
11.0
-
11.0
-
VIL
LOW-level
input voltage
|IO| < 1 μA
|IO| < 1 μA
|IO| < 1 μA
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
10 V
15 V
5 V
-
-
-
-
-
-
VOH
VOL
IOH
HIGH-level
output voltage
4.95
9.95
4.95
4.95
10 V
-
9.95
-
9.95
-
15 V 14.95
-
14.95
-
14.95
-
LOW-level
output voltage
5 V
-
0.05
0.05
0.05
-1.7
-0.52
-1.3
-3.6
-
-
0.05
0.05
0.05
-1.4
-0.44
-1.1
-3.0
-
-
0.05
0.05
0.05
-1.1
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-level
output current
VO = 2.5 V
VO = 4.6 V
VO = 9.5 V
VO = 13.5 V
VO = 0.4 V
VO = 0.5 V
VO = 1.5 V
-
-
-
5 V
-
-
-
-
-
-
-0.36 mA
10 V
15 V
5 V
-0.9
mA
mA
mA
mA
mA
-
-
-
-2.4
IOL
LOW-level
output current
0.52
1.3
3.6
-
0.44
1.1
3.0
-
0.36
0.9
2.4
-
-
-
-
10 V
15 V
15 V
-
-
-
-
II
input leakage
current
±0.3
±0.3
±3.0 μA
IDD
supply current
all valid input
combinations;
IO = 0 A
5 V
10 V
15 V
-
-
-
-
-
1.0
2.0
4.0
-
-
-
-
-
1.0
2.0
4.0
7.5
-
-
-
-
7.5 μA
15.0 μA
30.0 μA
CI
input capacitance
-
pF
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
4 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
10. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 °C; unless otherwise specified. For waveform see Fig. 4; for test circuit see Fig. 5.
Symbol Parameter
Conditions
VDD
Extrapolation
formula[1]
Min
Typ
Max Unit
tPHL
tPLH
tt
HIGH to LOW
propagation delay
nA or nB to nY 5 V
10 V
15 V
nA or nB to nY 5 V
48 ns + (0.55 ns/pF)CL
24 ns + (0.23 ns/pF)CL
22 ns + (0.16 ns/pF)CL
43 ns + (0.55 ns/pF)CL
19 ns + (0.23 ns/pF)CL
17 ns + (0.16 ns/pF)CL
[2] 10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
6 ns + (0.28 ns/pF)CL
-
-
-
-
-
-
-
-
-
75
35
30
70
30
25
60
30
20
150 ns
70
55
ns
ns
LOW to HIGH
propagation delay
145 ns
10 V
15 V
5 V
60
50
ns
ns
transition time
nY
120 ns
10 V
15 V
60
40
ns
ns
[1] The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
[2] tt is the same as tTHL and tTLH
.
Table 8. Dynamic power dissipation
VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol Parameter
VDD Typical formula
where:
PD
dynamic power dissipation 5 V PD = 850 × fi + Σ(fo × CL) × VDD 2 (μW)
10 V PD = 4500 × fi + Σ(fo × CL) × VDD 2 (μW)
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
Σ(fo × CL) = sum of the outputs;
VDD = supply voltage in V.
15 V PD = 114700 × fi + Σ(fo × CL) × VDD 2 (μW)
10.1. Waveform and test circuit
t
r
t
f
V
I
90 %
nA, nB input
V
M
10 %
0 V
t
t
PLH
PHL
V
OH
90 %
V
M
nY output
10 %
V
OL
t
t
THL
TLH
aaa-009502
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 4. Input to output propagation delay and output transition times
Table 9. Measurement points
Supply voltage
VDD
Input
VM
Output
VM
5 V to 15 V
0.5 × VDD
0.5 × VDD
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
5 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
V
DD
V
V
O
I
G
DUT
C
L
R
T
001aag182
Test data is given in Table 10.
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance;
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig. 5. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
Input
Load
CL
VI
tr, tf
5 V to 15 V
VSS or VDD
≤ 20 ns
50 pF
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
6 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
11. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig. 6. Package outline SOT108-1 (SO14)
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
7 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
12. Abbreviations
Table 11. Abbreviations
Acronym
CDM
DUT
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Military
ESD
HBM
MIL
13. Revision history
Table 12. Revision history
Document ID
Release date
20220222
Data sheet status
Change notice
Supersedes
HEF4077B_Q100 v.2
Modifications:
Product data sheet
-
HEF4077B_Q100 v. 1
•
Section 1 and Section 2 updated.
HEF4077B_Q100 v. 1
20170314 Product specification
-
-
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
8 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
14. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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Definition
[1][2]
status [3]
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without further testing or modification.
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data sheet
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This document contains data from
the objective specification for
product development.
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data sheet
Qualification
Production
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the preliminary specification.
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data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
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©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
9 / 10
Nexperia
HEF4077B-Q100
Quad 2-input EXCLUSIVE-NOR gate
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................2
5.1. Pinning information......................................................2
5.2. Pin description.............................................................2
6. Functional description................................................. 3
7. Limiting values............................................................. 3
8. Recommended operating conditions..........................3
9. Static characteristics....................................................4
10. Dynamic characteristics............................................ 5
10.1. Waveform and test circuit..........................................5
11. Package outline.......................................................... 7
12. Abbreviations..............................................................8
13. Revision history..........................................................8
14. Legal information........................................................9
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 22 February 2022
©
HEF4077B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 2 — 22 February 2022
10 / 10
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