HEF4555BT-Q100 [NEXPERIA]
1-of-4 decoder/demultiplexerProduction;
| 型号： | HEF4555BT-Q100 |
| 厂家： | 
Nexperia |
| 描述： | 1-of-4 decoder/demultiplexerProduction 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HEF4555B-Q100
1-of-4 decoder/demultiplexer
Rev. 3 — 15 March 2022
Product data sheet
1. General description
The HEF4555B-Q100 contains two 1-of-4 decoders/demultiplexers. Each has two address inputs
(nA0 and nA1, an active LOW enable input (nE) and four mutually exclusive outputs which are
active HIGH (nY0 to nY3). When used as a decoder, nE when HIGH, forces nY0 to nY3 LOW.
When used as a demultiplexer, the appropriate output is selected by the information on nA0 and
nA1 with nE as data input. All unselected outputs are LOW.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually
ground). Unused inputs must be connected to VDD, VSS, or another input.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 3) and is suitable for use in automotive applications.
2. Features and benefits
•
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from -40 °C to +85 °C
•
•
•
•
•
•
•
•
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
•
•
•
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
•
Complies with JEDEC standard JESD 13-B
3. Applications
•
•
•
Code conversion
Address decoding
Demultiplexing: when using the enable input as data input
4. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
-40 °C to +85 °C
Name
Description
Version
HEF4555BT-Q100
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
5. Functional diagram
1Y0 4
1Y1 5
2 1A0
nY0
DECODER
3 1A1
1Y2
6
nA0
nA1
nE
1Y3 7
nY1
nY2
1 1E
2Y0 12
2Y1 11
2Y2 10
2Y3 9
14 2A0
DECODER
13 2A1
15 2E
nY3
001aae751
001aae753
Fig. 1. Functional diagram
Fig. 2. Logic diagram for one decoder/multiplexer
6. Pinning information
6.1. Pinning
HEF4555B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1E
1A0
1A1
1Y0
1Y1
1Y2
1Y3
V
DD
2E
2A0
2A1
2Y0
2Y1
2Y2
2Y3
V
SS
001aae752
Fig. 3. Pin configuration SOT109-1 (SO16)
6.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1A0, 1A1, 2A0, 2A1
1E, 2E
2, 3, 14, 13
1, 15
address input
enable input (active LOW
output (active HIGH)
supply voltage
1Y0, 1Y1, 1Y2, 1Y3, 2Y0, 2Y1, 2Y2, 2Y3 4, 5, 6, 7, 12, 11, 10, 9
VDD
VSS
16
8
ground (GND)
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
2 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
7. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
Inputs
Outputs
nE
L
nA0
L
nA1
L
nY0
H
nY1
L
nY2
L
nY3
L
L
H
L
L
H
L
L
L
L
H
L
L
H
L
L
H
H
L
L
L
H
H
X
X
L
L
L
L
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDD
IIK
Parameter
Conditions
Min
Max
Unit
V
supply voltage
-0.5
+18
±10
input clamping current
input voltage
VI < -0.5 V or VI > VDD + 0.5 V
-
mA
V
VI
-0.5
VDD + 0.5
±10
IOK
output clamping current
input/output current
supply current
VO < -0.5 V or VO > VDD + 0.5 V
-
mA
mA
mA
°C
II/O
-
-
±10
IDD
50
Tstg
Tamb
Ptot
P
storage temperature
ambient temperature
total power dissipation
power dissipation
-65
-40
-
+150
+85
°C
SO16 package
per output
500
mW
mW
-
100
9. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
VDD
Parameter
Conditions
Min
Typ
Max
15
Unit
supply voltage
3
0
-
-
-
-
-
-
V
VI
input voltage
VDD
+85
3.75
0.5
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
VDD = 5 V
VDD = 10 V
VDD = 15 V
μs/V
μs/V
μs/V
-
-
0.08
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
3 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
10. Static characteristics
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD
Tamb = -40 °C Tamb = 25 °C
Tamb = 85 °C Unit
Min
Max
-
Min
Max
-
Min
Max
VIH
HIGH-level input voltage |IO| < 1 μA
5 V
3.5
3.5
3.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
10 V
15 V
5 V
7.0
-
7.0
-
7.0
11.0
-
11.0
-
11.0
-
VIL
LOW-level input voltage
|IO| < 1 μA
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
10 V
15 V
5 V
-
-
-
-
-
-
VOH
VOL
IOH
HIGH-level output voltage |IO| < 1 μA;
VI = VSS or VDD
4.95
4.95
4.95
10 V
15 V
5 V
9.95
-
9.95
-
9.95
-
14.95
-
14.95
-
14.95
-
LOW-level output voltage |IO| < 1 μA;
VI = VSS or VDD
-
0.05
0.05
0.05
-1.7
-0.52
-1.3
-3.6
-
-
0.05
0.05
0.05
-1.4
-0.44
-1.1
-3.0
-
-
0.05
0.05
0.05
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-level output current VO = 2.5 V
-
-
-
-1.1 mA
-0.36 mA
-0.9 mA
-2.4 mA
VO = 4.6 V
VO = 9.5 V
5 V
-
-
-
10 V
15 V
5 V
-
-
-
VO = 13.5 V
-
-
-
IOL
LOW-level output current VO = 0.4 V
VO = 0.5 V
0.52
0.44
0.36
-
-
-
mA
mA
mA
10 V
15 V
15 V
5 V
1.3
-
1.1
-
0.9
VO = 1.5 V
3.6
-
3.0
-
2.4
II
input leakage current
supply current
VDD = 15 V
-
-
-
-
-
±0.3
20
40
80
-
-
-
-
-
-
±0.3
20
40
80
7.5
-
-
-
-
-
±1.0 μA
150 μA
300 μA
600 μA
IDD
IO = 0 A;
VI = VSS or VDD
10 V
15 V
-
CI
input capacitance
-
pF
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
4 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
11. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 °C; for test circuit see Fig. 5; unless otherwise specified.
Symbol Parameter
Conditions
VDD
5 V
Extrapolation formula
[1] 88 ns + (0.55 ns/pF)CL
34 ns + (0.23 ns/pF)CL
22 ns + (0.16 ns/pF)CL
[1] 98 ns + (0.55 ns/pF)CL
39 ns + (0.23 ns/pF)CL
22 ns + (0.16 ns/pF CL
[1] 113 ns + (0.55 ns/pF)CL
44 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
[1] 123 ns + (0.55 ns/pF)CL
44 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
[1] [2] 10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
Min
Typ
115
45
Max Unit
230 ns
90 ns
65 ns
250 ns
95 ns
65 ns
280 ns
105 ns
75 ns
295 ns
110 ns
75 ns
120 ns
60 ns
40 ns
tPHL
tPLH
tt
HIGH to LOW
propagation delay see Fig. 4
nAn to nYn;
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
10 V
15 V
5 V
30
nE to nYn;
see Fig. 4
125
50
10 V
15 V
5 V
30
LOW to HIGH
propagation delay see Fig. 4
nAn to nYn;
140
55
10 V
15 V
5 V
40
nE to nYn;
see Fig. 4
150
55
10 V
15 V
5 V
40
transition time
nYn; see Fig. 4
60
10 V
15 V
30
6 ns + (0.28 ns/pF)CL
20
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] Transition time tt is the same as the HIGH to LOW and LOW to HIGH transition times tTHL and tTLH
.
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol
Parameter
VDD
5 V
Typical formula for PD (μW)
Where:
2
PD
dynamic power
dissipation
PD = 4500 × fi + Σ(fo × CL) × VDD
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VDD = supply voltage in V;
2
2
10 V
15 V
PD = 18800 × fi + Σ(fo × CL) × VDD
PD = 45700 × fi + Σ(fo × CL) × VDD
Σ(fo × CL) = sum of the outputs.
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
5 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
11.1. Waveforms and test circuit
V
DD
V
M
nAn, nE input
GND
t
t
PHL
PLH
V
OH
90 %
nYn output
V
M
10 %
V
OL
t
t
THL
TLH
001aal114
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 4. Inputs nAn, nE to output nYn propagation delay and nYn output transition time
Table 9. Measurement points
Supply voltage
VDD
Input
VM
Output
VM
5 V to 15 V
0.5 × VDD
0.5 × VDD
t
W
V
I
90 %
90 %
negative
pulse
V
V
V
M
M
10 %
10 %
0 V
t
t
r
V
f
DD
t
t
f
r
V
V
O
I
V
I
G
DUT
90 %
90 %
positive
pulse
V
M
M
C
L
R
T
10 %
10 %
0 V
t
W
001aaj781
001aag182
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Fig. 5. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
Input
VI
Load
CL
tr = tf
5 V to 15 V
VDD
≤ 20 ns
50 pF
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
6 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
12. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
c
y
H
v
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.0100
0.0075
0.010 0.057
0.004 0.049
0.019
0.014
0.39
0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig. 6. Package outline SOT109-1 (SO16)
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
7 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
13. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
Military
HBM
MIL
MM
Machine Model
14. Revision history
Table 12. Revision history
Document ID
Release date
20220315
Data sheet status
Change notice
Supersedes
HEF4555B_Q100 v.3
Modifications:
Product data sheet
-
HEF4555B_Q100 v.2
•
Section 2 updated.
HEF4555B_Q100 v.2
Modifications:
20181015
Product data sheet
-
HEF4555B_Q100 v.1
•
•
The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
HEF4555B_Q100 v.1
20131021
Product data sheet
-
-
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
8 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
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data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
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Customers should provide appropriate design and operating safeguards to
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Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
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Nexperia does not accept any liability related to any default, damage, costs
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
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©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
9 / 10
Nexperia
HEF4555B-Q100
1-of-4 decoder/demultiplexer
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Ordering information....................................................1
5. Functional diagram.......................................................2
6. Pinning information......................................................2
6.1. Pinning.........................................................................2
6.2. Pin description.............................................................2
7. Functional description................................................. 3
8. Limiting values............................................................. 3
9. Recommended operating conditions..........................3
10. Static characteristics..................................................4
11. Dynamic characteristics.............................................5
11.1. Waveforms and test circuit........................................ 6
12. Package outline.......................................................... 7
13. Abbreviations..............................................................8
14. Revision history..........................................................8
15. Legal information........................................................9
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 March 2022
©
HEF4555B_Q100
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 3 — 15 March 2022
10 / 10
相关型号：
HEF4555BT-T
IC 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, PLASTIC, SOT-108, SO-14, Decoder/Driver
NXP
HEF4555BTD
IC 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, TRUE OUTPUT, PDSO16, PLASTIC, SOT-108, SO-14, Decoder/Driver
NXP
HEF4556BDF
IC 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16, SOT-74, CERDIP-16, Decoder/Driver
NXP
HEF4556BPN
IC 4000/14000/40000 SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDIP16, PLASTIC, SOT-38-1, DIP-16, Decoder/Driver
NXP
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