NHUMB13 [NEXPERIA]
80 V, 100 mA PNP/PNP resistor-equipped double transistorsProduction;型号: | NHUMB13 |
厂家: | Nexperia |
描述: | 80 V, 100 mA PNP/PNP resistor-equipped double transistorsProduction |
文件: | 总15页 (文件大小:292K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
Rev. 1 — 23 July 2020
Product data sheet
1. General description
PNP/PNP Resistor-Equipped double Transistor (RET) family in a very small SOT363 (SC-88)
Surface-Mounted Device (SMD) plastic package.
Table 1. Product overview
Type number
R1
kΩ
2.2
4.7
10
R2
kΩ
47
47
47
Package
JEITA
SC-88
NPN/NPN
complement:
NPN/PNP
complement:
Nexperia
NHUMB10
NHUMB13
NHUMB9
SOT363
NHUMH10
NHUMH13
NHUMH9
NHUMD10
NHUMD13
NHUMD9
2. Features and benefits
•
•
•
•
•
•
•
100 mA output current capability
High breakdown voltage
Built-in resistors
Simplifies circuit design
Reduces component count
Reduces pick and place costs
AEC-Q101 qualified
3. Applications
•
•
•
•
Digital applications
Cost saving alternative for BC856 series in digital applications
Controlling IC inputs
Switching loads
4. Quick reference data
Table 2. Quick reference data
Tamb = 25 °C unless otherwise specified.
Symbol
Per transistor
VCEO collector-emitter voltage
IO output current
Parameter
Conditions
Min
Typ
Max
Unit
open base
-
-
-
-
-80
V
-100
mA
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
5. Pinning information
Table 3. Pinning
Pin
1
Symbol
GND1
I1
Description
Simplified outline
Graphic symbol
O1 I2
GND2
GND (emitter) TR1
input (base) TR1
output (collector) TR2
GND (emitter) TR2
input (base) TR2
output (collector) TR1
6
5
4
2
3
O2
R1
R2
4
GND2
I2
TR2
1
2
3
TR1
R2
5
R1
6
O1
GND1
I1 O2
aaa-019790
6. Ordering information
Table 4. Ordering information
Type number
Package
Name
Description
Version
NHUMB10
NHUMB13
NHUMB9
SC-88
plastic surface-mounted package; 6 leads
SOT363
7. Marking
Table 5. Marking
Type number
Marking code [1]
NHUMB10
NHUMB13
NHUMB9
6B%
6D%
6A%
[1] % = placeholder for manufacturing site code
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
2 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
8. Limiting values
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Tamb = 25 °C unless otherwise specified.
Symbol
Per transistor
VCBO
Parameter
Conditions
Min
Max
Unit
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
-
-
-
-80
-80
-7
V
V
V
VCEO
VEBO
open collector
VI
NHUMB10
-20
-30
-40
-
+7
V
NHUMB13
+7
V
NHUMB9
+7
V
IO
output current
-100
235
mA
mW
Ptot
total power dissipation
Tamb ≤ 25 °C
Tamb ≤ 25 °C
[1]
[1]
-
Per device
Ptot
Tj
total power dissipation
junction temperature
ambient temperature
storage temperature
-
350
150
150
150
mW
°C
-
Tamb
Tstg
-55
-65
°C
°C
[1] Device mounted on an FR4 Printed-Circuit-Board (PCB); single-sided copper; tin-plated and standard footprint.
aaa-031893
400
P
tot
(mW)
300
200
100
0
-75
-25
25
75
125
175
(°C)
T
amb
FR4 PCB, single-sided copper, standard footprint
Fig. 1. Per device: Power derating curve SOT363 (SC-88)
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
3 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
9. Thermal characteristics
Table 7. Thermal characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from junction to ambient
in free air
[1]
[1]
-
-
-
-
532
150
K/W
K/W
Rth(j-sp)
Per device
Rth(j-a)
thermal resistance from junction to solder point
thermal resistance from junction to ambient
in free air
-
-
358
K/W
[1] Device mounted on an FR4 Printed-Circuit-Board (PCB); single-sided copper; tin-plated and standard footprint.
aaa-031894
3
10
duty cycle = 1
Z
th(j-a)
(K/W)
0.75
0.50
0.20
0.33
2
10
0.10
0.02
0.05
0.01
10
0
1
-5
10
-4
-3
-2
10
-1
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, single-sided copper, tin-plated and standard footprint
Fig. 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
NHUMB10_13_9_SER
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Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
4 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
10. Characteristics
Table 8. Characteristics
Tamb = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Per transistor
V(BR)CBO
collector-base
breakdown voltage
IC = -100 µA; IE = 0 A
IC = -2 mA; IB = 0 A
VCB = -80 V; IE = 0 A
-80
-80
-
-
-
-
-
-
V
V
V(BR)CEO
ICBO
collector-emitter
breakdown voltage
collector-base cut-off
current
-100 nA
-100 nA
ICEO
collector-emitter cut-off VCE = -60 V; IB = 0 A
current
-
-
-
-
VCE = -60 V; IB = 0 A; Tj = 150 °C
-5
µA
IEBO
emitter-base cut-off current
NHUMB10
NHUMB13
NHUMB9
VEB = -7 V; IC = 0 A
-
-
-
-
-
-
-270 µA
-260 µA
-230 µA
-
-
-
hFE
DC current gain
VCE = -5 V; IC = -10 mA
IC = -10 mA; IB = -0.5 mA
100
-
VCEsat
collector-emitter
-100 mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage
NHUMB10
VCE = -5 V ; IC = -100 µA
-
-595 -500 mV
-625 -500 mV
-690 -500 mV
NHUMB13
NHUMB9
on-state input voltage
NHUMB10
VCE = -0.3 V ; IC = -10 mA
-1.2
-1.4
-1.6
-0.81
-0.95
-1.22
-
-
-
V
V
V
NHUMB13
NHUMB9
bias resistor 1 (input)
NHUMB10
[1]
[1]
[2]
1.54 2.2
2.86 kΩ
NHUMB13
3.3
7
4.7
10
6.1
13
kΩ
kΩ
NHUMB9
R2/R1
bias resistor ratio
NHUMB10
17
8
21
10
4.7
150
-
26
12
5.7
-
NHUMB13
NHUMB9
3.7
-
fT
transition frequency
collector capacitance
VCE = -5 V; IC = -10 mA; f = 100 MHz
VCB = -10 V; IE = ie = 0 A; f = 1 MHz
MHz
pF
Cc
-
3
[1] See section "Test information" for resistor calculation and test conditions
[2] Characteristics of built-in transistor
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
5 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
aaa-031740
3
10
h
(1)
(2)
FE
aaa-031741
-0.10
I
= -0.6 mA
B
(3)
I
C
2
10
-0.54 mA
-0.42 mA
(A)
-0.08
-0.48 mA
-0.36 mA
-0.06
-0.04
-0.02
0
-0.30 mA
-0.18 mA
10
-0.24 mA
-0.12 mA
1
-10
-1
2
-1
-10
-10
I
(mA)
C
-0.06 mA
VCE = -5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
0
-1
-2
-3
-4
-5
V
(V)
CE
Tamb = 25 °C
Fig. 3. NHUMB10: DC current gain as a function of
collector current; typical values
Fig. 4. NHUMB10: Collector current as a function of
collector-emitter voltage; typical values
aaa-031742
aaa-031743
-10
-10
V
I(on)
(V)
V
I(off)
(V)
-1
-1
(1)
(2)
(1)
(2)
(3)
(3)
-1
-1
-10
-10
-1
2
-1
2
-10
-1
-10
-10
-10
-1
-10
-10
I
(mA)
I (mA)
C
C
VCE = -0.3 V
VCE = -5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 5. NHUMB10: On-state input voltage as a function Fig. 6. NHUMB10: Off-state input voltage as a function
of collector current; typical values
of collector current; typical values
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
6 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
aaa-031744
-1
aaa-031745
10
V
CEsat
(V)
C
(pF)
c
8
6
4
2
0
-1
-10
(1)
(2)
(3)
-2
-10
-1
2
-10
-1
-10
-10
I
(mA)
C
IC/IB = 20
0
-20
-40
-60
-80
V
(V)
CB
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
f = 1 MHz
Tamb = 25 °C
Fig. 7. NHUMB10: Collector-emitter saturation voltage Fig. 8. NHUMB10: Collector capacitance as a function
as a function of collector current; typical values
of collector-base voltage; typical values
aaa-031746
3
10
h
FE
(1)
(2)
(3)
aaa-031747
-0.10
I
= -0.70 mA
-0.56 mA
-0.42 mA
B
-0.63 mA
-0.49 mA
I
C
2
10
(A)
-0.08
-0.35 mA
-0.21 mA
-0.06
-0.04
-0.02
0
10
-0.28 mA
-0.14 mA
1
-1
-10
2
-1
-10
-10
I
(mA)
-0.07 mA
C
VCE = -5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
0
-1
-2
-3
-4
-5
V
(V)
CE
Tamb = 25 °C
Fig. 9. NHUMB13: DC current gain as a function of
collector current; typical values
Fig. 10. NHUMB13: Collector current as a function of
collector-emitter voltage; typical values
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
7 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
aaa-031748
aaa-031749
2
-10
-10
V
I(on)
(V)
V
I(off)
(V)
-10
-1
(1)
(2)
(1)
(2)
-1
-1
(3)
(3)
-1
-10
-10
-1
2
-1
2
-10
-1
-10
-10
-10
-1
-10
-10
I
(mA)
I (mA)
C
C
VCE = -0.3 V
VCE = -5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 11. NHUMB13: On-state input voltage as a function Fig. 12. NHUMB13: Off-state input voltage as a function
of collector current; typical values of collector current; typical values
aaa-031750
-1
aaa-031751
10
V
CEsat
(V)
C
(pF)
c
8
-1
-10
6
4
2
0
(1)
(2)
(3)
-2
-10
-1
2
-10
-1
-10
-10
I
(mA)
C
IC/IB = 20
0
-20
-40
-60
-80
V
(V)
CB
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
f = 1 MHz
Tamb = 25 °C
Fig. 13. NHUMB13: Collector-emitter saturation voltage Fig. 14. NHUMB13: Collector capacitance as a function
as a function of collector current; typical values
of collector-base voltage; typical values
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
8 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
aaa-031752
3
10
h
(1)
(2)
FE
aaa-031753
-0.10
I
= -0.650 mA
-0.520 mA
-0.390 mA
B
I
(3)
C
2
10
-0.585 mA
-0.455 mA
(A)
-0.08
-0.325 mA
-0.195 mA
-0.06
-0.04
-0.02
0
10
-0.260 mA
-0.130 mA
1
-10
-1
2
-1
-10
-10
I
(mA)
-0.065 mA
-4
C
VCE = -5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
0
-1
-2
-3
-5
V
(V)
CE
Tamb = 25 °C
Fig. 15. NHUMB9: DC current gain as a function of
collector current; typical values
Fig. 16. NHUMB9: Collector current as a function of
collector-emitter voltage; typical values
aaa-031754
aaa-031755
2
-10
-10
V
I(on)
(V)
V
I(off)
(V)
-10
(1)
(2)
-1
(1)
(2)
-1
-1
(3)
(3)
-1
-10
-10
-1
2
-1
2
-10
-1
-10
-10
-10
-1
-10
-10
I
(mA)
I (mA)
C
C
VCE = -0.3 V
VCE = -5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 17. NHUMB9: On-state input voltage as a function
of collector current; typical values
Fig. 18. NHUMB9: Off-state input voltage as a function
of collector current; typical values
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
9 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
aaa-031756
-1
aaa-031757
7
C
(pF)
V
c
CEsat
(V)
6
5
4
3
2
1
0
-1
-10
(1)
(2)
(3)
-2
-10
-1
2
-10
-1
-10
-10
I
(mA)
C
IC/IB = 20
0
-20
-40
-60
-80
V
(V)
CB
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
f = 1 MHz
Tamb = 25 °C
Fig. 19. NHUMB9: Collector-emitter saturation voltage
as a function of collector current; typical values
Fig. 20. NHUMB9: Collector capacitance as a function of
collector-base voltage; typical values
aaa-031554
3
10
f
T
(MHz)
2
10
10
-1
-10
2
-1
-10
-10
I
(mA)
C
f = 100 MHz
VCE = -5 V
Tamb = 25 °C
Fig. 21. Transition frequency as a function of collector current; typical values of built-in transistor
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
10 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
11. Test information
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
Resistor calculation
•
Calculation of bias resistor 1 (R1)
•
Calculation of bias resistor ratio (R2/R1)
n.c.
I
I
; I
I1 I2
R1
; I
I3 I4
R2
GND
aaa-020083
Fig. 22. PNP transistor: Resistor test circuit
Resistor test conditions
Table 9. Resistor test conditions
Type number
R1 (kΩ)
R2 (kΩ)
Test conditions
II1
II2
II3
II4
Per transistor
NHUMB10
NHUMB13
NHUMB9
2.2
4.7
10
47
47
47
-1.6 mA
-1.2 mA
-0.8 mA
-2.4 mA
-1.8 mA
-1.1 mA
55 μA
55 μA
55 μA
105 μA
105 μA
105 μA
©
NHUMB10_13_9_SER
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Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
11 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
12. Package outline
2.2
1.8
1.1
0.8
0.45
0.15
6
5
4
2.2 1.35
2.0 1.15
pin 1
index
1
2
3
0.25
0.10
0.3
0.2
0.65
1.3
Dimensions in mm
14-10-03
Fig. 23. Package outline SOT363 (SC-88)
13. Soldering
2.65
solder lands
solder resist
0.4 (2×)
1.5
2.35
0.6
(4×)
0.5
(4×)
solder paste
0.5
(4×)
0.6
(2×)
occupied area
0.6
(4×)
Dimensions in mm
1.8
sot363_fr
Fig. 24. Reflow soldering footprint for SOT363 (SC-88)
1.5
solder lands
solder resist
occupied area
2.5
0.3
4.5
1.5
Dimensions in mm
preferred transport
direction during soldering
1.3
1.3
2.45
5.3
sot363_fw
Fig. 25. Wave soldering footprint for SOT363 (SC-88)
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
12 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
14. Revision history
Table 10. Revision history
Data sheet ID
Release date Data sheet status Change
Supersedes
notice
NHUMB10_13_9_SER v.1
20200723
Product data sheet
-
-
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
13 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
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©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
14 / 15
Nexperia
NHUMB10/13/9 series
80 V, 100 mA PNP/PNP resistor-equipped double transistors
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................5
11. Test information........................................................11
12. Package outline........................................................ 12
13. Soldering................................................................... 12
14. Revision history........................................................13
15. Legal information......................................................14
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 23 July 2020
©
NHUMB10_13_9_SER
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 1 — 23 July 2020
15 / 15
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