NUP1301QA-Q [NEXPERIA]

Ultra low capacitance ESD protection arrayProduction;
NUP1301QA-Q
型号: NUP1301QA-Q
厂家: Nexperia    Nexperia
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Ultra low capacitance ESD protection arrayProduction

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NUP1301QA-Q  
Ultra low capacitance ESD protection array  
4 July 2022  
Product data sheet  
1. General description  
Ultra low capacitance ElectroStatic Discharge (ESD) protection array in a leadless ultra small  
DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and  
solderable side pads, designed to protect one signal line in rail-to-rail configuration from the  
damage caused by ESD and other transients.  
2. Features and benefits  
ESD protection of one signal line (rail-to-rail configuration)  
Ultra low diode capacitance: Cd = 2.3 pF  
Very low reverse leakage current: ≤ 30 nA  
ESD protection up to 30 kV  
ESD robustness exceeds IEC 61000-4-2; level 4 (ESD)  
IEC 61000-4-5 (surge); IPPM = 11 A at tp = 8/20 μs  
Qualified according to AEC-Q101 and recommended for use in automotive applications  
3. Applications  
Telecommunication networks  
Video line protection  
Microcontroller protection  
I2C-bus protection  
Antenna power supply  
Analog audio  
Class-D amplifier  
4. Quick reference data  
Table 1. Quick reference data  
Symbol  
Parameter  
Conditions  
Min  
Typ  
-
Max  
80  
Unit  
V
VR  
IR  
reverse voltage  
reverse current  
Tamb = 25 °C  
-
-
-
-
VR = 25 V; Tamb = 25 °C  
VR = 80 V; Tamb = 25 °C  
7
30  
nA  
nA  
pF  
50  
0.5  
500  
0.75  
Cd  
diode capacitance  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 1 - pin 3  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 2 - pin 3  
-
-
1.8  
2.3  
2
pF  
pF  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 3 - pins 1 and 2  
2.75  
 
 
 
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
5. Pinning information  
Table 2. Pinning information  
Pin  
1
Symbol  
A1  
Description  
Simplified outline  
Graphic symbol  
anode (diode 1)  
cathode (diode 2)  
3
2
K2  
A1  
4
3
K1, A2  
cathode (diode 1) and  
anode (diode 2)  
K1, A2  
4
K1, A2  
cathode (diode1) and  
anode (diode2)  
1
2
K2  
Transparent top view  
aaa-022858  
DFN1010D-3 (SOT1215)  
6. Ordering information  
Table 3. Ordering information  
Type number  
Package  
Name  
Description  
Version  
NUP1301QA-Q  
DFN1010D-3 plastic, leadless thermal enhanced ultra thin small outline SOT1215  
package with side-wettable flanks (SWF); 3 terminals; 0.75  
mm pitch; 1.1 mm x 1 mm x 0.37 mm body  
7. Marking  
Table 4. Marking codes  
Type number  
Marking code  
X
NUP1301QA-Q  
011  
READING  
DIRECTION  
MARKING CODE  
(EXAMPLE)  
YEAR DATE  
CODE  
VENDOR CODE  
PIN 1  
INDICATION MARK  
MARK-FREE AREA  
READING EXAMPLE:  
11  
01  
10  
aaa-008041  
Fig. 1. DFN1010D-3 (SOT1215) binary marking code description  
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
2 / 13  
 
 
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
Parameter  
Conditions  
Min  
Max  
80  
Unit  
V
VR  
IF  
reverse voltage  
forward current  
Tamb = 25 °C  
-
-
pulsed; tp ≤ 300 µs; δ ≤ 0.02;  
290  
mA  
single diode loaded; Tamb = 25 °C  
pulsed; tp ≤ 300 µs; δ ≤ 0.02;  
double diode loaded; Tamb = 25 °C  
-
-
170  
700  
mA  
mA  
IFRM  
repetitive peak forward  
current  
tp ≤ 500 µs; δ ≤ 0.25; Tj = 25 °C  
IPPM  
IFSM  
rated peak pulse current tp = 8/20 μs  
[1] [2]  
-
11  
A
non-repetitive peak  
forward current  
square wave; tp = 100 µs  
-
4
A
square wave; tp = 1 ms  
square wave; tp = 1 s  
-
1.5  
0.5  
150  
150  
150  
A
-
A
Tj  
junction temperature  
ambient temperature  
storage temperature  
-
°C  
°C  
°C  
Tamb  
Tstg  
-55  
-65  
ESD maximum ratings  
VESD electrostatic discharge  
voltage  
IEC 61000-4-2 (contact discharge)  
[2] [3]  
-
30  
kV  
[1] Non-repetitive current pulse 8/20 μs exponential decay waveform according to IEC 61000-4-5.  
[2] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).  
[3] Device stressed with ten non-repetitive ESD pulses.  
001aaa630  
I
PP  
120  
100 %  
90 %  
100 % I ; 8 µs  
PP  
I
PP  
(%)  
80  
-t  
e
50 % I ; 20 µs  
PP  
40  
10 %  
t
t = 0.6 ns to 1 ns  
r
0
0
10  
20  
30  
40  
30 ns  
60 ns  
t (µs)  
001aaa631  
Fig. 3. ESD pulse waveform according to  
IEC 61000-4-2  
Fig. 2. 8/20 µs pulse waveform according to  
IEC 61000-4-5  
©
NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
3 / 13  
 
 
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NUP1301QA-Q  
Ultra low capacitance ESD protection array  
9. Characteristics  
Table 6. Characteristics  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
715  
855  
1
Unit  
mV  
mV  
V
VF  
forward voltage  
IF = 1 mA; Tamb = 25 °C  
IF = 10 mA; Tamb = 25 °C  
IF = 50 mA; Tamb = 25 °C; Pulse  
IF = 150 mA; Tamb = 25 °C  
IR = 0.1 mA; Tamb = 25 °C  
VR = 25 V; Tamb = 25 °C  
VR = 80 V; Tamb = 25 °C  
VR = 25 V; Tj = 150 °C  
VR = 80 V; Tj = 150 °C  
[1]  
[1]  
[1]  
[1]  
-
-
-
-
-
-
-
-
1.25  
-
V
VBR  
IR  
breakdown voltage  
reverse current  
100  
-
V
-
-
-
-
-
7
30  
nA  
nA  
µA  
µA  
pF  
50  
-
500  
30  
-
150  
0.75  
Cd  
diode capacitance  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 1 - pin 3  
0.5  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 2 - pin 3  
-
-
1.8  
2.3  
2
pF  
pF  
f = 1 MHz; VR = 0 V; Tamb = 25 °C;  
Pin 3 - pins 1 and 2  
2.75  
VCL  
clamping voltage  
IPP = 1 A; Tamb = 25 °C  
[2] [3]  
[2] [3]  
-
-
-
-
-
3
10  
-
V
V
Ω
Ω
IPP = 11 A; Tamb = 25 °C  
-
Rdyn  
dynamic resistance  
TLP = 10 A; positive; Tamb = 25 °C  
TLP = 10 A; negative; Tamb = 25 °C  
0.55  
0.3  
-
[1] Pulse test: tp ≤ 300 μs; δ ≤ 0.02.  
[2] Non-repetitive current pulse 8/20 μs exponential decay waveform according to IEC 61000-4-5.  
[3] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).  
aaa-021945  
aaa-020909  
1
10  
I
F
(A)  
I
FSM  
(A)  
-1  
10  
(1)  
(2)  
-2  
-3  
-4  
10  
10  
10  
1
(3)  
(4)  
-1  
10  
-1  
2
3
0.0  
0.5  
1.0  
1.5  
2.0  
10  
1
10  
10  
10  
V
(V)  
t (ms)  
p
F
(1) Tj = 150 °C  
(2) Tj = 85 °C  
(3) Tj = 25 °C  
(4) Tj = −40 °C  
Based on square wave currents.  
Tamb = 25 °C  
Fig. 5. Non-repetitive forward current as a function of  
pulse duration; maximum values  
Fig. 4. Forward current as a function of forward  
voltage; typical values  
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NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
4 / 13  
 
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
aaa-020907  
aaa-020908  
-3  
10  
2.0  
I
R
(A)  
C
(pF)  
d
-4  
-5  
-6  
-7  
-8  
-9  
10  
10  
10  
10  
10  
10  
(1)  
(2)  
1.5  
(3)  
(4)  
1.0  
0.5  
0.0  
(5)  
-10  
10  
10  
-11  
0
20  
40  
60  
80  
100  
0
5
10  
15  
20  
25  
V
(V)  
V (V)  
R
R
(1) Tj = 150 °C  
(2) Tj = 125 °C  
(3) Tj = 85 °C  
(4) Tj = 25 °C  
(5) Tj = −40 °C  
f = 1 MHz; Tamb = 25 °C; pin 2 to GND  
Fig. 7. Diode capacitance as a function of reverse  
voltage; typical values  
Fig. 6. Reverse current as a function of reverse  
voltage; typical values  
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
5 / 13  
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
ESD TESTER  
4 GHz DIGITAL  
acc. to IEC 61000-4-2  
OSCILLOSCOPE  
C
= 150 pF; R = 330 Ω  
Z
Z
RG 223/U  
50 Ω coax  
R
Z
450 Ω  
10x  
ATTENUATOR  
C
Z
50 Ω  
DUT  
(DEVICE  
UNDER  
TEST)  
vertical scale = 10 V/div  
vertical scale = 10 A/div  
horizontal scale = 15 ns/div  
horizontal scale = 15 ns/div  
GND  
GND  
clamped +8 kV ESD pulse waveform  
(IEC 61000-4-2 network), pin 3 to 1 and 2  
unclamped +8 kV ESD pulse waveform  
(IEC 61000-4-2 network)  
vertical scale = 10 V/div  
horizontal scale = 15 ns/div  
vertical scale = 10 A/div  
horizontal scale = 15 ns/div  
GND  
GND  
clamped -8 kV ESD pulse waveform  
(IEC 61000-4-2 network), pin 3 to 1 and 2  
unclamped -8 kV ESD pulse waveform  
(IEC 61000-4-2 network)  
aaa-027349  
Fig. 8. ESD clamping test setup and waveforms  
©
NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
6 / 13  
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
aaa-027350  
aaa-027351  
30  
PP  
(A)  
0
I
I
PP  
(A)  
25  
-5  
20  
15  
10  
5
-10  
-15  
-20  
-25  
-30  
0
0
5
10  
15  
20  
25  
V
30  
(V)  
-30  
-25  
-20  
-15  
-10  
-5  
V
0
(V)  
CL  
CL  
tp = 100 ns; Transmission Line Pulse (TLP)  
tp = 100 ns; Transmission Line Pulse (TLP)  
Fig. 9. Positive clamping voltage (TLP); typical values Fig. 10. Negative clamping voltage (TLP); typical values  
©
NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
7 / 13  
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
10. Application information  
Protection of a single (high-speed) data line in rail-to-rail configuration. The protected data line is  
connected to pin 3. Pin 1 is connected to ground (GND) and pin 2 is connected to the supply rail  
(supply voltage VCC.) When the transient voltage exceeds the forward voltage drop of one diode,  
the transient is directed either to the supply rail or to GND. The advantages of these solutions are:  
low line capacitance (0.6 pF typically), fast response time, and low clamping voltage.  
V
V
CC  
CC  
D1  
ESD protection array  
Audio  
interface  
D2  
ESD protection array  
006aab568  
Fig. 11. Typical application for the protection of one signal line  
Circuit board layout and protection device placement  
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge  
transients. The following guidelines are recommended:  
1. Place the device as close to the input terminal or connector as possible.  
2. Minimize the path length between the device and the protected line.  
3. Keep parallel signal paths to a minimum.  
4. Avoid running protected conductors in parallel with unprotected conductors.  
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops.  
6. Minimize the length of the transient return path to ground.  
7. Avoid using shared transient return paths to a common ground point.  
8. Use ground planes whenever possible. For multilayer PCBs, use ground vias.  
11. Test information  
Quality information  
This product has been qualified in accordance with the Automotive Electronics Council (AEC)  
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in  
automotive applications.  
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
8 / 13  
 
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
12. Package outline  
DFN1010D-3: plastic thermal enhanced ultra thin small outline package; no leads;  
3 terminals; body: 1.1 x 1.0 x 0.37 mm  
SOT1215  
visible depend upon  
used manufacturing  
technology (2x)  
visible depend upon  
solderable lead  
end, protrusion  
max. 0.02 mm (3x)  
used manufacturing  
technology (4x)  
e
pin 1  
index area  
b (2x)  
1
2
L (2x)  
E
E
1
e
1
L
1
3
D
A
b
1
1
A
D
1
0
1 mm  
scale  
Dimensions (mm are the original dimensions)  
Unit  
A
A
b
b
D
D
1
E
E
e
e
1
L
L
1
1
1
1
min 0.34  
0.22 0.245 1.05 0.87 0.95 0.16  
0.25 0.275 1.10 0.90 1.00 0.19 0.75 0.1 0.20 0.225  
0.40 0.04 0.30 0.325 1.15 0.95 1.05 0.24 0.25 0.275  
0.17 0.195  
nom  
max  
mm  
0.37  
Note  
1. Dimension A is including plating thickness.  
sot1215_po  
References  
Outline  
version  
IEC  
European  
projection  
Issue date  
JEDEC  
JEITA  
13-03-05  
13-03-06  
SOT1215  
Fig. 12. Package outline DFN1010D-3 (SOT1215)  
©
NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
9 / 13  
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
13. Soldering  
Footprint information for reflow soldering of DFN1010D-3 package  
SOT1215  
1.2  
0.45 (2x)  
0.35 (2x)  
0.3  
1.1  
0.25 (2x)  
0.4  
0.75  
0.3 0.4  
0.5  
0.4  
0.5  
0.5 1.3  
1.5 1.4  
0.3 0.4  
0.3  
0.4  
0.5  
1.3  
solder land  
solder land plus solder paste  
solder resist  
occupied area  
Dimensions in mm  
12-11-23  
Issue date  
sot1215_fr  
13-03-06  
Fig. 13. Reflow soldering footprint for DFN1010D-3 (SOT1215)  
©
NUP1301QA-Q  
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Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
10 / 13  
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
14. Revision history  
Table 7. Revision history  
Data sheet ID  
Release date  
20220704  
Data sheet status  
Change notice  
Supersedes  
NUP1301QA-Q v.1  
Product data sheet  
-
-
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
11 / 13  
 
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NUP1301QA-Q  
Ultra low capacitance ESD protection array  
equipment, nor in applications where failure or malfunction of an Nexperia  
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15. Legal information  
Data sheet status  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
[1][2]  
status [3]  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
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Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
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has been qualified for use in automotive applications. Unless otherwise  
agreed in writing, the product is not designed, authorized or warranted to  
be suitable for use in life support, life-critical or safety-critical systems or  
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
12 / 13  
 
Nexperia  
NUP1301QA-Q  
Ultra low capacitance ESD protection array  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Applications.................................................................. 1  
4. Quick reference data....................................................1  
5. Pinning information......................................................2  
6. Ordering information....................................................2  
7. Marking..........................................................................2  
8. Limiting values............................................................. 3  
9. Characteristics..............................................................4  
10. Application information............................................. 8  
11. Test information..........................................................8  
12. Package outline.......................................................... 9  
13. Soldering................................................................... 10  
14. Revision history........................................................11  
15. Legal information......................................................12  
© Nexperia B.V. 2022. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 4 July 2022  
©
NUP1301QA-Q  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2022. All rights reserved  
Product data sheet  
4 July 2022  
13 / 13  

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