PBSS4520X [NEXPERIA]
20 V, 5 A NPN low VCEsat (BISS) transistorProduction;
| 型号： | PBSS4520X |
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Nexperia |
| 描述： | 20 V, 5 A NPN low VCEsat (BISS) transistorProduction 开关 晶体管 |
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DISCRETE SEMICONDUCTORS
DATA SHEET
ook, halfpage
PBSS4520X
20 V, 5 A
NPN low VCEsat (BISS) transistor
Product data sheet
2004 Nov 08
Supersedes data of 2004 Jun 11
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
FEATURES
QUICK REFERENCE DATA
• High hFE and low VCEsat at high current operation
• High collector current capability: IC maximum 5 A
• Higher efficiency leading to less heat generation.
SYMBOL
VCEO
IC
PARAMETER
MAX. UNIT
collector-emitter voltage
collector current (DC)
peak collector current
equivalent on-resistance
20
5
V
A
ICM
10
44
A
APPLICATIONS
RCEsat
mΩ
• Medium power peripheral drivers, e.g. fans and motors
• Strobe flash units for DSC and mobile phones
• Inverter applications, e.g. TFT displays
• Power switch for LAN and ADSL systems
• Medium power DC-to-DC conversion
• Battery chargers.
PINNING
PIN
1
DESCRIPTION
emitter
collector
base
2
3
DESCRIPTION
NPN low VCEsat BISS transistor in a SOT89 (SC-62) plastic
package.
PNP complement: PBSS5520X.
2
MARKING
3
TYPE NUMBER
PBSS4520X
Note
MARKING CODE(1)
1
*1F
sym042
3
2
1
1. * = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China.
Fig.1 Simplified outline (SOT89) and symbol.
ORDERING INFORMATION
PACKAGE
DESCRIPTION
TYPE NUMBER
NAME
VERSION
SOT89
PBSS4520X
SC-62
plastic surface mounted package; collector pad for good heat
transfer; 3 leads
2004 Nov 08
2
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
collector-base voltage
CONDITIONS
open emitter
MIN.
MAX.
20
UNIT
VCBO
VCEO
VEBO
IC
−
−
−
−
−
−
−
−
V
V
V
A
A
A
A
A
collector-emitter voltage
emitter-base voltage
collector current (DC)
repetitive peak collector current
peak collector current
base current (DC)
open base
20
5
open collector
5
ICRM
ICM
notes 1 and 2
7
tp ≤ 1 ms
10
1
IB
IBM
peak base current
tp ≤ 1 ms
Tamb ≤ 25 °C
notes 1 and 2
note 2
2
Ptot
total power dissipation
−
−
−
−
−
2.5
W
W
W
W
W
0.55
1
note 3
note 4
1.4
note 5
1.6
Tstg
Tj
storage temperature
junction temperature
ambient temperature
−65
−
+150
150
+150
°C
°C
°C
Tamb
−65
Notes
1. Operated under pulsed conditions: pulse width tp ≤ 10 ms; duty cycle δ ≤ 0.2.
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2.
5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other
mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”.
2004 Nov 08
3
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
001aaa229
1600
(1)
(2)
P
(mW)
tot
1200
800
400
0
(3)
−50
0
50
100
150
T
200
(°C)
amb
(1) FR4 PCB; 6 cm2 mounting pad for collector.
(2) FR4 PCB; 1 cm2 mounting pad for collector.
(3) FR4 PCB; standard footprint.
Fig.2 Power derating curves.
2004 Nov 08
4
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient
in free air
notes 1 and 2
note 2
50
225
125
90
K/W
K/W
K/W
K/W
K/W
K/W
note 3
note 4
note 5
80
Rth(j-s)
thermal resistance from junction to soldering point
16
Notes
1. Operated under pulsed conditions: pulse width tp ≤ 10 ms; duty cycle δ Š≤ 0.2.
2. Device mounted on a printed-circuit board, single-sided copper, tin-plated and standard footprint.
3. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 1 cm2.
4. Device mounted on a printed-circuit board, single-sided copper, tin-plated and mounting pad for collector 6 cm2.
5. Device mounted on a 7 cm2 ceramic printed-circuit board, 1 cm2 single-sided copper and tin-plated. For other
mounting conditions, see “Thermal considerations for SOT89 in the General Part of associated Handbook”.
006aaa232
3
10
Z
th
(1)
(K/W)
(2)
(3)
(4)
(5)
2
10
(6)
(7)
(8)
(9)
10
(10)
1
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; standard footprint.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.3 Transient thermal impedance as a function of pulse time; typical values.
2004 Nov 08
5
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
006aaa233
3
10
Z
th
(K/W)
(1)
2
10
(2)
(4)
(3)
(5)
(6)
(7)
10
(8)
(9)
1
(10)
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; mounting pad for collector 1 cm2.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.4 Transient thermal impedance as a function of pulse time; typical values.
006aaa234
3
10
Z
th
(K/W)
2
(1)
(3)
10
(2)
(4)
(5)
(6)
10
(7)
(8)
(9)
1
(10)
−1
10
10
−5
−4
−3
−2
−1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
Mounted on FR4 printed-circuit board; mounting pad for collector 6 cm2.
(1) δ = 1.
(3) δ = 0.5.
(5) δ = 0.2.
(6) δ = 0.1.
(7) δ = 0.05.
(8) δ = 0.02.
(9) δ = 0.01.
(10) δ = 0.
(2) δ = 0.75.
(4) δ = 0.33.
Fig.5 Transient thermal impedance as a function of pulse time; typical values.
6
2004 Nov 08
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
CHARACTERISTICS
Tamb = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VCB = 20 V; IE = 0 A
MIN.
TYP. MAX. UNIT
ICBO
collector-base cut-off current
−
−
−
−
−
100
50
nA
μA
nA
nA
VCB = 20 V; IE = 0 A; Tj = 150 °C
−
−
−
IEBO
ICES
hFE
emitter-base cut-off current
VEB = 5 V; IC = 0 A
100
100
collector-emitter cut-off current VCE = 20 V; VBE = 0 V
DC current gain
VCE = 2 V
IC = 0.5 A
300
300
250
200
−
450
440
420
380
35
−
IC = 1 A; note 1
−
IC = 2 A; note 1
−
IC = 5 A; note 1
−
VCEsat
collector-emitter saturation
voltage
IC = 0.5 A; IB = 5 mA
IC = 1 A; IB = 10 mA
IC = 2.5 A; IB = 125 mA; note 1
IC = 4 A; IB = 200 mA; note 1
IC = 5 A; IB = 500 mA; note 1
IC = 5 A; IB = 500 mA; note 1
50
70
120
180
220
44
1.05
1.1
0.85
−
mV
mV
mV
mV
mV
mΩ
V
−
50
−
85
−
130
160
32
−
RCEsat
VBEsat
equivalent on-resistance
−
base-emitter saturation voltage IC = 4 A; IB = 200 mA; note 1
IC = 5 A; IB = 500 mA; note 1
−
0.9
0.96
0.74
125
−
V
VBEon
fT
base-emitter turn-on voltage
transition frequency
VCE = 2 V; IC = 2 A
−
V
IC = 100 mA; VCE = 10 V;
f = 100 MHz
100
MHz
Cc
collector capacitance
VCB = 10 V; IE = ie = 0 A; f = 1 MHz
−
90
110
pF
Note
1. Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
2004 Nov 08
7
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
001aaa746
001aaa750
1000
1.2
h
FE
V
BE
800
(V)
0.8
(1)
(2)
600
400
200
0
0.4
(3)
0
10
−1
2
3
4
−1
2
3
4
10
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
VCE = 2 V.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(3) Tamb = −55 °C.
VCE = 2 V.
amb = 25 °C.
T
Fig.6 DC current gain as a function of collector
current; typical values.
Fig.7 Base-emitter voltage as a function of
collector current; typical values.
001aaa747
001aaa748
3
3
10
10
V
CEsat
V
CEsat
(mV)
(mV)
2
10
2
10
(1)
(3)
(2)
(1)
(2)
10
(3)
10
1
−1
10
1
10
10
−1
2
3
4
−1
2
3
4
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20.
Tamb = 25 °C.
(1) IC/IB = 100.
(2) IC/IB = 50.
(3) IC/IB = 10.
(1) Tamb = 100 °C.
(2) Tamb = −55 °C.
(3)
Tamb = 25 °C.
Fig.8 Collector-emitter saturation voltage as a
function of collector current; typical values.
Fig.9 Collector-emitter saturation voltage as a
function of collector current; typical values.
2004 Nov 08
8
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
001aaa749
001aaa878
1.2
1.2
V
V
BE
BEsat
(V)
(V)
(1)
(2)
(3)
(1)
(2)
0.8
0.4
0
0.8
(3)
0.4
0
10
−1
2
3
4
−1
2
3
4
10
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20.
VCE = 2 V.
(1) Tamb = −55 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
(1) Tamb = −55 °C.
(2) Tamb = 25 °C.
(3) Tamb = 100 °C.
Fig.10 Base-emitter saturation voltage as a
Fig.11 Base-emitter voltage as a function of
collector current; typical values.
function of collector current; typical values.
001aaa879
001aaa745
2
250
10
I
C
R
CEsat
(mA)
(Ω)
(6) (5) (4) (3) (2) (1)
200
10
1
(7)
(8)
150
100
50
(9)
(10)
−1
10
(1)
(3)
(2)
−2
10
10
0
−1
2
3
4
1
10
10
10
10
(mA)
0
0.4
0.8
1.2
1.6
V
2
I
(V)
C
CE
IC/IB = 20.
Tamb = 25 °C.
(4) IB = 3.5 mA.
(5) IB = 3 mA.
(8) IB = 1.5 mA.
(9) IB = 1 mA.
(10) IB = 0.5 mA.
(1) Tamb = 100 °C.
(2) Tamb = 25 °C.
(1) IB = 5 mA.
(2)
I
B = 4.5 mA.
(6)
IB = 2.5 mA.
(3)
Tamb = −55 °C.
(3) IB = 4 mA.
(7) IB = 2 mA.
Fig.12 Collector current as a function of
collector-emitter voltage; typical values.
Fig.13 Equivalent on-resistance as a function of
collector current; typical values.
2004 Nov 08
9
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
Reference mounting conditions
handbook, halfpage
32 mm
32 mm
10 mm
2.5 mm
40
mm
40 mm
10 mm
1 mm
3 mm
1 mm
2.5 mm
0.5 mm
2.5 mm
1 mm
0.5 mm
5 mm
5 mm
3.96 mm
3.96 mm
1.6 mm
1.6 mm
MLE322
001aaa234
Fig.14 FR4, standard footprint.
Fig.15 FR4, mounting pad for collector 1 cm2.
32 mm
30 mm
20
mm
40
mm
2.5 mm
0.5 mm
1 mm
5 mm
3.96 mm
1.6 mm
001aaa235
Fig.16 FR4, mounting pad for collector 6 cm2.
2004 Nov 08
10
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
PACKAGE OUTLINE
Plastic surface-mounted package; collector pad for good heat transfer; 3 leads
SOT89
B
A
D
b
p3
E
H
E
L
p
1
2
3
c
b
p2
w
M
b
p1
e
1
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
b
b
b
c
D
E
e
e
H
E
L
p
w
p1
p2
p3
1
1.6
1.4
0.48
0.35
0.53
0.40
1.8
1.4
0.44
0.23
4.6
4.4
2.6
2.4
4.25
3.75
1.2
0.8
mm
3.0
1.5
0.13
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
04-08-03
06-03-16
SOT89
TO-243
SC-62
2004 Nov 08
11
NXP Semiconductors
Product data sheet
20 V, 5 A
NPN low VCEsat (BISS) transistor
PBSS4520X
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
Product data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DISCLAIMERS
the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions
above those given in the Characteristics sections of this
document is not implied. Exposure to limiting values for
extended periods may affect device reliability.
General ⎯ Information in this document is believed to be
accurate and reliable. However, NXP Semiconductors
does not give any representations or warranties,
expressed or implied, as to the accuracy or completeness
of such information and shall have no liability for the
consequences of use of such information.
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products are sold subject to the general terms and
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http://www.nxp.com/profile/terms, including those
pertaining to warranty, intellectual property rights
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case of any inconsistency or conflict between information
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reserves the right to make changes to information
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Applications ⎯ Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
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specified use without further testing or modification.
Quick reference data ⎯ The Quick reference data is an
extract of the product data given in the Limiting values and
Characteristics sections of this document, and as such is
not complete, exhaustive or legally binding.
Limiting values ⎯ Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) may cause permanent damage to
2004 Nov 08
12
NXP Semiconductors
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal
definitions and disclaimers. No changes were made to the technical content, except for package outline
drawings which were updated to the latest version.
Contact information
For additional information please visit: http://www.nxp.com
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© NXP B.V. 2009
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R75/03/pp13
Date of release: 2004 Nov 08
Document order number: 9397 750 13884
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