PBSS5330PAS [NEXPERIA]

30 V, 3 A PNP low VCEsat (BISS) transistorProduction;
PBSS5330PAS
型号: PBSS5330PAS
厂家: Nexperia    Nexperia
描述:

30 V, 3 A PNP low VCEsat (BISS) transistorProduction

开关 光电二极管 晶体管
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PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
11 September 2014  
Product data sheet  
1. General description  
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor, encapsulated in an ultra  
thin DFN2020D-3 (SOT1061D) leadless small Surface-Mounted Device (SMD) plastic  
package with medium power capability and visible and soldarable side pads.  
NPN complement: PBSS4330PAS  
2. Features and benefits  
Low collector-emitter saturation voltage VCEsat  
High collector current capability IC and ICM  
High collector current gain (hFE) at high IC  
High efficiency due to less heat generation  
High temperature applications up to 175 °C  
Reduced Printed-Circuit Board (PCB) area requirements  
Leadless small SMD plastic package with soldarable side pads  
Exposed heat sink for excellent thermal and electrical conductivity  
Suitable for Automatic Optical Inspection (AOI) of solder joint  
AEC-Q101 qualified  
3. Applications  
Loadswitch  
Battery-driven devices  
Power management  
Charging circuits  
Power switches (e.g. motors, fans)  
4. Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
VCEO  
collector-emitter  
voltage  
open base  
-
-
-30  
V
IC  
collector current  
-
-
-
-
-3  
A
ICM  
peak collector current single pulse; tp ≤ 1 ms  
-
-5  
A
RCEsat  
collector-emitter  
IC = -3 A; IB = -300 mA; pulsed;  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
75  
107  
mΩ  
saturation resistance  
 
 
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
5. Pinning information  
Table 2.  
Pin  
Pinning information  
Symbol Description  
Simplified outline  
Graphic symbol  
3
1
2
3
B
E
C
base  
3
emitter  
collector  
1
2
sym013  
1
2
Transparent top view  
DFN2020D-3 (SOT1061D)  
6. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PBSS5330PAS  
DFN2020D-3 DFN2020D-3: plastic thermal enhanced ultra thin small outline  
package; no leads; 3 terminals; body 2 x 2 x 0.65 mm  
SOT1061D  
7. Marking  
Table 4.  
Marking codes  
Type number  
Marking code  
PBSS5330PAS  
E2  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
2 / 18  
 
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VCBO  
VCEO  
VEBO  
IC  
Parameter  
Conditions  
open emitter  
open base  
Min  
Max  
-30  
-30  
-6  
Unit  
V
collector-base voltage  
collector-emitter voltage  
emitter-base voltage  
collector current  
-
-
V
open collector  
-
V
-
-3  
A
ICM  
peak collector current  
base current  
single pulse; tp ≤ 1 ms  
Tamb ≤ 25 °C  
-
-5  
A
IB  
-
-500  
600  
1.2  
1.5  
2.5  
175  
175  
175  
mA  
mW  
W
Ptot  
total power dissipation  
[1]  
-
[2][3]  
[4]  
-
-
W
[5][6]  
-
W
Tj  
junction temperature  
ambient temperature  
storage temperature  
-
°C  
°C  
°C  
Tamb  
Tstg  
-55  
-65  
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2]  
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.  
[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.  
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.  
[4]  
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and mounting pad for collector 1 cm2.  
[5]  
[6] Device mounted on a ceramic PCB, Al2O3, standard footprint.  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
3 / 18  
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
aaa-013298  
3
2
1
0
(1) + (2)  
P
tot  
(W)  
(3)  
(4) + (5)  
(6)  
-75  
25  
125  
225  
T
(°C)  
amb  
(1) Ceramic PCB, single-sided copper, standard footprint  
(2) FR4 PCB, 4-layer copper, 1 cm2  
(3) FR4 PCB, single-sided copper, 6 cm2  
(4) FR4 PCB, single-sided copper, 1 cm2  
(5) FR4 PCB, 4-layer copper, standard footprint  
(6) FR4 PCB, single-sided copper, standard footprint  
Fig. 1. Power derating curves  
9. Thermal characteristics  
Table 6.  
Symbol  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
250  
125  
100  
60  
Unit  
K/W  
K/W  
K/W  
K/W  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
in free air  
[1]  
-
-
-
-
-
-
-
-
[2][3]  
[4]  
[5][6]  
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.  
[2]  
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.  
[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.  
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.  
[4]  
[5] Device mounted on a ceramic PCB, Al2O3, standard footprint.  
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and mounting pad for collector 1 cm2.  
[6]  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
4 / 18  
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
006aab979  
3
10  
Z
th(j-a)  
duty cycle = 1  
(K/W)  
0.75  
0.5  
0.33  
2
10  
0.2  
0.1  
0.05  
10  
0.02  
0.01  
1
0
- 1  
10  
- 5  
- 4  
- 3  
- 2  
- 1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, standard footprint  
Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
006aab980  
3
10  
Z
th(j-a)  
(K/W)  
duty cycle = 1  
2
10  
0.75  
0.5  
0.33  
0.2  
0.1  
10  
0.05  
0.02  
0.01  
1
0
- 1  
10  
- 5  
- 4  
- 3  
- 2  
- 1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, mounting pad for collector 1 cm2  
Fig. 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
5 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
006aac000  
3
10  
Z
th(j-a)  
(K/W)  
duty cycle = 1  
2
10  
0.75  
0.5  
0.33  
0.2  
10  
0.1  
0.05  
1
0.02  
0
0.01  
- 1  
10  
- 5  
- 4  
- 3  
- 2  
- 1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, mounting pad for collector 6 cm2  
Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
aaa-013299  
3
10  
Z
th(j-a)  
(K/W)  
duty cycle = 1  
2
10  
0.75  
0.50  
0.33  
0.20  
0.10  
0.05  
10  
0.02  
0.01  
0
1
-1  
10  
-5  
-4  
-3  
-2  
10  
-1  
2
3
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, 4-layer copper, standard footprint  
Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
6 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
aaa-013300  
2
10  
duty cycle = 1  
0.75  
Z
th(j-a)  
(K/W)  
0.50  
0.20  
0.33  
10  
0.10  
0.02  
0.05  
0.01  
0
1
-1  
10  
-5  
-4  
10  
-3  
-2  
-1  
10  
2
3
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
FR4 PCB, 4-layer copper, mounting pad for collector 1 cm2  
Fig. 6. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
006aab982  
2
10  
duty cycle = 1  
Z
0.75  
0.33  
th(j-a)  
(K/W)  
0.5  
0.2  
10  
0.1  
0.02  
0
0.05  
0.01  
1
- 1  
10  
- 5  
- 4  
- 3  
- 2  
- 1  
2
3
10  
10  
10  
10  
10  
1
10  
10  
10  
t
(s)  
p
Ceramic PCB, Al2O3, standard footprint  
Fig. 7. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
7 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
10. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
-100  
-50  
Unit  
nA  
ICBO  
collector-base cut-off  
current  
VCB = -24 V; IE = 0 A; Tamb = 25 °C  
VCB = -24 V; IE = 0 A; Tj = 150 °C  
-
-
-
-
-
-
µA  
ICES  
IEBO  
hFE  
collector-emitter cut-off VCE = -24 V; VBE = 0 V; Tamb = 25 °C  
current  
-100  
nA  
emitter-base cut-off  
current  
VEB = -5 V; IC = 0 A; Tamb = 25 °C  
-
-
-100  
-
nA  
DC current gain  
VCE = -2 V; IC = -0.5 A; pulsed;  
200  
320  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
VCE = -2 V; IC = -1 A; pulsed;  
175  
280  
210  
160  
-45  
450  
-
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
VCE = -2 V; IC = -2 A; pulsed;  
140  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
VCE = -2 V; IC = -3 A; pulsed;  
100  
-
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
VCEsat  
collector-emitter  
IC = -0.5 A; IB = -50 mA; pulsed;  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
-
-
-
-70  
-130  
-240  
mV  
mV  
mV  
saturation voltage  
IC = -1 A; IB = -50 mA; pulsed;  
-90  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
IC = -2 A; IB = -100 mA; pulsed;  
-170  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
IC = -3 A; IB = -300 mA; pulsed;  
-
-
-230  
75  
-320  
107  
mV  
mΩ  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
RCEsat  
collector-emitter  
saturation resistance  
VBEsat  
base-emitter saturation IC = -2 A; IB = -100 mA; pulsed;  
-
-
-
-0.89 -1.1  
-0.97 -1.2  
-0.75 -1  
V
V
V
voltage  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
IC = -3 A; IB = -300 mA; pulsed;  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
VBEon  
base-emitter turn-on  
voltage  
VCE = -2 V; IC = -1 A; pulsed;  
tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C  
td  
tr  
delay time  
rise time  
VCC = -9 V; IC = -2 A; IBon = -0.1 A;  
IBoff = 0.1 A; Tamb = 25 °C  
-
-
-
-
-
-
11  
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
59  
ton  
ts  
turn-on time  
storage time  
fall time  
70  
165  
35  
tf  
toff  
turn-off time  
200  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
8 / 18  
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
fT  
transition frequency  
VCE = -5 V; IC = -100 mA; f = 100 MHz;  
Tamb = 25 °C  
100  
165  
-
MHz  
Cc  
collector capacitance  
VCB = -10 V; IE = 0 A; ie = 0 A;  
f = 1 MHz; Tamb = 25 °C  
-
38  
45  
pF  
006aac036  
006aac037  
800  
- 5  
I
(mA) = - 53  
B
I
C
(A)  
- 47.7  
- 37.1  
h
FE  
- 42.4  
- 31.8  
- 4  
(1)  
(2)  
600  
- 26.5  
- 15.9  
- 21.2  
- 10.6  
- 3  
- 2  
400  
(3)  
- 5.3  
200  
0
- 1  
0
- 1  
2
- 10  
3
4
- 10  
- 1  
- 10  
- 10  
- 10  
(mA)  
0
- 0.4  
- 0.8  
- 1.2  
- 1.6  
- 2.0  
(V)  
I
V
C
CE  
VCE = −2 V  
Tamb = 25 °C  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = −55 °C  
Fig. 9. Collector current as a function of collector-  
emitter voltage; typical values  
Fig. 8. DC current gain as a function of collector  
current; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
9 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
006aac038  
006aac039  
- 1.2  
- 1.4  
V
V
(V)  
BEsat  
(V)  
BE  
(1)  
(2)  
- 0.8  
- 1.0  
(1)  
(2)  
(3)  
(3)  
- 0.4  
- 0.6  
- 0.2  
0
- 10  
- 1  
2
- 10  
3
4
- 1  
2
3
4
- 1  
- 10  
- 10  
- 10  
- 10  
- 1  
- 10  
- 10  
- 10  
- 10  
I (mA)  
C
I
(mA)  
C
VCE = −2 V  
IC/IB = 20  
(1) Tamb = −55 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
(1) Tamb = −55 °C  
(2) Tamb = 25 °C  
(3) Tamb = 100 °C  
Fig. 10. Base-emitter voltage as a function of collector Fig. 11. Base-emitter saturation voltage as a function of  
current; typical values collector current; typical values  
006aac040  
006aac041  
- 1  
- 1  
V
V
CEsat  
(V)  
CEsat  
(V)  
- 1  
- 1  
- 10  
- 10  
(1)  
(2)  
(1)  
(2)  
(3)  
- 2  
- 2  
- 10  
- 10  
(3)  
- 3  
- 10  
- 3  
- 10  
- 10  
- 1  
- 10  
2
3
4
- 1  
2
3
4
- 1  
- 10  
- 10  
- 10  
- 10  
- 1  
- 10  
- 10  
- 10  
- 10  
I
(mA)  
I (mA)  
C
C
IC/IB = 20  
Tamb = 25 °C  
(1) IC/IB = 100  
(2) IC/IB = 50  
(3) IC/IB = 10  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = −55 °C  
Fig. 12. Collector-emitter saturation voltage as a  
function of collector current; typical values  
Fig. 13. Collector-emitter saturation voltage as a  
function of collector current; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
10 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
006aac042  
006aac043  
2
3
10  
10  
R
CEsat  
(Ω)  
R
CEsat  
(Ω)  
2
10  
10  
10  
(1)  
(2)  
(3)  
1
1
- 1  
10  
(1)  
(2)  
- 1  
(3)  
10  
- 2  
- 2  
10  
10  
- 1  
2
3
4
- 1  
2
3
4
- 10  
- 1  
- 10  
- 10  
- 10  
- 10  
(mA)  
- 10  
- 1  
- 10  
- 10  
- 10  
- 10  
I (mA)  
C
I
C
IC/IB = 20  
Tamb = 25 °C  
(1) IC/IB = 100  
(2) IC/IB = 50  
(3) IC/IB = 10  
(1) Tamb = 100 °C  
(2) Tamb = 25 °C  
(3) Tamb = −55 °C  
Fig. 14. Collector-emitter saturation resistance as a  
function of collector current; typical values  
Fig. 15. Collector-emitter saturation resistance as a  
function of collector current; typical values  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
11 / 18  
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
11. Test information  
I
B
input pulse  
90 %  
(idealized waveform)  
I
(100 %)  
Bon  
10 %  
I
Boff  
output pulse  
(idealized waveform)  
I
C
90 %  
I
(100 %)  
C
10 %  
t
t
t
f
t
t
r
s
d
t
t
off  
on  
006aaa003  
Fig. 16. BISS transistor switching time definition  
V
V
CC  
BB  
R
B
R
C
V
o
(probe)  
450 Ω  
(probe)  
oscilloscope  
450 Ω  
oscilloscope  
R2  
V
DUT  
I
R1  
mlb826  
Fig. 17. Test circuit for switching times  
11.1 Quality information  
This product has been qualified in accordance with the Automotive Electronics Council  
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is  
suitable for use in automotive applications.  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
12 / 18  
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
12. Package outline  
DFN2020D-3: plastic thermal enhanced ultra thin small outline package; no leads;  
3 terminals; body 2 x 2 x 0.65 mm  
SOT1061D  
X
v
A B  
b
p
A
B
D
A
A
1
E
detail X  
pin 1  
index area  
solderable lead  
end, protrusion  
max. 0.02 mm (3x)  
C
pin 1  
index area  
y
1
y
e
C
1
2
L
p
visible depend upon  
used manufacturing  
technology (6x)  
e
1
E
1
3
1
0
1
2 mm  
D
scale  
Dimensions (mm are the original dimensions)  
(1)  
Unit  
A
A
b
D
D
1
E
E
e
e
1
L
p
v
y
y
1
1
p
1
max 0.65 0.04 0.35 2.1 1.6 2.1  
mm nom  
min  
1.1  
0.9  
0.3 0.45  
0.2 0.35  
1.3  
0.1 0.05 0.05  
0.25 1.9 1.4 1.9  
Note  
1. Dimension A is including plating thickness  
sot1061d_po  
References  
Outline  
version  
IEC  
European  
projection  
Issue date  
JEDEC  
- - -  
JEITA  
14-03-11  
14-03-12  
SOT1061D  
Fig. 18. Package outline DFN2020D-3 (SOT1061D)  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
13 / 18  
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
13. Soldering  
Footprint information for reflow soldering of DFN2020D-3 package  
SOT1061D  
2.1  
1.7  
1.3  
0.4 (2x)  
0.3 (2x)  
0.5 (2x)  
0.5 (2x) 0.6 (2x) 0.7 (2x)  
0.25  
1.1  
0.35  
0.3  
0.25  
2.5 2.3  
0.25  
1
1.1 1.2  
0.35  
0.35  
0.35  
0.3  
0.4  
0.5  
1.5  
1.6  
1.7  
occupied area  
solder resist  
solder paste  
solder lands  
Dimensions in mm  
14-03-05  
14-03-12  
Issue date  
sot1061d_fr  
Fig. 19. Reflow soldering footprint for DFN2020D-3 (SOT1061D)  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
14 / 18  
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
14. Revision history  
Table 8.  
Revision history  
Data sheet ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
PBSS5330PAS v.1  
20140911  
Product data sheet  
-
-
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
15 / 18  
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
15. Legal information  
15.1 Data sheet status  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of Nexperia.  
Document  
Product  
Definition  
status [1][2] status [3]  
Objective  
[short] data  
sheet  
Development This document contains data from  
the objective specification for product  
development.  
Right to make changes — Nexperia reserves the right to  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preliminary  
[short] data  
sheet  
Qualification This document contains data from the  
preliminary specification.  
Suitability for use in automotive applications — This Nexperia  
product has been qualified for use in automotive  
Product  
[short] data  
sheet  
Production  
This document contains the product  
specification.  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of a Nexperia product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. Nexperia and its suppliers accept no liability for  
inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the Internet at URL http://www.nexperia.com.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
15.2 Definitions  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
Nexperia does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Customers are responsible for the design and operation of their  
applications and products using Nexperia products, and Nexperia  
accepts no liability for any assistance with applications or  
customer product design. It is customer’s sole responsibility to determine  
whether the Nexperia product is suitable and fit for the  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
customer’s applications and products planned, as well as for the planned  
application and use of customer’s third party customer(s). Customers should  
provide appropriate design and operating safeguards to minimize the risks  
associated with their applications and products.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local Nexperia  
sales office. In case of any inconsistency or conflict with the  
Nexperia does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default  
in the customer’s applications or products, or the application or use by  
customer’s third party customer(s). Customer is responsible for doing all  
necessary testing for the customer’s applications and products using Nexperia  
products in order to avoid a default of the applications  
short data sheet, the full data sheet shall prevail.  
and the products or of the application or use by customer’s third party  
customer(s). Nexperia does not accept any liability in this respect.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the Nexperia product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
15.3 Disclaimers  
Terms and conditions of commercial sale — Nexperia  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give  
any representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no  
responsibility for the content in this document if provided by an information  
source outside of Nexperia.  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. Nexperia hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of Nexperia products by customer.  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
16 / 18  
 
 
 
 
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
17 / 18  
 
Nexperia  
PBSS5330PAS  
30 V, 3 A PNP low VCEsat (BISS) transistor  
16. Contents  
1
2
3
4
5
6
7
8
9
10  
General description ............................................... 1  
Features and benefits ............................................1  
Applications ........................................................... 1  
Quick reference data ............................................. 1  
Pinning information ...............................................2  
Ordering information .............................................2  
Marking ...................................................................2  
Limiting values .......................................................3  
Thermal characteristics .........................................4  
Characteristics .......................................................8  
11  
Test information ...................................................12  
11.1  
Quality information ............................................. 12  
12  
13  
14  
Package outline ................................................... 13  
Soldering .............................................................. 14  
Revision history ...................................................15  
15  
Legal information .................................................16  
Data sheet status ............................................... 16  
Definitions ...........................................................16  
Disclaimers .........................................................16  
Trademarks ........................................................ 17  
15.1  
15.2  
15.3  
15.4  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 11 September 2014  
©
PBSS5330PAS  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
11 September 2014  
18 / 18  

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