PHPT610035NK [NEXPERIA]
NPN/NPN high power double bipolar transistorProduction;
| 型号： | PHPT610035NK |
| 厂家： | 
Nexperia |
| 描述： | NPN/NPN high power double bipolar transistorProduction |
| 文件： | 总14页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PHPT610035NK
NPN/NPN high power double bipolar transistor
10 September 2020
Product data sheet
1. General description
NPN/NPN high power double bipolar transistor in a SOT1205 (LFPAK56D) Surface-Mounted
Device (SMD) power plastic package. Matched version of PHPT610030NK.
PNP/PNP complement: PHPT610035PK
NPN/PNP complement: PHPT610035NPK
2. Features and benefits
•
Current gain matching 5%
•
•
•
•
•
High thermal power dissipation capability
Suitable for high temperature applications up to 175 °C
Reduced Printed-Circuit Board (PCB) requirements comparing to transistors in DPAK
High energy efficiency due to less heat generation
AEC-Q101 qualified
3. Applications
•
•
•
•
•
•
Current mirror
Motor control
Power management
Backlighting applications
Relay replacement
differential amplifiers
4. Quick reference data
Table 1. Quick reference data
Symbol
Per transistor
VCBO
Parameter
Conditions
Min
Typ
Max
Unit
collector-base voltage open emitter
collector current
-
-
-
-
100
3
V
IC
-
A
RCEsat
collector-emitter
saturation resistance
IC = 3 A; IB = 300 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
75
110
mΩ
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol
E1
Description
emitter TR1
base TR1
Simplified outline
Graphic symbol
8
7
6
5
C1 B2
E2
2
B1
TR2
3
E2
emitter TR2
base TR2
TR1
4
B2
5
C2
collector TR2
collector TR2
collector TR1
collector TR1
E1
B1 C2
6
C2
sym140
7
C1
1
2
3
4
8
C1
LFPAK56D; Dual
LFPAK (SOT1205)
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
PHPT610035NK
LFPAK56D;
Dual LFPAK
plastic, single ended surface mounted package (LFPAK56D); 8
leads
SOT1205
7. Marking
Table 4. Marking codes
Type number
Marking code
PHPT610035NK
10035NK
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PHPT610035NK
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Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
2 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor
VCBO
VCEO
VEBO
IC
collector-base voltage
open emitter
-
-
-
-
-
-
-
-
-
100
100
7
V
collector-emitter voltage open base
V
emitter-base voltage
collector current
open collector
V
3
A
ICM
peak collector current
base current
single pulse; tp ≤ 1 ms
Tamb ≤ 25 °C
8
A
IB
0.5
1
A
Ptot
total power dissipation
[1]
[2]
[3]
W
W
W
2.4
25
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
[4]
[2]
-
1.25
5
W
W
W
°C
°C
°C
-
-
3
Tj
junction temperature
ambient temperature
storage temperature
-
175
175
175
Tamb
Tstg
-55
-65
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[3] Power dissipation from junction to mounting base.
[4] Device mounted on a ceramic PCB, Al2O3, standard footprint.
aaa-014341
4
P
tot
(W)
3
2
1
0
(1)
(2)
-75
0
75
150
225
(°C)
T
amb
(1) FR4 PCB, mounting pad for collector 6 cm2
(2) FR4 PCB, standard footprint
Fig. 1. Per transistor: power derating curves
©
PHPT610035NK
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Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
3 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
[2]
-
-
-
-
-
-
150
62.5
6
K/W
K/W
K/W
Rth(j-sp)
thermal resistance from
junction to solder point
Per device
Rth(j-a)
thermal resistance from in free air
junction to ambient
[1]
[2]
[3]
-
-
-
-
-
-
120
50
K/W
K/W
K/W
30
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm2.
[3] Device mounted on a ceramic PCB, Al2O3, standard footprint.
aaa-014342
3
10
Z
th(j-a)
(K/W)
duty cycle = 1
2
10
0.75
0.33
0.2
0.5
0.25
0.1
10
0.05
0.01
0.02
0
1
-1
10
-5
-4
-3
-2
10
-1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig. 2. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
PHPT610035NK
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Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
4 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
aaa-014343
2
10
duty cycle = 1
Z
th(j-a)
(K/W)
0.75
0.5
0.33
0.2
0.25
10
0.1
0.05
0.01
0.02
0
1
-1
10
-5
-4
-3
-2
10
-1
2
3
10
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, mounting pad for collector 6 cm2
Fig. 3. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
PHPT610035NK
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Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
5 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
hFE1/hFE2
DC current gain
matching
VCE = 2 V; IC = 1 A
0.95
1
1.05
Per transistor
ICBO
collector-base cut-off
current
VCB = 80 V; IE = 0 A; Tamb = 25 °C
VCB = 80 V; IE = 0 A; Tj = 150 °C
-
-
-
-
-
-
100
50
nA
µA
nA
ICES
IEBO
hFE
collector-emitter cut-off VCE = 80 V; VBE = 0 V; Tamb = 25 °C
current
100
emitter-base cut-off
current
VEB = 7 V; IC = 0 A; Tamb = 25 °C
-
-
100
nA
DC current gain
VCE = 2 V; IC = 1 A; tp ≤ 300 µs; pulsed;
δ ≤ 0.02; Tamb = 25 °C
80
150
80
20
10
-
150
250
250
100
40
-
VCE = 10 V; IC = 500 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
-
VCE = 10 V; IC = 1 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
-
VCE = 10 V; IC = 2 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
-
VCE = 10 V; IC = 3 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
-
VCEsat
collector-emitter
saturation voltage
IC = 1 A; IB = 50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
90
150
mV
IC = 3 A; IB = 300 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
-
-
225
75
330
110
mV
mΩ
RCEsat
VBEsat
collector-emitter
saturation resistance
base-emitter saturation IC = 1 A; IB = 50 mA; tp ≤ 300 µs;
-
-
-
0.86
1
1
V
V
V
voltage
pulsed; δ ≤ 0.02; Tamb = 25 °C
IC = 2 A; IB = 200 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
1.2
0.85
VBEon
base-emitter turn-on
voltage
VCE = 2 V; IC = 0.1 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02; Tamb = 25 °C
0.67
td
tr
delay time
VCC = 12.5 V; IC = 1 A; IBon = 50 mA;
IBoff = -50 mA; Tamb = 25 °C
-
-
-
-
-
-
-
20
-
-
-
-
-
-
-
ns
rise time
300
320
830
470
1300
140
ns
ton
ts
turn-on time
storage time
fall time
ns
ns
tf
ns
toff
fT
turn-off time
transition frequency
ns
VCE = 10 V; IC = 100 mA; f = 100 MHz;
Tamb = 25 °C
MHz
Cc
collector capacitance
VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz;
Tamb = 25 °C
-
11
-
pF
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
6 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
aaa-010261
aaa-010267
400
3
I
= 50 mA
45
B
h
FE
(1)
(2)
I
C
40
35
(A)
300
200
100
0
30
15
2
1
0
25
10
20
5
(3)
-1
2
3
4
10
1
10
10
10
10
(mA)
0
1
2
3
4
5
I
C
V
(V)
CE
VCE = 10 V
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 5. Collector current as a function of collector-
emitter voltage; typical values
Fig. 4. DC current gain as a function of collector
current; typical values
aaa-010262
aaa-010265
1.4
1.2
V
BE
(V)
1.2
V
BEsat
(V)
1.0
0.8
0.6
0.4
0.2
1.0
0.8
0.6
0.4
0.2
0
(1)
(1)
(2)
(3)
(2)
(3)
-1
10
2
3
4
-1
10
2
3
4
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
VCE = 2 V
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 6. Base-emitter voltage as a function of collector Fig. 7. Base-emitter saturation voltage as a function of
current; typical values
collector current; typical values
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
7 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
aaa-010263
aaa-010264
10
10
V
V
CEsat
(V)
CEsat
(V)
1
1
(1)
(1)
(2)
(3)
(2)
(3)
-1
-2
-3
-1
10
10
10
10
10
10
-2
-3
-1
10
-1
2
3
4
2
3
4
10
1
10
10
10
10
(mA)
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) IC/IB = 50
(2) IC/IB = 20
(3) IC/IB = 10
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 8. Collector-emitter saturation voltage as a
function of collector current; typical values
Fig. 9. Collector-emitter saturation voltage as a
function of collector current; typical values
aaa-010266
aaa-010268
3
3
10
10
R
CEsat
(Ω)
R
CEsat
(Ω)
2
2
10
10
10
10
(1)
(1)
1
1
(1)
(2)
(3)
-1
-1
10
10
10
10
(3)
-2
-2
-1
2
3
4
-1
2
3
4
10
1
10
10
10
10
(mA)
10
1
10
10
10
10
I (mA)
C
I
C
IC/IB = 20
Tamb = 25 °C
(1) IC/IB = 50
(2) IC/IB = 20
(3) IC/IB = 10
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Fig. 10. Collector-emitter saturation resistance as a
function of collector current; typical values
Fig. 11. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
8 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
11. Test information
I
B
input pulse
90 %
(idealized waveform)
I
(100 %)
Bon
10 %
I
Boff
output pulse
(idealized waveform)
I
C
90 %
I
(100 %)
C
10 %
t
t
t
f
t
t
r
s
d
t
t
off
on
006aaa003
Fig. 12. BISS transistor switching time definition
V
V
CC
BB
R
B
R
C
V
o
(probe)
450 Ω
(probe)
oscilloscope
450 Ω
oscilloscope
R2
V
DUT
I
R1
mlb826
Fig. 13. Test circuit for switching times
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
9 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
12. Package outline
Plastic single ended surface mounted package LFPAK56D; 8 leads
SOT1205
E
A
A
b
c
1
1
L
1
mounting
base
D
1
D
D
2
H
L
1
2
3
4
X
b
(8x)
e
c
E
1
w
A
E
2
C
A
1
θ
L
p
y
C
detail X
0
2.5
5 mm
scale
Dimensions
Unit
D
(ref)
2
(1)
(1)
(1)
E
(1)
A
A
b
b
c
c
D
D
1
E
E
e
H
L
L
L
p
w
y
θ
1
1
1
1
2
1
°
8
0
max 1.05 0.1 0.50 4.4 0.25 0.30 4.70 4.55 3.5 5.30 1.8 0.85
nom
min 1.02 0.0 0.35 4.1 0.19 0.24 4.45 4.35 3.4 4.95 1.6 0.60
6.2 1.3 0.55 0.85
5.9 0.8 0.30 0.40
mm
1.27
0.25 0.1
°
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot1205_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
14-08-21
14-10-28
SOT1205
Fig. 14. Package outline LFPAK56D; Dual LFPAK (SOT1205)
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
10 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
13. Soldering
Footprint information for reflow soldering of LFPAK56D package
SOT1205
5.85
3.81
1.27
0.7 (4x)
3.2
3.325
3.175
2.0
2.1
1.275
1.875
0.8
2.7
1.0 (2x)
3.85 3.975
0.0625
0.025
0.7 (4x)
1.44
3.81
1.27
1.1 (2x)
solder land
solder land plus solder paste
solder paste deposit
occupied area
solder resist
Dimensions in mm
sot1205_fr
Fig. 15. Reflow soldering footprint for LFPAK56D; Dual LFPAK (SOT1205)
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
11 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
14. Revision history
Table 8. Revision history
Data sheet ID
Release date
20200910
Data sheet status
Change notice
Supersedes
PHPT610035NK v.2
Modifications:
Product data sheet
-
PHPT610035NK v.1
•
Characteristics: Figures 6, 7, 8 and 10 corrected
PHPT610035NK v.1
20141014 Product data sheet
-
-
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
12 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
15. Legal information
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status Product
Definition
[1][2]
status [3]
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
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Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
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Characteristics sections of this document is not warranted. Constant or
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with the same product type number(s) and title. A short data sheet is
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for the products described herein shall be limited in accordance with the
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Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
13 / 14
Nexperia
PHPT610035NK
NPN/NPN high power double bipolar transistor
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics............................................................6
11. Test information..........................................................9
12. Package outline........................................................ 10
13. Soldering................................................................... 11
14. Revision history........................................................12
15. Legal information......................................................13
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 10 September 2020
©
PHPT610035NK
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2020. All rights reserved
Product data sheet
10 September 2020
14 / 14
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