PQMD13 [NEXPERIA]
NPN/PNP resistor-equipped transistors; R1=4.7kΩ,R2=47kΩProduction;
| 型号： | PQMD13 |
| 厂家： | 
Nexperia |
| 描述： | NPN/PNP resistor-equipped transistors; R1=4.7kΩ,R2=47kΩProduction |
| 文件： | 总17页 (文件大小：728K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PQMD13
NPN/PNP resistor-equipped transistors;
R1 = 4.7 kΩ, R2 = 47 kΩ
4 November 2015
Product data sheet
1. General description
NPN/PNP double Resistor-Equipped Transistors (RET) in a leadless ultra small
DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package.
NPN/NPN complement: PQMH13
2. Features and benefits
100 mA output current capability
Built-in bias resistors
Simplifies circuit design
Low package height of 0.37 mm
Reduces component count
Reduces pick and place costs
AEC-Q101 qualified
•
•
•
•
•
•
•
3. Applications
Low current peripheral driver
Control of IC inputs
Replaces general-purpose transistors in digital applications
Mobile applications
•
•
•
•
4. Quick reference data
Table 1.
Symbol
Quick reference data
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCEO
collector-emitter
voltage
open base
-
-
-
-
50
V
IO
output current
100
mA
Per transistor; for the PNP transistor with negative polarity
R1
bias resistor 1
Tamb = 25 °C
[1]
[1]
3.3
8
4.7
10
6.1
12
kΩ
R2/R1
bias resistor ratio
[1] See section "Test information" for resistor calculation and test conditions.
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
5. Pinning information
Table 2.
Pin
Pinning information
Symbol Description
Simplified outline
Graphic symbol
O1 I2
GND2
TR2
1
2
3
4
5
6
7
8
GND1
I1
GND (emitter) TR1
1
6
5
4
7
input ( base) TR1
R1
R2
O2
output (collector) TR2
GND (emitter) TR2
input ( base) TR2
2
GND2
I2
TR1
R2
8
3
R1
O1
output (collector) TR1
output (collector) TR1
output (collector) TR2
Transparent top view
GND1
I1 O2
aaa-007379
O1
DFN1010B-6 (SOT1216)
O2
6. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PQMD13
DFN1010B-6
DFN1010B-6: plastic thermal enhanced ultra thin small SOT1216
outline package; no leads; 6 terminals
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
2 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
7. Marking
Table 4.
Marking codes
Type number
Marking code
PQMD13
B 011
READING
DIRECTION
MARKING CODE
(EXAMPLE)
MARK-FREE AREA
PIN 1
INDICATION MARK
READING EXAMPLE:
A 110
YEAR DATE CODE
aaa-019766
VENDOR CODE
Fig. 1. DFN1010B-6 (SOT1216) binary marking code description
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
3 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
8. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions
Limiting values
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
VCEO
VEBO
VI
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
open emitter
open base
-
-
-
-
-
-
-
-
-
-
50
50
5
V
V
open collector
TR1; positive
TR1; negative
TR2; positive
TR2; negative
V
30
-5
V
V
5
V
-30
100
100
230
V
IO
output current
mA
mA
mW
ICM
peak collector current
total power dissipation
tp ≤ 1 ms; single pulse
Tamb ≤ 25 °C
Ptot
[1]
[1]
Per device
Ptot
total power dissipation
junction temperature
ambient temperature
storage temperature
Tamb ≤ 25 °C
-
350
150
150
150
mW
°C
Tj
-
Tamb
Tstg
-55
-65
°C
°C
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
aaa-007377
400
P
tot
(mW)
300
200
100
0
-75
-25
25
75
125
175
(°C)
T
amb
FR4 PCB, standard footprint
Fig. 2. Per device: Power derating curve
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
4 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
9. Thermal characteristics
Table 6.
Symbol
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor
Rth(j-a)
thermal resistance
from junction to
ambient
in free air
[1]
[1]
-
-
543
K/W
Per device
Rth(j-a)
thermal resistance
from junction to
ambient
in free air
-
-
357
K/W
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
aaa-007378
3
10
duty cycle =
1
Z
th(j-a)
(K/W)
0.75
0.33
0.5
2
0.2
10
0.1
0.05
0.01
0.02
0
10
1
-5
10
-4
-3
-2
10
-1
2
3
10
10
10
1
10
10
10
t
(s)
p
FR4 PCB, standard footprint
Fig. 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
5 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
10. Characteristics
Table 7.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Per transistor; for the PNP transistor with negative polarity
ICBO
collector-base cut-off
current (emitter open)
VCB = 50 V; IE = 0 A; Tamb = 25 °C
-
-
100
nA
ICEO
collector-emitter cut-off VCE = 30 V; IB = 0 A; Tamb = 25 °C
-
-
-
-
-
-
1
µA
µA
µA
current (base open)
VCE = 30 V; IB = 0 A; Tamb = 150 °C
5
IEBO
emitter-base cut-off
VEB = 5 V; IC = 0 A; Tamb = 25 °C
170
current (collector open)
hFE
DC current gain
VCE = 5 V; IC = 10 mA; Tamb = 25 °C
IC = 5 mA; IB = 0.25 mA; Tamb = 25 °C
100
-
-
-
-
VCEsat
collector-emitter
100
mV
saturation voltage
VI(off)
VI(on)
R1
off-state input voltage VCE = 5 V; IC = 100 µA; Tamb = 25 °C
on-state input voltage VCE = 0.3 V; IC = 5 mA; Tamb = 25 °C
-
0.6
0.9
4.7
10
-
0.5
-
V
1.3
3.3
8
V
bias resistor 1
Tamb = 25 °C
[1]
[1]
6.1
12
2.5
kΩ
R2/R1
CC
bias resistor ratio
collector capacitance
VCB = 10 V; IE = 0 A; f = 1 MHz;
Tamb = 25 °C; TR1 (NPN)
-
pF
VCB = -10 V; IE = 0 A; f = 1 MHz;
Tamb = 25 °C; TR2 (PNP)
-
-
-
-
3
-
pF
fT
transition frequency
VCE = 5 V; IC = 10 mA; f = 100 MHz;
Tamb = 25 °C; TR1 (NPN)
[2]
[2]
230
180
MHz
MHz
VCE = -5 V; IC = -10 mA; f = 100 MHz;
Tamb = 25 °C; TR2 (PNP)
-
[1] See section "Test information" for resistor calculation and test conditions.
[2] Characteristics of built-in transistor
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
6 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
006aac819
aaa-018581
3
10
0.1
0.63 mA
0.56 mA
0.70 mA
I
C
(A)
h
FE
(1)
0.08
0.49 mA
0.42 mA
(2)
(3)
2
10
0.35 mA
0.28 mA
0.06
0.04
0.02
0
0.21 mA
0.14 mA
10
I
= 0.07 mA
B
1
10
-1
2
1
10
10
0
1
2
3
4
5
I
(mA)
V
(V)
CE
C
VCE = 5 V
Tamb = 25 °C
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 5. NPN transistor: Collector current as a function
of collector-emitter voltage; typical values
Fig. 4. NPN transistor: DC current gain as a function of
collector current; typical values
aaa-018585
006aac821
1
10
V
V
I(on)
(V)
CEsat
(V)
(1)
-1
10
1
(2)
(3)
(1)
(2)
(3)
-2
-1
10
10
-1
2
-1
2
10
1
10
10
10
1
10
10
I
(mA)
I (mA)
C
C
IC/IB = 20
VCE = 0.3 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 6. NPN transistor: Collector-emitter saturation
voltage as a function of collector current;
typical values
Fig. 7. NPN transistor: On-state input voltage as a
function of collector current; typical values
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
7 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
006aac822
006aac823
10
3
2
1
0
C
(pF)
c
V
I(off)
(V)
(1)
1
(2)
(3)
-1
10
-1
10
1
10
0
10
20
30
40
50
I
(mA)
V
(V)
CB
C
VCE = 5 V
f = 1 MHz; Tamb = 25 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 9. NPN transistor: Collector capacitance as a
function of collector-base voltage; typical
values
Fig. 8. NPN transistor: Off-state input voltage as a
function of collector current; typical values
006aac757
006aac824
3
3
10
10
h
FE
(1)
f
T
(2)
(MHz)
(3)
2
10
2
10
10
10
10
1
-1
2
-1
-10
2
1
10
10
-1
-10
-10
I
(mA)
I (mA)
C
C
VCE = 5 V; Tamb = 25 °C
VCE = -5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 10. NPN transistor: Transition frequency as a
function of collector current; typical values of
built-in transistor
Fig. 11. PNP transistor: DC current gain as a function of
collector current; typical values
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
8 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
aaa-018917
aaa-018914
-0.1
-1
-0.70 mA
I
C
(A)
-0.63 mA
-0.56 mA
-0.08
V
CEsat
(V)
-0.49 mA
-0.42 mA
-0.35 mA
-0.06
-0.04
-0.02
0
-1
-10
-0.28 mA
-0.21 mA
(1)
(2)
(3)
-0.14 mA
I
= -0.07 mA
B
-2
-10
-1
2
0
-1
-2
-3
-4
-5
-10
-1
-10
-10
V
(V)
I (mA)
C
CE
Tamb = 25 °C
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = -40 °C
Fig. 12. PNP transistor: Collector current as a function
of collector-emitter voltage; typical values
Fig. 13. PNP transistor: Collector-emitter saturation
voltage as a function of collector current;
typical values
006aac826
006aac827
-10
-10
V
I(on)
(V)
V
I(off)
(V)
(1)
(1)
-1
-1
(2)
(2)
(3)
(3)
-1
-1
-10
-10
-1
2
-1
-10
-1
-10
-10
-10
-1
-10
I
(mA)
I (mA)
C
C
VCE = -0.3 V
VCE = -5 V
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
(1) Tamb = -40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 14. PNP transistor: On-state input voltage as a
function of collector current; typical values
Fig. 15. PNP transistor: Off-state input voltage as a
function of collector current; typical values
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
9 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
006aac828
006aac763
3
8
10
C
c
(pF)
f
T
6
4
2
0
(MHz)
2
10
10
-1
-10
2
0
-10
-20
-30
-40
V
-50
(V)
-1
-10
-10
I (mA)
C
CB
f = 1 MHz; Tamb = 25 °C
VCE = -5 V; Tamb = 25 °C
Fig. 16. PNP transistor: Collector capacitance as a
function of collector-base voltage; typical
values
Fig. 17. PNP transistor: Transition frequency as a
function of collector current; typical values of
built-in transistor
11. Test information
11.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
11.2 Resistor calculation
Calculation of bias resistor 1 (R1)
•
Calculation of bias resistor ratio (R2/R1)
•
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
10 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
n.c.
I
I
; I
I1 I2
R1
; I
I3 I4
R2
GND
aaa-020082
Fig. 18. NPN transistor: Resistor test circuit
n.c.
I
I
; I
I1 I2
R1
; I
I3 I4
R2
GND
aaa-020083
Fig. 19. PNP transistor: Resistor test circuit
11.3 Resistor test conditions
Table 8.
Resistor test conditions
Per transistor; for the PNP transistor with negative polarity
R1 (kΩ)
R2 (kΩ)
Test conditions
II1
II2
140 μA
II3
II4
4.7
47
90 μA
-55 μA
-105 μA
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
11 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
12. Package outline
0.35
0.35
0.15
0.23
1
6
2
5
3
4
0.125
0.205
0.22
0.30
0.95
1.05
0.32
0.40
0.04
max
0.34
0.40
0.275 0.275
1.05
1.15
Dimensions in mm
13-03-05
Fig. 20. Package outline DFN1010B-6 (SOT1216)
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
12 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
13. Soldering
Footprint information for reflow soldering of DFN1010B-6 package
SOT1216
0.9
0.35
0.35
0.15 0.2 (6x) 0.15
0.25
0.35
1.3 1.2 0.5
0.35
0.6 1.1
0.25
0.3 (6x)
1
1.35
solder land
solder land plus solder paste
occupied area
solder resist
Dimensions in mm
13-03-06
Issue date
sot1216_fr
14-07-28
Fig. 21. Reflow soldering footprint for DFN1010B-6 (SOT1216)
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
13 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
14. Revision history
Table 9.
Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PQMD13 v.1
20151104
Product data sheet
-
-
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
14 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
15. Legal information
15.1 Data sheet status
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Document
Product
Definition
status [1][2] status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Right to make changes — Nexperia reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Preliminary
[short] data
sheet
Qualification This document contains data from the
preliminary specification.
Suitability for use in automotive applications — This Nexperia
product has been qualified for use in automotive
Product
[short] data
sheet
Production
This document contains the product
specification.
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nexperia.com.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
15.2 Definitions
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
Nexperia does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Customers are responsible for the design and operation of their
applications and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the Nexperia product is suitable and fit for the
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default
in the customer’s applications or products, or the application or use by
customer’s third party customer(s). Customer is responsible for doing all
necessary testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications
short data sheet, the full data sheet shall prevail.
and the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product
is deemed to offer functions and qualities beyond those described in the
Product data sheet.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
15.3 Disclaimers
Terms and conditions of commercial sale — Nexperia
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give
any representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
15 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
16 / 17
Nexperia
PQMD13
NPN/PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = 47 kΩ
16. Contents
1
2
3
4
5
6
7
8
9
10
General description ............................................... 1
Features and benefits ............................................1
Applications ........................................................... 1
Quick reference data ............................................. 1
Pinning information ...............................................2
Ordering information .............................................2
Marking ...................................................................3
Limiting values .......................................................4
Thermal characteristics .........................................5
Characteristics .......................................................6
11
Test information ...................................................10
Quality information ............................................. 10
Resistor calculation ............................................ 10
Resistor test conditions ...................................... 11
11.1
11.2
11.3
12
13
14
Package outline ................................................... 12
Soldering .............................................................. 13
Revision history ...................................................14
15
Legal information .................................................15
Data sheet status ............................................... 15
Definitions ...........................................................15
Disclaimers .........................................................15
Trademarks ........................................................ 16
15.1
15.2
15.3
15.4
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 04 November 2015
©
PQMD13
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2017. All rights reserved
Product data sheet
4 November 2015
17 / 17
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