PSMN033-100HL [NEXPERIA]
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technologyProduction;
| 型号： | PSMN033-100HL |
| 厂家： | 
Nexperia |
| 描述： | N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technologyProduction |
| 文件： | 总12页 (文件大小：332K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D
using TrenchMOS technology
30 September 2022
Product data sheet
1. General description
Dual logic level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package using
TrenchMOS technology.
2. Features and benefits
•
High peak drain current IDM
•
•
•
•
Copper clip and flexible Leads
High operating junction temperature Tj = 175 °C
Superior reliability
Low body diode reverse recovery charge Qr
3. Applications
•
•
•
•
•
Synchronous rectifier
Forward and flyback converter
Industrial drive
Power management system
Uninterruptible Power Supply (UPS)
4. Quick reference data
Table 1. Quick reference data
Symbol
VDS
ID
Parameter
Conditions
Min
Typ
Max
100
26
Unit
V
drain-source voltage
drain current
25 °C ≤ Tj ≤ 175 °C
VGS = 5 V; Tmb = 25 °C; Fig. 2
-
-
-
-
-
-
A
Ptot
total power dissipation Tmb = 25 °C; Fig. 1
junction temperature
-
64
W
Tj
-55
175
°C
Static characteristics FET1 and FET2
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 5 A; Tj = 175 °C; Fig. 11;
Fig. 12
-
-
73.4
25.6
91
31
mΩ
mΩ
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 11
Dynamic characteristics FET1 and FET2
QGD
gate-drain charge
total gate charge
ID = 5 A; VDS = 80 V; VGS = 5 V;
Tj = 25 °C; Fig. 13; Fig. 14
-
-
11
-
-
nC
nC
QG(tot)
27.3
Avalanche ruggedness FET1 and FET2
EDS(AL)S
non-repetitive drain-
source avalanche
energy
ID = 26 A; Vsup ≤ 100 V; VGS = 10 V;
Tj(init) = 25 °C; Fig. 4
[1] [2]
-
-
74
mJ
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode FET1 and FET2
Qr recovered charge
IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 50 V; Tj = 25 °C
-
47.3
-
nC
[1] Refer to application note AN10273 for further information
[2] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C
5. Pinning information
Table 2. Pinning information
Pin
1
Symbol
S1
Description
source1
gate1
Simplified outline
Graphic symbol
8
7
6
5
2
G1
D1
D2
D2
D1
3
S2
source2
gate2
4
G2
5
D2
drain2
6
D2
drain2
S1
G1
S2
G2
mbk725
7
D1
drain1
1
2
3
4
8
D1
drain1
LFPAK56D; Dual
LFPAK (SOT1205)
6. Ordering information
Table 3. Ordering information
Type number
Package
Name
Description
Version
PSMN033-100HL
LFPAK56D;
Dual LFPAK
plastic, single ended surface mounted package
(LFPAK56D); 8 leads
SOT1205
7. Marking
Table 4. Marking codes
Type number
Marking code
33RL10H
PSMN033-100HL
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
Unit
drain-source voltage
drain-gate voltage
gate-source voltage
25 °C ≤ Tj ≤ 175 °C
RGS = 20 kΩ
-
100
100
10
V
V
V
V
W
VDGR
VGS
-
DC; Tj ≤ 175 °C
Pulsed; Tj ≤ 175 °C
Tmb = 25 °C; Fig. 1
-10
[1] [2] -15
-
15
Ptot
total power dissipation
64
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PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
2 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
Symbol
Parameter
Conditions
Min
Max
26
Unit
A
ID
drain current
VGS = 5 V; Tmb = 25 °C; Fig. 2
VGS = 5 V; Tmb = 100 °C; Fig. 2
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3
-
-
19
A
IDM
peak drain current
storage temperature
junction temperature
-
106
175
175
260
A
Tstg
Tj
-55
-55
-
°C
°C
°C
Tsld(M)
peak soldering
temperature
Source-drain diode FET1 and FET2
IS
source current
-
-
26
A
A
ISM
peak source current
pulsed; tp ≤ 10 µs; Tmb = 25 °C
106
Avalanche ruggedness FET1 and FET2
EDS(AL)S non-repetitive drain-
ID = 26 A; Vsup ≤ 100 V; VGS = 10 V;
[3] [4]
-
74
mJ
source avalanche energy Tj(init) = 25 °C; Fig. 4
[1] Accumulated Pulse duration up to 50 hours delivers zero defect ppm
[2] Significantly longer life times are achieved by lowering Tj and or VGS
.
[3] Refer to application note AN10273 for further information
[4] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C
03aa16
003aal002
120
30
25
20
15
10
5
I
D
(A)
P
der
(%)
80
40
0
0
0
50
100
150
200
0
30
60
90
120
150
(°C)
180
T
mb
T
(°C)
mb
VGS ≥ 5 V
Fig. 2. Continuous drain current as a function of
mounting base temperature
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature
©
PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
3 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
003aal004
3
10
I
D
(A)
2
10
Limit R
= V / I
DS
DSon
D
t
= 10 us
p
10
100 us
1
1 ms
DC
10 ms
-1
10
100 ms
-2
10
2
3
1
10
10
10
V
(V)
DS
Tmb = 25 °C; IDM is a single pulse
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
003aal003
2
10
I
AL
(A)
10
(1)
(2)
(3)
1
-1
10
-3
-2
-1
10
10
10
1
AL
10
t
(ms)
(1) Tj (init) = 25 °C; (2) Tj (init) = 150 °C; (3) Repetitive Avalanche
Fig. 4. Avalanche rating; avalanche current as a function of avalanche time
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Rth(j-mb)
thermal resistance from Fig. 5
junction to mounting
base
-
-
2.36
K/W
Rth(j-a)
thermal resistance from Minimum footprint; mounted on a
-
95
-
K/W
junction to ambient
printed circuit board
©
PSMN033-100HL
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
4 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
003aal005
10
th(j-mb)
Z
(K/W)
1
δ = 0.5
0.2
0.1
-1
10
10
10
0.05
0.02
t
single shot
p
P
δ =
T
-2
t
t
p
T
-3
-6
10
-5
10
-4
-3
-2
-1
10
10
10
10
1
t
(s)
p
Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics FET1 and FET2
V(BR)DSS
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
90
-
-
V
V
V
100
1.4
-
-
VGS(th)
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C; Fig. 9;
1.7
2.1
voltage
Fig. 10
ID = 1 mA; VDS=VGS; Tj = 175 °C; Fig. 9;
Fig. 10
0.5
-
-
-
-
V
V
ID = 1 mA; VDS=VGS; Tj = -55 °C; Fig. 9;
Fig. 10
2.45
IDSS
drain leakage current
gate leakage current
VDS = 100 V; VGS = 0 V; Tj = 25 °C
VDS = 100 V; VGS = 0 V; Tj = 175 °C
VGS = -10 V; VDS = 0 V; Tj = 25 °C
VGS = 10 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
0.02
1
µA
µA
nA
nA
mΩ
-
500
100
100
91
IGSS
2
2
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 5 A; Tj = 175 °C; Fig. 11;
Fig. 12
73.4
VGS = 10 V; ID = 5 A; Tj = 25 °C; Fig. 11
VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 11
-
-
25.6
26.6
31
33
mΩ
mΩ
Dynamic characteristics FET1 and FET2
QG(tot)
QGS
QGD
Ciss
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
ID = 5 A; VDS = 80 V; VGS = 5 V;
Tj = 25 °C; Fig. 13; Fig. 14
-
-
-
-
-
-
27.3
4.7
11
-
-
-
nC
nC
nC
VDS = 25 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; Fig. 15
2377 3168 pF
Coss
Crss
153
101
184
139
pF
pF
reverse transfer
capacitance
td(on)
tr
turn-on delay time
rise time
VDS = 80 V; RL = 15 Ω; VGS = 5 V;
RG(ext) = 5 Ω; Tj = 25 °C
-
-
-
12.6
22
-
-
-
ns
ns
ns
td(off)
turn-off delay time
39.5
©
PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
5 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tf
fall time
-
23.1
-
ns
Source-drain diode FET1 and FET2
VSD
trr
source-drain voltage
IS = 5 A; VGS = 0 V; Tj = 25 °C; Fig. 16
-
-
-
0.78
35.6
47.3
1.2
V
reverse recovery time IS = 10 A; dIS/dt = -100 A/µs; VGS = 0 V;
-
-
ns
nC
VDS = 50 V; Tj = 25 °C
Qr
recovered charge
003aal007
003aal006
50
DSon
30
R
I
D
(A)
10 V
4.5 V
= 3 V
2.6 V
V
25
20
15
10
5
GS
40
30
20
10
0
2.4 V
2.2 V
2.2 V
0
0
2
4
6
8
10
12
GS
14
(V)
16
0
0.5
1
1.5
2
2.5
(V)
3
V
V
DS
Tj = 25 °C; ID = 5 A
Tj = 25 °C; tp = 300 μs
Fig. 6. Drain-source on-state resistance as a function Fig. 7. Output characteristics; drain current as a
of gate-source voltage; typical values
function of drain-source voltage; typical values
003aal009
003aah025
60
50
40
30
20
10
0
3
VGS(th)
(V)
I
D
(A)
2.5
max
typ
2
1.5
1
min
0.5
0
175°C
T = 25°C
j
0
0.8
1.6
2.4
3.2
(V)
4
-60
0
60
120
180
V
T ( C)
°
j
GS
VDS = 10 V
ID = 1 mA; VDS = VGS
Fig. 8. Transfer characteristics; drain current as a
function of gate-source voltage; typical values
Fig. 9. Gate-source threshold voltage as a function of
junction temperature
©
PSMN033-100HL
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
6 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
003aal010
003aah026
10-1
50
DSon
R
ID
(A)
2.4 V
2.6 V
10-2
10-3
10-4
10-5
40
30
20
10
0
2.8 V
3 V
4.5 V
min
typ
max
Vgs(V) = 10 V
10-6
0
0
5
10
15
20
25
30
1
2
3
VGS (V)
I
(A)
D
Tj = 25 °C; tp = 300 μs
Tj = 25 °C; VDS = 5 V
Fig. 11. Drain-source on-state resistance as a function
of drain current; typical values
Fig. 10. Sub-threshold drain current as a function of
gate-source voltage
003aaj820
3
V
DS
a
2.4
I
D
1.8
1.2
0.6
0
V
V
GS(pl)
GS(th)
V
GS
Q
GS2
Q
GS1
Q
Q
-60
0
60
120
180
GS
GD
Tj °C)
(
Q
G(tot)
003aaa508
Fig. 13. Gate charge waveform definitions
Fig. 12. Normalized drain-source on-state resistance
factor as a function of junction temperature
©
PSMN033-100HL
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
7 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
003aal011
003aal012
4
3
2
10
10
V
GS
(V)
C
(pF)
8
6
4
2
0
C
iss
10
V
= 14 V
DS
80 V
C
oss
C
rss
10
10
-1
10
2
0
10
20
30
40
(nC)
50
1
10
10
Q
G
V
(V)
DS
Tj = 25 °C; ID = 5 A
VGS = 0 V; f = 1 MHz
Fig. 14. Gate-source voltage as a function of gate
charge; typical values
Fig. 15. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
003aal013
30
I
S
(A)
25
20
15
10
5
175°C
0.4
T = 25°C
j
0
0
0.2
0.6
0.8
1
(V)
1.2
V
SD
VGS = 0 V
Fig. 16. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values
©
PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
8 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
11. Package outline
Plastic single ended surface mounted package LFPAK56D; 8 leads
SOT1205
E
A
A
b
c
1
1
L
1
mounting
base
D
1
D
2
D
H
L
1
2
3
4
X
b
(8x)
e
c
E
1
w
A
E
2
C
A
1
θ
L
p
y
C
detail X
0
2.5
5 mm
scale
Dimensions
Unit
D
(ref)
2
(1)
(1)
(1)
E
(1)
A
A
b
b
c
c
D
D
1
E
E
e
H
L
L
L
p
w
y
θ
1
1
1
1
2
1
°
8
0
max 1.05 0.1 0.50 4.4 0.25 0.30 4.70 4.55 3.5 5.30 1.8 0.85
nom
min 1.02 0.0 0.35 4.1 0.19 0.24 4.45 4.35 3.4 4.95 1.6 0.60
6.2 1.3 0.55 0.85
5.9 0.8 0.30 0.40
mm
1.27
0.25 0.1
°
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
sot1205_po
Issue date
References
Outline
version
European
projection
IEC
JEDEC
JEITA
14-08-21
14-10-28
SOT1205
Fig. 17. Package outline LFPAK56D; Dual LFPAK (SOT1205)
©
PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
9 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
12. Soldering
Footprint information for reflow soldering of LFPAK56D package
SOT1205
5.85
0.57
0.57
0.7
1.97
1.27
0.65
0.025
1.9
3.325
3.175
3.2
2.0
1.275
0.8
1.0
1.875
2.1
2.7
3.85
3.975
0.025
1.1
1.15
0.65
1.27
1.44
0.7
1.1
solder land
solder land plus solder paste
solder paste deposit
occupied area
14-07-28
solder resist
Dimensions in mm
sot1205_fr
Issue date
20-04-20
Fig. 18. Reflow soldering footprint for LFPAK56D; Dual LFPAK (SOT1205)
©
PSMN033-100HL
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Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
10 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
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13. Legal information
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Data sheet status
Document status Product
Definition
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
[1][2]
status [3]
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
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and products using Nexperia products, and Nexperia accepts no liability for
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Preliminary [short]
data sheet
Qualification
Production
This document contains data from
the preliminary specification.
Product [short]
data sheet
This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
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Definitions
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Trademarks
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
©
PSMN033-100HL
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
11 / 12
Nexperia
PSMN033-100HL
N-channel 100 V, 31 mOhm, logic level MOSFET in LFPAK56D using TrenchMOS technology
Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking..........................................................................2
8. Limiting values............................................................. 2
9. Thermal characteristics............................................... 4
10. Characteristics............................................................5
11. Package outline.......................................................... 9
12. Soldering................................................................... 10
13. Legal information......................................................11
© Nexperia B.V. 2022. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 30 September 2022
©
PSMN033-100HL
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
30 September 2022
12 / 12
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