PSMN1R5-30YLC [NEXPERIA]

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technologyProduction;


型号：	PSMN1R5-30YLC
厂家：	Nexperia
描述：	N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technologyProduction 开关脉冲晶体管
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PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using

NextPower technology

3 June 2021

Product data sheet

1. General description

Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed

and qualified for use in a wide range of industrial, communications and domestic equipment.

2. Features and benefits

•

High reliability Power SO8 package, qualified to 175°C

•

Optimised for 4.5V Gate drive utilising NextPower Superjunction technology

Ultra low QG, QGD, & QOSS for high system efficiencies at low and high loads

Ultra low Rdson and low parasitic inductance

3. Applications

•

DC-to-DC converters

Lithium-ion battery protection

Load switching

Power OR-ing

Server power supplies

Sync rectifier

4. Quick reference data

Table 1. Quick reference data

Symbol

V_DS

I_D

Parameter

Conditions

Min

Typ

Max

Unit

drain-source voltage

drain current

25 °C ≤ T_j≤ 175 °C

V_GS= 10 V; T_mb= 25 °C; Fig. 2

[1]

200

179

175

P_tot

total power dissipation T_mb= 25 °C; Fig. 1

junction temperature

T_j

-55

°C

Static characteristics

R_DSondrain-source on-state

resistance

V_GS= 4.5 V; I_D= 25 A; T_j= 25 °C;

Fig. 12

1.65

1.3

2.05

1.55

mΩ

V_GS= 10 V; I_D= 25 A; T_j= 25 °C;

Fig. 12

Dynamic characteristics

Q_GD

gate-drain charge

I_D= 25 A; V_DS= 15 V; V_GS= 4.5 V;

Fig. 14; Fig. 15

8.6

Q_G(tot)

total gate charge

I_D= 25 A; V_DS= 15 V; V_GS= 10 V;

Fig. 14; Fig. 15

[1] 200A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,

thermal design and operating temperature.

Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

5. Pinning information

Table 2. Pinning information

Symbol

Description

source

gate

Simplified outline

Graphic symbol

2 3 4

mounting base; connected

to drain

mbb076

LFPAK56; Power-

SO8 (SOT669)

6. Ordering information

Table 3. Ordering information

Type number

Package

Name

Description

Version

PSMN1R5-30YLC

LFPAK56;

Power-SO8

plastic, single-ended surface-mounted package; 4

terminals

SOT669

7. Marking

Table 4. Marking codes

Type number

Marking code

1C530L

PSMN1R5-30YLC

8. Limiting values

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_DS

Parameter

Conditions

Min

Max

Unit

drain-source voltage

drain-gate voltage

gate-source voltage

total power dissipation

drain current

25 °C ≤ T_j≤ 175 °C

25 °C ≤ T_j≤ 175 °C; R_GS= 20 kΩ

V_DGR

V_GS

-20

P_tot

T_mb= 25 °C; Fig. 1

179

200

179

1016

175

260

I_D

V_GS= 10 V; T_mb= 25 °C; Fig. 2

V_GS= 10 V; T_mb= 100 °C; Fig. 2

pulsed; t_p≤ 10 µs; T_mb= 25 °C; Fig. 3

[1]

I_DM

peak drain current

storage temperature

junction temperature

T_stg

T_j

-55

°C

T_sld(M)

peak soldering

temperature

V_ESD

electrostatic discharge

voltage

machine model according to JEDEC

JESD22-A115

1000

Source-drain diode

I_S

source current

T_mb= 25 °C

163

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

Symbol

Parameter

Conditions

Min

Max

Unit

I_SM

peak source current

pulsed; t_p≤ 10 µs; T_mb= 25 °C

1016

Avalanche ruggedness

E_DS(AL)Snon-repetitive drain-

I_D= 100 A; V_sup≤ 30 V; R_GS= 50 Ω;

147

158

source avalanche energy V_GS= 10 V; T_j(init)= 25 °C; unclamped

I_AS

non-repetitive avalanche V_sup= 30 V; V_GS= 10 V; T_j(init)= 25 °C;

[2]

current

R_GS= 50 Ω; Fig. 4

[1] 200A continuous current has been successfully demonstrated during application tests. Practically the current will be limited by PCB,

thermal design and operating temperature.

[2] Protected by 100% test.

03na19

003aaf644

120

300

250

200

150

100

(A)

der

(%)

(1)

100

150

200

75 100 125 150 175 200

(°C)

V_GS≥ 10V

(1) 200A continuous current has been successfully

demonstrated during application tests. Practically

the current will be limited by PCB, thermal design

and operating temperature

Fig. 1. Normalized total power dissipation as a

function of mounting base temperature

Fig. 2. Continuous drain current as a function of

mounting base temperature

003aaf645

10⁴

I_D

(A)

10³

Limit R_DSon= V_DS/ I_D

t_p=10 µs

10²

µs

100

1 ms

10 ms

100 ms

10^-1

10²

V_DS(V)

T_mb= 25°C; I_DMis a single pulse

Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

003aaf658

(A)

(1)

(2)

-3

-2

-1

(ms)

(1) T_{j (init)}= 25°C; (2) T_{j (init)}= 150°C;

Fig. 4. Single pulse avalanche rating; avalanche current as a function of avalanche time

9. Thermal characteristics

Table 6. Thermal characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

R_th(j-mb)

thermal resistance from Fig. 5

junction to mounting

base

0.71

0.84

K/W

003aaf 646

Z_th(j-mb)

(K/W)

= 0.5

0.2

10^-1

10^-2

10^-3

0.1

0.05

0.02

d =

single shot

10^-6

10^-5

10^-4

10^-3

10^-2

10^-1

t_p(s)

Fig. 5. Transient thermal impedance from junction to mounting base as a function of pulse duration

10. Characteristics

Table 7. Characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V_(BR)DSS

drain-source

breakdown voltage

I_D= 250 µA; V_GS= 0 V; T_j= 25 °C

I_D= 250 µA; V_GS= 0 V; T_j= -55 °C

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_GS(th)

gate-source threshold I_D= 1 mA; V_DS=V_GS; T_j= 25 °C; Fig. 10;

1.05

1.51

1.95

voltage

Fig. 11

I_D= 10 mA; V_DS=V_GS; T_j= 150 °C

I_D= 1 mA; V_DS=V_GS; T_j= -55 °C

V_DS= 30 V; V_GS= 0 V; T_j= 25 °C

V_DS= 30 V; V_GS= 0 V; T_j= 150 °C

V_GS= 16 V; V_DS= 0 V; T_j= 25 °C

V_GS= -16 V; V_DS= 0 V; T_j= 25 °C

0.5

2.25

I_DSS

drain leakage current

gate leakage current

µA

mΩ

100

2.05

I_GSS

R_DSon

drain-source on-state

resistance

V_GS= 4.5 V; I_D= 25 A; T_j= 25 °C;

Fig. 12

1.65

V_GS= 4.5 V; I_D= 25 A; T_j= 150 °C;

Fig. 12; Fig. 13

3.4

mΩ

V_GS= 10 V; I_D= 25 A; T_j= 25 °C;

Fig. 12

1.3

1.55

2.6

V_GS= 10 V; I_D= 25 A; T_j= 150 °C;

Fig. 12; Fig. 13

R_G

gate resistance

f = 1 MHz

1.05

2.1

Dynamic characteristics

Q_G(tot)

total gate charge

I_D= 25 A; V_DS= 15 V; V_GS= 10 V;

Fig. 14; Fig. 15

I_D= 25 A; V_DS= 15 V; V_GS= 4.5 V;

Fig. 14; Fig. 15

I_D= 0 A; V_DS= 0 V; V_GS= 10 V

Q_GS

gate-source charge

I_D= 25 A; V_DS= 15 V; V_GS= 4.5 V;

Fig. 14; Fig. 15

9.7

6.6

Q_GS(th)

pre-threshold gate-

source charge

Q_GS(th-pl)

post-threshold gate-

source charge

3.1

Q_GD

gate-drain charge

8.6

V_GS(pl)

gate-source plateau

voltage

I_D= 25 A; V_DS= 15 V; Fig. 14; Fig. 15

2.53

C_iss

C_oss

C_rss

input capacitance

output capacitance

V_DS= 15 V; V_GS= 0 V; f = 1 MHz;

T_j= 25 °C; Fig. 16

4044

860

reverse transfer

capacitance

287

t_d(on)

t_r

t_d(off)

t_f

turn-on delay time

rise time

V_DS= 15 V; R_L= 0.6 Ω; V_GS= 4.5 V;

R_G(ext)= 4.7 Ω

turn-off delay time

fall time

Q_oss

output charge

V_GS= 0 V; V_DS= 15 V; f = 1 MHz;

T_j= 25 °C

Source-drain diode

V_SD

t_rr

source-drain voltage

I_S= 25 A; V_GS= 0 V; T_j= 25 °C; Fig. 17

0.8

1.1

reverse recovery time I_S= 25 A; dI_S/dt = -100 A/µs; V_GS= 0 V;

V_DS= 15 V

Q_r

recovered charge

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

t_a

reverse recovery rise

time

I_S= 25 A; dI_S/dt = -100 A/µs; V_GS= 0 V;

V_DS= 15 V; Fig. 18

t_b

reverse recovery fall

time

003aaf 647

003aaf 648

100

3.0

2.8

I_D

R_DSon

(A)

)

2.6

4.5

2.4

V_GS(V) = 2.2

0.5

1.5

V_DS(V)

V_GS(V)

T_j= 25°C; I_D= 25A

Fig. 7. Drain-source on-state resistance as a function

of gate-source voltage; typical values

Fig. 6. Output characteristics; drain current as a

function of drain-source voltage; typical values

003aaf 653

003aaf 655

240

100

I_D

(A)

g_fs

(S)

180

120

T_j= 150 C

T_j= 25 C

100

V_GS(V)

I_D(A)

T_j= 25°C; V_DS= 10V

Fig. 8. Forward transconductance as a function of

drain current; typical values

Fig. 9. Transfer characteristics; drain-source current

as a function of gate-source voltage; typical

values

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

003aaf 652

003aaf 651

10^-1

I_D

V_GS(th)

(V)

(A)

10^-2

10^-3

10^-4

10^-5

Max (1mA)

I_D= 5mA

Min

Typ

Max

1mA

Min (5mA)

10^-6

-60

120

180

V_GS(V)

T_j( C)

T_j= 25°C; V_DS= 5V

Fig. 10. Sub-threshold drain current as a function of

gate-source voltage

Fig. 11. Gate-source threshold voltage as a function of

junction temperature

003aaf 649

003aaf 650

2.6

R_DSon

(mW)

10V

V_GS(V) = 2.8

1.5

V_GS=4.5V

0.5

3.0

3.5

4.5

100

-60

120

180

I_D(A)

T_j( C)

Fig. 12. Drain-source on-state resistance as a function

of drain current; typical values

Fig. 13. Normalized drain-source on-state resistance

factor as a function of junction temperature

PSMN1R5-30YLC

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

003aaf 656

V_GS

(V)

GS(pl)

GS(th)

24V

15V

V_DS= 6V

GS2

GS1

Q_G(nC)

G(tot)

003aaa508

T_j= 25°C; I_D= 25A

Fig. 14. Gate charge waveform definitions

Fig. 15. Gate-source voltage as a function of gate

charge; typical values

003aaf 654

003aaf 657

10⁴

100

I_S

(A)

(pF)

C_iss

10³

C_oss

T_j= 150 C

T_j= 25 C

C_rss

10²

10^-1

10²

0.3

0.6

0.9

1.2

V_DS(V)

V_SD(V)

V_GS= 0V; f = 1MHz

Fig. 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

Fig. 17. Source current as a function of source-drain

voltage; typical values

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

003aaf444

(A)

0.25 I

S =

t (s)

Fig. 18. Reverse recovery waveform definitions

PSMN1R5-30YLC

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Product data sheet

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PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

11. Package outline

Plastic single-ended surface-mounted package (LFPAK56; Power-SO8); 4 leads

SOT669

mounting

base

1/2 e

(A )

detail X

5 mm

scale

Dimensions (mm are the original dimensions)

(1)

Unit

max 1.20 0.15 1.10

nom

min 1.01 0.00 0.95

0.50 4.41 2.2 0.9 0.25 0.30 4.10 4.20 5.0 3.3

6.2 0.85 1.3 1.3

5.8 0.40 0.8 0.8

0.1

0.25

1.27

0.25

0.35 3.62 2.0 0.7 0.19 0.24 3.80

4.8 3.1

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

sot669_po

Issue date

11-03-25

References

Outline

version

European

projection

IEC

JEDEC

JEITA

SOT669

MO-235

13-02-27

Fig. 19. Package outline LFPAK56; Power-SO8 (SOT669)

PSMN1R5-30YLC

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Product data sheet

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PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

12. Soldering

Footprint information for reflow soldering

SOT669

4.7

4.2

0.9

0.6

(3×)

(4×)

0.25

(2×)

0.25

(2×)

3.5

3.45

0.6

2.55

(3×)

0.25

(2×)

SR opening =

Cu + 0.075

1.1

2.15

3.3

SP opening =

Cu - 0.050

0.7

(4×)

1.27

3.81

solder paste

solder lands

125 µm stencil

occupied area

Dimensions in mm

solder resist

sot669_fr

Fig. 20. Reflow soldering footprint for LFPAK56; Power-SO8 (SOT669)

PSMN1R5-30YLC

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Product data sheet

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Nexperia

PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

Wave soldering footprint information for LFPAK56 package

SOT669

4.826

1.78

1.72

2.1

1.4

0.6 (x4)

1.27

0.635

solder lands

Dimensions in mm

15-04-13

Issue date

15-04-16

sot669_fw

Fig. 21. Wave soldering footprint for LFPAK56; Power-SO8 (SOT669)

PSMN1R5-30YLC

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Product data sheet

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PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

injury, death or severe property or environmental damage. Nexperia and its

suppliers accept no liability for inclusion and/or use of Nexperia products in

such equipment or applications and therefore such inclusion and/or use is at

the customer’s own risk.

13. Legal information

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Data sheet status

Document status Product

Definition

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Nexperia makes no representation

or warranty that such applications will be suitable for the specified use

without further testing or modification.

[1][2]

status [3]

Objective [short]

data sheet

Development

This document contains data from

the objective specification for

product development.

Customers are responsible for the design and operation of their applications

and products using Nexperia products, and Nexperia accepts no liability for

any assistance with applications or customer product design. It is customer’s

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for the planned application and use of customer’s third party customer(s).

Customers should provide appropriate design and operating safeguards to

minimize the risks associated with their applications and products.

Preliminary [short]

data sheet

Qualification

Production

This document contains data from

the preliminary specification.

Product [short]

data sheet

This document contains the product

specification.

[1] Please consult the most recently issued document before initiating or

completing a design.

Nexperia does not accept any liability related to any default, damage, costs

or problem which is based on any weakness or default in the customer’s

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[2] The term 'short data sheet' is explained in section "Definitions".

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Definitions

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

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Characteristics sections of this document is not warranted. Constant or

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Product data sheet

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PSMN1R5-30YLC

N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology

Contents

1. General description......................................................1

2. Features and benefits.................................................. 1

3. Applications.................................................................. 1

4. Quick reference data....................................................1

5. Pinning information......................................................2

6. Ordering information....................................................2

7. Marking..........................................................................2

8. Limiting values............................................................. 2

9. Thermal characteristics............................................... 4

10. Characteristics............................................................4

11. Package outline........................................................ 10

12. Soldering................................................................... 11

13. Legal information......................................................13

For more information, please visit: http://www.nexperia.com

For sales office addresses, please send an email to: salesaddresses@nexperia.com

Date of release: 3 June 2021

PSMN1R5-30YLC

All information provided in this document is subject to legal disclaimers.

Product data sheet

3 June 2021

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PSMN1R5-30YLC [NEXPERIA]

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