PSMN5R3-25MLD [NEXPERIA]

N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 TechnologyProduction;
PSMN5R3-25MLD
型号: PSMN5R3-25MLD
厂家: Nexperia    Nexperia
描述:

N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using NextPowerS3 TechnologyProduction

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PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33  
using NextPowerS3 Technology  
6 April 2016  
Product data sheet  
1. General description  
Logic level gate drive N-channel enhancement mode MOSFET in LFPAK33 package.  
NextPowerS3 portfolio utilising Nexperia’s unique “SchottkyPlus” technology delivers  
high efficiency, low spiking performance usually associated with MOSFETS with an  
integrated Schottky or Schottky-like diode but without problematic high leakage current.  
NextPowerS3 is particularly suited to high efficiency applications at high switching  
frequencies.  
2. Features and benefits  
Ultra low QG, QGD and QOSS for high system efficiency, especially at higher switching  
frequencies  
Superfast switching with soft-recovery; s-factor > 1  
Low spiking and ringing for low EMI designs  
Unique “SchottkyPlus” technology; Schottky-like performance with < 1 µA leakage at  
25 °C  
Optimised for 4.5 V gate drive  
Low parasitic inductance and resistance  
High reliability clip bonded and solder die attach Mini Power SO8 package; no glue,  
no wire bonds, qualified to 175 °C  
Exposed leads for optimal visual solder inspection  
3. Applications  
On-board DC:DC solutions for server and telecommunications  
Secondary-side synchronous rectification in telecommunication applications  
Voltage regulator modules (VRM)  
Point-of-Load (POL) modules  
Power delivery for V-core, ASIC, DDR, GPU, VGA and system components  
Brushed and brushless motor control  
4. Quick reference data  
Table 1.  
Symbol  
Quick reference data  
Parameter  
Conditions  
Min  
Typ  
Max  
25  
Unit  
V
VDS  
ID  
drain-source voltage  
drain current  
25 °C ≤ Tj ≤ 175 °C  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
-
-
-
-
-
-
70  
A
Ptot  
total power dissipation Tmb = 25 °C; Fig. 1  
51  
W
 
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tj  
junction temperature  
-55  
-
175  
°C  
Static characteristics  
RDSon drain-source on-state  
resistance  
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;  
Fig. 10  
-
-
7.07  
5.25  
8.49  
5.9  
mΩ  
mΩ  
VGS = 10 V; ID = 15 A; Tj = 25 °C;  
Fig. 10  
Dynamic characteristics  
QG(tot) total gate charge  
ID = 15 A; VDS = 12 V; VGS = 10 V;  
Fig. 12; Fig. 13  
-
-
12.7  
5.9  
-
-
nC  
nC  
ID = 15 A; VDS = 12 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
ID = 0 A; VDS = 0 V; VGS = 10 V  
-
-
6.6  
1.3  
-
-
nC  
nC  
QGD  
gate-drain charge  
ID = 15 A; VDS = 12 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
Source-drain diode  
S
softness factor  
IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V;  
VDS = 12 V; Fig. 16  
-
0.7  
-
5. Pinning information  
Table 2.  
Pin  
Pinning information  
Symbol Description  
Simplified outline  
Graphic symbol  
D
S
1
S
S
S
G
D
source  
source  
source  
gate  
2
G
3
mbb076  
4
mb  
mounting base; connected to  
drain  
1
2
3
4
LFPAK33 (SOT1210)  
6. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name  
Description  
Version  
PSMN5R3-25MLD  
LFPAK33  
Plastic single ended surface mounted package  
(LFPAK33); 8 leads  
SOT1210  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
2 / 13  
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
7. Marking  
Table 4.  
Marking codes  
Type number  
Marking code  
PSMN5R3-25MLD  
5D325L  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
25  
Unit  
V
drain-source voltage  
drain-gate voltage  
gate-source voltage  
total power dissipation  
drain current  
25 °C ≤ Tj ≤ 175 °C  
-
VDGR  
VGS  
25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ  
-
25  
V
-20  
20  
V
Ptot  
Tmb = 25 °C; Fig. 1  
-
51  
W
A
ID  
VGS = 10 V; Tmb = 25 °C; Fig. 2  
VGS = 10 V; Tmb = 100 °C; Fig. 2  
pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 3  
-
70  
-
50.3  
285  
175  
175  
260  
-
A
IDM  
peak drain current  
-
A
Tstg  
Tj  
storage temperature  
junction temperature  
peak soldering temperature  
-55  
-55  
-
°C  
°C  
°C  
V
Tsld(M)  
VESD  
Source-drain diode  
electrostatic discharge voltage HBM (JEDEC)  
300  
IS  
source current  
peak source current  
Tmb = 25 °C  
-
-
42.4  
285  
A
A
ISM  
pulsed; tp ≤ 10 µs; Tmb = 25 °C  
Avalanche ruggedness  
EDS(AL)S  
non-repetitive drain-source  
avalanche energy  
ID = 15 A; Vsup ≤ 25 V; RGS = 50 Ω;  
VGS = 10 V; Tj(init) = 25 °C; unclamped;  
tp = 315 µs  
[1]  
-
76.7  
mJ  
[1] Protected by 100% test  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
3 / 13  
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
03aa16  
aaa-022675  
120  
80  
60  
40  
20  
0
I
D
(A)  
P
der  
(%)  
80  
40  
0
0
25  
50  
75 100 125 150 175 200  
0
50  
100  
150  
200  
T
(°C)  
T
(°C)  
mb  
mb  
VGS ≥ 10 V  
(1) Capped at 70A due to package  
Fig. 1. Normalized total power dissipation as a  
function of mounting base temperature  
Fig. 2. Continuous drain current as a function of  
mounting base temperature  
aaa-022680  
3
10  
I
D
(A)  
Limit R  
= V / I  
DS D  
DSon  
2
10  
t
= 10 us  
p
100 us  
10  
DC  
1 ms  
10 ms  
100 ms  
1
-1  
10  
-1  
2
10  
1
10  
10  
V
DS  
(V)  
Tmb = 25 °C; IDM is a single pulse  
Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage  
9. Thermal characteristics  
Table 6.  
Symbol  
Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
2.95  
Unit  
Rth(j-mb)  
thermal resistance  
from junction to  
mounting base  
Fig. 4  
-
2.55  
K/W  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
4 / 13  
 
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
Symbol  
Parameter  
Conditions  
Fig. 5  
Min  
Typ  
57  
Max  
Unit  
K/W  
K/W  
Rth(j-a)  
thermal resistance  
from junction to  
ambient  
-
-
-
-
Fig. 6  
178  
aaa-022683  
10  
Z
th(j-mb)  
(K/W)  
δ = 0.5  
1
0.2  
0.1  
0.05  
t
p
-1  
P
10  
δ =  
0.02  
T
single shot  
t
t
p
T
-2  
10  
-6  
-5  
-4  
-3  
-2  
-1  
10  
10  
10  
10  
10  
10  
1
t
p
(s)  
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration  
aaa-008476  
aaa-008477  
Fig. 5. PCB layout for thermal resistance junction to  
ambient 1" square pad; FR4 Board; 2oz copper  
Fig. 6. PCB layout for thermal resistance junction to  
ambient minimum footprint; FR4 Board; 2oz  
copper  
10. Characteristics  
Table 7.  
Symbol  
Characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Static characteristics  
V(BR)DSS drain-source  
breakdown voltage  
ID = 250 µA; VGS = 0 V; Tj = 25 °C  
ID = 250 µA; VGS = 0 V; Tj = -55 °C  
25  
-
-
V
V
V
22.5  
1.2  
-
-
VGS(th)  
gate-source threshold ID = 1 mA; VDS=VGS; Tj = 25 °C  
voltage  
1.8  
2.2  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
5 / 13  
 
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
ΔVGS(th)/ΔT  
gate-source threshold 25 °C ≤ Tj ≤ 175 °C  
voltage variation with  
-
-4.3  
-
mV/K  
temperature  
IDSS  
drain leakage current  
gate leakage current  
VDS = 20 V; VGS = 0 V; Tj = 25 °C  
-
-
-
-
-
-
1
µA  
µA  
nA  
nA  
mΩ  
VDS = 20 V; VGS = 0 V; Tj = 125 °C  
VGS = 20 V; VDS = 0 V; Tj = 25 °C  
VGS = -20 V; VDS = 0 V; Tj = 25 °C  
1.51  
-
IGSS  
-
100  
100  
8.49  
-
RDSon  
drain-source on-state  
resistance  
VGS = 4.5 V; ID = 15 A; Tj = 25 °C;  
Fig. 10  
7.07  
VGS = 4.5 V; ID = 15 A; Tj = 175 °C;  
Fig. 10; Fig. 11  
-
-
-
-
-
14.43 mΩ  
VGS = 10 V; ID = 15 A; Tj = 25 °C;  
Fig. 10  
5.25  
-
5.9  
mΩ  
VGS = 10 V; ID = 15 A; Tj = 175 °C;  
Fig. 10; Fig. 11  
10.03 mΩ  
RG  
gate resistance  
f = 1 MHz  
0.75  
-
Ω
Dynamic characteristics  
QG(tot)  
total gate charge  
ID = 15 A; VDS = 12 V; VGS = 10 V;  
Fig. 12; Fig. 13  
-
-
12.7  
5.9  
-
-
nC  
nC  
ID = 15 A; VDS = 12 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
ID = 0 A; VDS = 0 V; VGS = 10 V  
-
-
-
6.6  
2.7  
1.5  
-
-
-
nC  
nC  
nC  
QGS  
gate-source charge  
ID = 15 A; VDS = 12 V; VGS = 4.5 V;  
Fig. 12; Fig. 13  
QGS(th)  
pre-threshold gate-  
source charge  
QGS(th-pl)  
post-threshold gate-  
source charge  
-
1.2  
-
nC  
QGD  
gate-drain charge  
-
-
1.3  
3
-
-
nC  
V
VGS(pl)  
gate-source plateau  
voltage  
ID = 15 A; VDS = 12 V; Fig. 12; Fig. 13  
Ciss  
Coss  
Crss  
input capacitance  
output capacitance  
VDS = 12 V; VGS = 0 V; f = 1 MHz;  
Tj = 25 °C; Fig. 14  
-
-
-
858  
628  
55  
-
-
-
pF  
pF  
pF  
reverse transfer  
capacitance  
td(on)  
tr  
td(off)  
tf  
turn-on delay time  
rise time  
VDS = 12 V; RL = 1 Ω; VGS = 4.5 V;  
RG(ext) = 5 Ω  
-
-
-
-
8.4  
8
-
-
-
-
ns  
ns  
ns  
ns  
turn-off delay time  
fall time  
9
4.9  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
6 / 13  
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
Symbol  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Qoss  
output charge  
VGS = 0 V; VDS = 12 V; f = 1 MHz;  
Tj = 25 °C  
-
10.1  
-
nC  
Source-drain diode  
VSD source-drain voltage  
trr  
IS = 10 A; VGS = 0 V; Tj = 25 °C; Fig. 15  
-
-
-
-
0.82  
19.3  
10.8  
11.2  
1.2  
V
reverse recovery time IS = 15 A; dIS/dt = -100 A/µs; VGS = 0 V;  
-
-
-
ns  
nC  
ns  
VDS = 12 V; Fig. 16  
recovered charge  
Qr  
ta  
[1]  
reverse recovery rise  
time  
tb  
S
reverse recovery fall  
time  
-
-
8
-
-
ns  
softness factor  
0.7  
[1] includes capacitive recovery  
aaa-022676  
aaa-022679  
80  
60  
40  
20  
0
20  
R
DSon  
I
D
4.5 V  
10 V  
(A)  
(mΩ)  
16  
12  
8
3.5 V  
V
GS  
= 3 V  
4
2.8 V  
2.6 V  
0
0
0.5  
1
1.5  
2
DS  
2.5  
0
2
4
6
8
10  
12  
V
GS  
14  
(V)  
16  
V
(V)  
Tj = 25 °C  
Tj = 25 °C; ID = 15 A  
Fig. 7. Output characteristics; drain current as a  
function of drain-source voltage; typical values  
Fig. 8. Drain-source on-state resistance as a function  
of gate-source voltage; typical values  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
7 / 13  
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
aaa-022681  
aaa-022678  
80  
25  
I
R
DSon  
(mΩ)  
D
3 V  
3.5 V  
(A)  
20  
15  
10  
5
60  
40  
20  
0
4.5 V  
175°C  
2.4  
T = 25°C  
j
V
= 10 V  
GS  
0
0
0.8  
1.6  
3.2  
4
0
10  
20  
30  
40  
50  
60  
70  
I (A)  
D
80  
V
(V)  
GS  
VDS = 12 V  
Tj = 25 °C  
Fig. 9. Transfer characteristics; drain current as a  
function of gate-source voltage; typical values  
Fig. 10. Drain-source on-state resistance as a function  
of drain current; typical values  
aaa-021697  
aaa-022677  
2
10  
a
V
GS  
(V)  
10 V  
1.6  
8
6
4
2
0
1.2  
0.8  
0.4  
0
V
GS  
= 4.5 V  
20 V  
12 V  
V
= 5 V  
DS  
-60 -30  
0
30  
60  
90 120 150 180  
T (°C)  
0
4
8
12  
16  
(nC)  
G
20  
Q
j
Tj = 25 °C; ID = 15 A  
Fig. 11. Normalized drain-source on-state resistance  
factor as a function of junction temperature  
Fig. 12. Gate-source voltage as a function of gate  
charge; typical values  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
8 / 13  
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
aaa-022684  
4
10  
V
C
DS  
(pF)  
I
D
3
10  
V
V
GS(pl)  
C
iss  
C
oss  
GS(th)  
V
GS  
2
Q
GS2  
10  
Q
GS1  
C
rss  
Q
GS  
Q
GD  
Q
G(tot)  
003aaa508  
10  
10  
Fig. 13. Gate charge waveform definitions  
-1  
2
1
10  
10  
V
DS  
(V)  
VGS = 0 V; f = 1 MHz  
Fig. 14. Input, output and reverse transfer capacitances  
as a function of drain-source voltage; typical  
values  
003aal160  
aaa-022682  
3
2
10  
I
S
I
D
(A)  
(A)  
10  
t
rr  
t
t
b
a
0
10  
0.25 I  
RM  
1
175°C  
T = 25°C  
j
I
RM  
-1  
10  
t (s)  
0
0.2  
0.4  
0.6  
0.8  
1
(V)  
1.2  
V
SD  
Fig. 16. Reverse recovery timing definition  
VGS = 0 V  
Fig. 15. Source-drain (diode forward) current as a  
function of source-drain (diode forward)  
voltage; typical values  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
9 / 13  
 
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
11. Package outline  
Plastic single ended surface mounted package (LFPAK33); 8 leads  
SOT1210  
A
E
A
e
1
c
1
b
1
E
L
1
D
2
mounting  
base  
D
1
D
H
1
4
e
X
b
w
A
c
A
C
1
θ
Lp  
y
C
detail X  
0
1
2.5  
5 mm  
scale  
Dimensions  
(1)  
(1)  
(1)  
E
Unit  
A
A
b
b
c
c
D
D
1
D
2
E
e
e
H
L
L
p
w
y
θ
1
1
1
1
°
max 0.90 0.10 0.35 0.35 0.20 0.30 2.70 2.35  
nom  
3.40 2.45  
3.20 2.00  
3.40 0.25 0.50  
3.20 0.13 0.30  
8
0
mm  
0.50  
0.65 0.65  
0.20 0.10  
°
0.80 0.00 0.25 0.25 0.10 0.20 2.50 1.90  
min  
Note  
1. Plastic or metal protrusions of 0.15 mm per side are not included.  
sot1210_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
12-03-12  
14-04-25  
SOT1210  
Fig. 17. Package outline LFPAK33 (SOT1210)  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
10 / 13  
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
12. Legal information  
12.1 Data sheet status  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of Nexperia.  
Document  
Product  
Definition  
status [1][2] status [3]  
Objective  
[short] data  
sheet  
Development This document contains data from  
Right to make changes — Nexperia reserves the right to  
the objective specification for product  
development.  
make changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Preliminary  
[short] data  
sheet  
Qualification This document contains data from the  
preliminary specification.  
Suitability for use — Nexperia products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of a Nexperia product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. Nexperia and its suppliers accept no liability for  
inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Product  
[short] data  
sheet  
Production  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the Internet at URL http://www.nexperia.com.  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
12.2 Definitions  
Preview — The document is a preview version only. The document is still  
subject to formal approval, which may result in modifications or additions.  
Nexperia does not give any representations or warranties as to  
the accuracy or completeness of information included herein and shall have  
no liability for the consequences of use of such information.  
Customers are responsible for the design and operation of their  
applications and products using Nexperia products, and Nexperia  
accepts no liability for any assistance with applications or  
customer product design. It is customer’s sole responsibility to determine  
whether the Nexperia product is suitable and fit for the  
customer’s applications and products planned, as well as for the planned  
application and use of customer’s third party customer(s). Customers should  
provide appropriate design and operating safeguards to minimize the risks  
associated with their applications and products.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences  
of use of such information.  
Nexperia does not accept any liability related to any default,  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the  
relevant full data sheet, which is available on request via the local Nexperia  
sales office. In case of any inconsistency or conflict with the  
damage, costs or problem which is based on any weakness or default  
in the customer’s applications or products, or the application or use by  
customer’s third party customer(s). Customer is responsible for doing all  
necessary testing for the customer’s applications and products using Nexperia  
products in order to avoid a default of the applications  
and the products or of the application or use by customer’s third party  
customer(s). Nexperia does not accept any liability in this respect.  
short data sheet, the full data sheet shall prevail.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the Nexperia product  
is deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Terms and conditions of commercial sale — Nexperia  
12.3 Disclaimers  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. Nexperia hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of Nexperia products by customer.  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give  
any representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no  
responsibility for the content in this document if provided by an information  
source outside of Nexperia.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
11 / 13  
 
 
 
 
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor  
tested in accordance with automotive testing or application requirements.  
Nexperia accepts no liability for inclusion and/or use of non-  
automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty  
of the product for such automotive applications, use and specifications, and  
(b) whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies Nexperia for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond Nexperia’s  
standard warranty and Nexperia’s product specifications.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
12 / 13  
 
Nexperia  
PSMN5R3-25MLD  
N-channel 25 V, 5.3 mΩ logic level MOSFET in LFPAK33 using  
NextPowerS3 Technology  
13. Contents  
1
General description ............................................... 1  
Features and benefits ............................................1  
2
3
Applications ........................................................... 1  
Quick reference data ............................................. 1  
Pinning information ...............................................2  
Ordering information .............................................2  
Marking ...................................................................3  
Limiting values .......................................................3  
Thermal characteristics .........................................4  
Characteristics .......................................................5  
Package outline ................................................... 10  
4
5
6
7
8
9
10  
11  
12  
Legal information .................................................11  
Data sheet status ............................................... 11  
Definitions ...........................................................11  
Disclaimers .........................................................11  
Trademarks ........................................................ 12  
12.1  
12.2  
12.3  
12.4  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 06 April 2016  
©
PSMN5R3-25MLD  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
6 April 2016  
13 / 13  

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