NJW1320FP1 [NJRC]
Audio/Video Switch, 3 Func, 4 Channel, BICMOS, PQFP48, QFP-48;
| 型号： | NJW1320FP1 |
| 厂家： | 
NEW JAPAN RADIO |
| 描述： | Audio/Video Switch, 3 Func, 4 Channel, BICMOS, PQFP48, QFP-48 信息通信管理 |
| 文件： | 总12页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NJW1320
WIDE BAND VIDEO SWITCH WITH I2C BUS
ꢀ GENERAL DESCRIPTION
The NJW1320 is a Wide Band Video Switch with I2C BUS.The
NJW1320 includes switch of 4-input 3-output and 6dB amplifier. It is
suitable for Y, Pb, and Pr signal because frequency range is
50MHz.The NJW1320 includes external logic control terminals and
external logic discernment terminals. The NJW1320 is suitable for
PTV, DTV, PDP and other high quality AV systems.
NJW1320FP1
ꢀ FEATURES
ꢀ Operating Voltage
9.0V
ꢀ 4-input 3-output 3-Circuits (Y, Pb, and Pr signal)
ꢀ Wide frequency range
0dB at 50MHz typ.
ꢀ Internal 6dB amplifier (Selectable Bypass or 6dB)
ꢀ External logic discernment terminal
ꢀ External logic control terminal
ꢀ Selectable slave address
ꢀ Power Save Circuit
ꢀ I2C BUS control
ꢀ Bi-CMOS Technology
ꢀ Package Outline
QFP48
ꢀ BLOCK DIAGRAM
Y IN1
Y OUT1
Y OUT2
Y OUT3
6dB
6dB
6dB
Y IN2
Y IN3
Y IN4
Pb IN1
6dB
6dB
6dB
Pb OUT1
Pb OUT2
Pb OUT3
Pb IN2
Pb IN3
Pb IN4
Pr IN1
Pr OUT1
Pr OUT2
Pr OUT3
6dB
6dB
6dB
Pr IN2
Pr IN3
Pr IN4
PORT 0
PORT 1
PORT 2
PORT 3
VCC
ADDRESS
SDA
SCL
I2C BUS
AUX 0
AUX 1
AUX 2
AUX 3
DGND
GND
BIAS
VREF
Ver.4
- 1 -
NJW1320
ꢀPIN CONFIGURATION
38
25
39
48
Y IN4
GND
24
15
SDA
Pb IN4
SCL
DGND
GND
VREF
PORT0
PORT1
PORT2
PORT3
GND
Pr IN4
V+
Y IN3
GND
Pb IN3
GND
1
14
1. Pr IN3
2. GND
15. PORT3
16. PORT2
17. PORT1
18. PORT0
19. VREF
20. GND
25. AUX0
39. Y IN4
40. GND
41. Pb IN4
42. GND
43. Pr IN4
44. V+
26. AUX1
3. Y IN2
4. GND
27. Pr OUT3
28. Pb OUT3
29. Y OUT3
30. AUX2
5. Pb IN2
6. GND
7. Pr IN2
8. GND
21. DGND
22. SCL
31. Pr OUT2
32. Pb OUT2
33. Y OUT2
34. AUX3
45. Y IN3
46. GND
47. Pb IN3
48. GND
9. Y IN1
10. GND
11. Pb IN1
12. GND
13. Pr IN1
14. GND
23. SDA
24. ADR
35. Pr OUT1
36. Pb OUT1
37. Y OUT1
38. GND
- 2 -
NJW1320
ꢀ ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
PARAMETER
SYMBOL
RATINGS
UNIT
Supply Voltage
V+
PD
12.0
V
mW
°C
Power Dissipation
1875(note)
-25 to +75
-40 to +150
Topr
Tstg
Operating Temperature Range
Storage Temperature Range
°C
(Note) At on a board of EIA/JEDEC specification. (76.2 × 114.3 × 1.6mm Two layers, FR-4)
ꢀ ELECTRICAL CHARACTERISTICS (V+=9.0V, RL=10KΩ, Ta=25°C)
ꢀVIDEO
PARAMETER
Operating Voltage
Operating Current
Maximum Output Voltage
SYMBOL
V+
TEST CONDITION
MIN.
8.0
-
TYP. MAX. UNIT
9.0
70
2.5
10.0
100
-
V
mA
Vp-p
Icc
Vom
No signal
f=100kHz, THD=1%
2.0
Vin=100kHz, 1.0Vp-p Sin signal
6dB Mode
Voltage Gain 1
Gv1
Gv2
Gf1
Gf2
6.0
6.4
0.0
0
6.8
0.5
-
dB
dB
dB
dB
Vin=100kHz, 1.0Vp-p Sin signal
Bypass Mode
Voltage Gain 2
-0.5
Vin=50MHz / 100kHz, 1.0Vp-p Sin signal
6dB Mode
Frequency Characteristic 1
Frequency Characteristic 2
-
-
Vin=50MHz / 100kHz, 1.0Vp-p Sin signal
0
-
Bypass Mode
Cross talk 1
Cross talk 2
Differential Gain
Differential Phase
S/N
CTB1
CTB2
DG
DP
SNv
Vin=4.43MHz,1.0Vp-p Sin signal
Vin=30MHz,1.0Vp-p Sin signal
Vin=1.0Vp-p 10step Video signal
Vin=1.0Vp-p 10step Video signal
Vin=1.0Vp-p,100% White Video Signal
-
-
-
-
-
-60
-40
0.3
0.3
65
-50
dB
dB
%
deg
dB
-
-
-
-
ꢀPORT, AUX
PARAMETER
SYMBOL
VPTH
VPTM
TEST CONDITION
MIN.
3.5
1.4
0
TYP. MAX. UNIT
PORT Input Voltage H
PORT Input Voltage M
PORY Input Voltage L
-
-
-
5.5
2.4
0.8
V
V
V
VPTL
AUX Output Voltage H
AUX Output Voltage M
AUX Output Voltage L
ADR Input Voltage H
ADR Input Voltage L
VAUXH
VAUXM
VAUXL
VADRH
VADRL
3.5
1.4
0
3.5
0
-
-
-
-
-
5.5
2.4
0.8
5.0
1.0
V
V
V
V
V
- 3 -
NJW1320
ꢀ I2C BUS BLOCK CHARACTERISTICS (SDA,SCL)
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
SYMBOL
VIH
MIN.
3.0
0
-
-
0
-3.0
-
4.7
4.0
4.7
4.0
4.7
5.0
250
-
TYP.
MAX.
UNIT
V
V
µA
µA
V
mA
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5.0
1.5
10
10
0.4
-
100
-
-
-
-
-
-
VIL
IIH
IIL
VOL
IOL
fSCL
tBUF
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
Low Level Output Voltage (3mA at SDA pin)
Maximum Output Current
Maximum Clock Frequency
Data Change Minimum Waiting Time
Data Transfer Start Minimum Waiting Time
Low Level Clock Pulse Width
High Level Clock Pulse Width
Minimum Start Preparation Waiting Time
Minimum Data Hold Time
Minimum Data Preparation Time
Rise Time
Fall Time
-
1.0
300
-
tF
tSU:STO
-
Minimum Stop Preparation Waiting Time
4.7
I2C BUS Load Condition:
Pull up resistance 4kΩ (Connected to +5V)
Load capacitance 200pF (Connected to GND)
SDA
SCL
tBUF
tR
tF
tHD:STA
tSU:STA
tSU:STO
tHD:STA tLOW
tHD:DAT
tHIGH
tSU:DAT
Sr
P
S
- 4 -
NJW1320
ꢀ TERMINAL DESCRIPTION
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLTAGE
V+
V+
V+
9
11
13
3
Y1 IN
Pb1 IN
Pr1 IN
Y2 IN
Y1 IN
Y2 IN
Y3 IN
Y4 IN
5
Pb2 IN
Pr2 IN
Y3 IN
Pb1 IN
Pb2 IN
Pb3 IN
Pb4 IN
Pr1 IN
Pr2 IN
Pr3 IN
150kΩ
7
Component signal
input terminal
100Ω
4.4V
45
47
1
Pb3 IN
Pr3 IN
Y4 IN
39
41
43
Pb4 IN
Pr4 IN
V+
V+
PORT0
18
17
16
15
PORT0
PORT1
PORT2
PORT3
PORT1
PORT2
PORT3
Logic input terminal
-
66Ω
100kΩ
V+
V+
V+
66Ω
Reference voltage
terminal
VREF
5.0V
19
VREF
48kΩ
2
4
6
8
10
12
14
20
38
40
42
46
48
Ground terminal
Ground terminal
-
-
GND
21
DGND
- 5 -
NJW1320
No.
SYMBOL
FUNCTION
EQUIVALENT CIRCUIT
VOLTAGE
-
SCL
SDA
I2C clock terminal
I2C data terminal
22
23
SCL
SDA
80kΩ
V+
V+
VREF
Slave address
setting terminal
-
ADR
24
ADR
66Ω
V+
V+
V+
1kΩ
AUX0
AUX1
AUX2
AUX3
25
26
27
28
AUX0
AUX1
AUX2
AUX3
0V
66Ω
Auxiliary 3 values voltage
output terminal
1.9V
5.0V
V+
V+
Y1 OUT
Y2 OUT
Y3 OUT
Pb1 OUT
Pb2 OUT
Pb3 OUT
Pr1 OUT
Pr2 OUT
Pr3 OUT
37
34
31
36
33
30
35
32
29
Y1 OUT
Y2 OUT
Y3 OUT
Pb1 OUT
Pb2 OUT
Pb3 OUT
Pr1 OUT
Pr2 OUT
Pr3 OUT
Component signal
output terminal
3.0V
50Ω
Supply voltage terminal
-
44
V+
- 6 -
NJW1320
ꢀ DEFINITION OF I2C REGISTER
♦ I2C BUS FORMAT
MSB
LSB
MSB
LSB
MSB
LSB
Slave Address
S
1bit
A
1bit
Data
8bit
A
1bit
Data
8bit
A
P
8bit
1bit 1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦ SLAVE ADDRESS
R/W: Set the Write Mode or Read Mode.
ADR : Set the Slave Address by “ADR” terminal.
Slave Address
Hex
MSB
LSB
-
-
-
1
0
0
0
0
0
ADR
R/W
ꢀ R/W = 0 : Write Mode, ADR = 0/1
1
1
0
0
0
0
1
1
0
0
1
1
0
1
0
0
94(h)
96(h)
-
ꢀ R/W = 1 : Read Mode, ADR = 0/1
1
1
0
0
0
0
1
1
0
0
1
1
0
1
1
1
95(h)
97(h)
♦ CONTROL REGISTER TABLE
< Write Mode >
BIT
No.
D4
OUT1
D3
D2
D1
D0
D7
PS2
D6
PS3
OUT3
D5
D5
Data1
Data2
Data3
OUT2
ꢀ
AUX0
AUX1
AUX2
AUX3
ꢀ : Don’t Care
< Read Mode >
BIT
BIT
No.
D4
D3
D3
D2
D1
D0
D7
D6
Data
PORT0
PORT1
PORT2
PORT3
♦ CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
No.
D4
D2
D1
D0
D7
0
0
0
D6
0
0
0
D5
0
0
0
Data1
Data2
Data3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
- 7 -
NJW1320
INSTRUCTION CODE
♦ POWER SAVE, OUTPUT SETTING
BIT
No.
D4
D3
D2
D1
D0
D7
D6
D5
Data1
Data2
PS2
PS3
OUT3
OUT1
OUT2
ꢀ
ꢀ : Don’t Care
•PS2, PS3: Power Save Setting
Power Save
D7
0
D6
OUT1 ON
OUT1 ON
OUT1 ON
OUT1 ON
OUT2 ON
OUT2 ON
OUT2 OFF
OUT3 ON
OUT3 OFF
OUT3 ON
0
1
0
1
0
1
1
OUT2 OFF OUT3 OFF
ON: Power Save OFF, OFF: Power Save ON
•OUT1: Output 1 Setting
D4
0
Output 1
PbIN1
PbIN2
PbIN3
PbIN4
D5
0
Gain
6dB
0dB
D3
0
1
YIN1
YIN2
YIN3
YIN4
PrIN1
PrIN2
PrIN3
PrIN4
0
1
1
1
0
1
•OUT2: Output 2 Setting
D1
0
Gain
6dB
0dB
D0
0
1
Output 2
D2
0
YIN1
YIN2
YIN3
YIN4
PbIN1
PbIN2
PbIN3
PbIN4
PrIN1
PrIN2
PrIN3
PrIN4
0
1
1
1
0
1
•OUT3: Output 3 Setting
D6
0
Gain
6dB
0dB
D5
0
1
Output 3
D7
0
YIN1
YIN2
YIN3
YIN4
PbIN1
PbIN2
PbIN3
PbIN4
PrIN1
PrIN2
PrIN3
PrIN4
0
1
1
1
0
1
- 8 -
NJW1320
♦ AUX: AUXILIARY SETTING
BIT
Select
Address
D4
D3
D2
D1
D0
D7
D6
D5
Data3
AUX0
D7
0
0
1
AUX1
AUX2
AUX3
AUX0
D6
0
L
M
H
1
1
AUX1
D5
0
D4
0
L
M
H
0
1
1
1
AUX2
D3
0
D2
0
L
M
H
0
1
1
1
AUX3
D1
0
D0
0
L
M
H
0
1
1
1
♦ PORT: PORT SETTING
BIT
Select
Address
D4
D3
D2
D1
D0
D7
D6
D5
Data
PORT0
PORT0
PORT1
PORT2
PORT3
D7
0
D6
0
OPEN
L
M
H
0
0
0
1
1
1
PORT0
OPEN
D7
0
D6
0
L
M
H
0
0
0
1
1
1
PORT0
OPEN
D7
0
D6
0
L
M
H
0
0
0
1
1
1
PORT3
OPEN
D1
0
D0
0
L
M
H
0
0
0
1
1
1
- 9 -
NJW1320
ꢀ TEST CIRCUIT
Y1 OUT
Pr1 OUT
Y2 OUT
Pr2 OUT
Y3 OUT
Pr3 OUT
AUX0
V+
Pb1 OUT
AUX3
Pb2 OUT
AUX2
Pb3 OUT
AUX1
R13
10k
R14
10k
R15
R47
R16
10k
R17
10k
R18
R48
R19
10k
R20
10k
R21
R49
10k
R50
10k
10k
10k
10k
10k
10k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
C44
100uF
C45
0.1uF
+
C25
C26 C27
C28 C29
C30
C31
C32 C33
C34 C35
C36
C37
C38 C39
C40 C41
C42
+
+
+
+
+
+
+
+
+
0.1uF
0.1uF
10uF
0.1uF
10uF
0.1uF
0.1uF
10uF
0.1uF
10uF
0.1uF
0.1uF
10uF
0.1uF
10uF
10uF
10uF
10uF
38
39
37
36
35
34
33
32
31
30
29
28
27
26
25
24
Y4 IN
R1
C1 1uF
+
ADR
SCL
50Ω/75Ω
C2 0.1uF
40
41
42
43
44
45
46
47
48
23
22
21
20
19
18
17
16
15
Pb4 IN C3 1uF
+
R2
50Ω/75Ω
C4 0.1uF
Pr4 IN
C5 1uF
+
R3
NJW1320
50Ω/75Ω
C6 0.1uF
C43
+
1uF
Y3 IN C7 1uF
+
PORT0
R4
50Ω/75Ω
C8 0.1uF
PORT1
PORT2
Pb3 IN C9 1uF
+
R5
50Ω/75Ω
C10 0.1uF
PORT3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
+
+
+
+
+
+
+
C11
1uF
C13
1uF
C15
1uF
C17
1uF
C19
1uF
C21
1uF
C23
1uF
C12
0.1uF
C14
0.1uF
C16
0.1uF
C18
0.1uF
C20
0.1uF
C22
0.1uF
C24
0.1uF
R6
50Ω/75Ω
R7
50Ω/75Ω
R8
50Ω/75Ω
R9
50Ω/75Ω
R10
50Ω/75Ω
R11
50Ω/75Ω
R12
50Ω/75Ω
Pr3 IN
Y2 IN
Pb2 IN
Pr2 IN
Y1 IN
Pb1 IN
Pr1 IN
- 10 -
NJW1320
ꢀAPPLACATION CIRCUIT
Y1 OUT
Pr1 OUT
Y2 OUT
Pr2 OUT
Y3 OUT
Pr3 OUT
AUX0
Pb1 OUT
AUX3
Pb2 OUT
AUX2
Pb3 OUT
AUX1
V+
R13
10k
R14
10k
R15
R47
R16
10k
R17
10k
R18
R48
R19
10k
R20
10k
R21
R49
10k
R50
10k
10k
10k
10k
10k
10k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
C44
100uF
C45
0.1uF
C25
C26C27
C28 C29
C30
C31
C32 C33
C34 C35
C36
C37
C38 C39
C40 C41
C42
+
+
+
+
+
+
+
+
+
+
0.1uF
0.1uF
10uF
0.1uF
10uF
0.1uF
0.1uF
10uF
0.1uF
10uF
0.1uF
0.1uF
10uF
0.1uF
10uF
10uF
10uF
R29
10uF
R32
R26
1.5k
R27
R28
R30
R31
R33
R34
1.5k
1.5k
1.5k
1.5k
1.5k
1.5k
1.5k
1.5k
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
38
39
37
36
35
34
33
32
31
30
29
28
27
26
25
24
Y4 IN
R1
C1 1uF
+
ADR
SCL
50Ω/75Ω
C2 0.1uF
40
41
42
43
44
45
46
47
48
23
22
21
20
19
18
17
16
15
C3 1uF
+
Pb4 IN
R2
50Ω/75Ω
C4 0.1uF
Pr4 IN
C5 1uF
+
R3
NJW1320
50Ω/75Ω
C6 0.1uF
C43
+
1uF
Y3 IN C7 1uF
+
PORT0
R4
50Ω/75Ω
C8 0.1uF
PORT1
PORT2
C9 1uF
+
Pb3 IN
R5
50Ω/75Ω
C10 0.1uF
PORT3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
+
+
+
+
+
+
+
C11
1uF
C13
1uF
C15
1uF
C17
1uF
C19
1uF
C21
1uF
C23
1uF
C12
0.1uF
C14
0.1uF
C16
0.1uF
C18
0.1uF
C20
0.1uF
C22
0.1uF
C24
0.1uF
R6
50Ω/75Ω
R7
50Ω/75Ω
R8
50Ω/75Ω
R9
50Ω/75Ω
R10
50Ω/75Ω
R11
50Ω/75Ω
R12
50Ω/75Ω
Pr3 IN
Y2 IN
Pb2 IN
Pr2 IN
Y1 IN
Pb1 IN
Pr1 IN
Addition of R26-R34 improves the through rate in high frequency. Resistance turns into a reference value.
- 11 -
NJW1320
ꢀNOTE
Please ground all of 2, 4, 6, 8, 10, 12, 14, 20, 21, 38, 40, 42, 46, and 48pin.
When the power supply voltage is not impressing, please do not impress voltage to the ADL terminal.
ꢀNOTE
Purchase of I2C components of New Japan Radio Co., Ltd or one of its sublicensed Associated Companies
conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that
the system conforms to the I2C Standard Specification as defined by Philips.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
- 12 -
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明