NJW4184U3-05B-TE2 [NJRC]

Fixed Positive LDO Regulator,;


型号：	NJW4184U3-05B-TE2
厂家：	NEW JAPAN RADIO
描述：	Fixed Positive LDO Regulator, 输出元件调节器
文件：	总15页 (文件大小：338K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

NJW4184

High Voltage Very low current consumption Io=300mA Low Dropout Regulator

GENERAL DESCRIPTION

PACKAGEOUTLINE

The NJW4184 is a high voltage and low current consumption low

dropout regulator.

It has two lineups asAversion (built-in ON/OFF function type) and

B version (3-terminal / compatible with 78L/M series)

NJW4184 is mounted to SOT-89-3/-5, TO-252-3/-5 packages and

corresponded to Low ESR capacitor (MLCC).

NJW4184U2

NJW4184DL3

NJW4184DL1

The wide input range makes NJW4184 suitable for a Car accessory,

industrial supplies, battery equipment and various applications.

NJW4184U3

FEATURES

Wide Operating Voltage Range

Low Current Consumption

4.0 to 35V (max.)

12μA(Aversion)

9μA(B version)

Correspond to Low ESR capacitor (MLCC)

Output Current

Output Voltage Range

I_O(min.) =300mA

V_O: 2.5V to 15.0V

V_O1.0%

High Precision Output

ON/OFF function (apply onlyAver.)

Internal Thermal Overload Protection

Internal Over Current Protection

Package Outline

Aver.: SOT-89-5 TO-252-5

B ver.: SOT-89-3 TO-252-3

PRODUCTCLASSIFICATION

ON/OFF

Function

Device Name

Version

Package

NJW4184U2-xxA

NJW4184DL3-xxA

NJW4184U3-xxB

NJW4184DL1-xxB

Yes

SOT-89-5

TO-252-5

SOT-89-3

TO-252-3

xx=Output Voltage ex) 33=3.3V 05=5.0V

PIN COFIGURATION

Pin Function

1.CONTROL

2.GND

Pin Function

1.V_IN

Pin Function

1.V_OUT

Pin Function

1.V_IN

2.CONTROL

3.GND

2.GND

3.V_IN

2.GND

3.V_OUT

3.N.C.

4.V_OUT

4.N.C.

1 2 3 4 5

5. V_IN

5. V_OUT

NJW4184U2-A

NJW4184DL1-B

NJW4184DL3-A

NJW4184U3-B

Ver.2015-05-20

- 1 -

NJW4184

BLOCK DIAGRAM

･Aversion

V_IN

V_OUT

Current

Limit

CONTROL

Bandgap

Reference

Thermal

Protection

GND

･B version

V_IN

V_OUT

Current

Limit

Bandgap

Reference

Thermal

Protection

GND

OUTPUTVOLTAGERANKLIST

･Aversion

SOT-89-5

Device Name

TO-252-5

V_OUT

2.5V

3.3V

5.0V

8.0V

9.0V

12.0V

15.0V

Device Name

V_OUT

2.5V

3.3V

5.0V

8.0V

NJW4184U2-25A

NJW4184U2-33A

NJW4184U2-05A

NJW4184U2-08A

NJW4184U2-09A

NJW4184U2-12A

NJW4184U2-15A

NJW4184DL3-25A

NJW4184DL3-33A

NJW4184DL3-05A

NJW4184DL3-08A

NJW4184DL3-12A

NJW4184DL3-15A

12.0V

15.0V

･B version

SOT-89-3

TO-252-3

Device Name

V_OUT

2.5V

3.3V

5.0V

15.0V

Device Name

V_OUT

2.5V

3.3V

3.4V

5.0V

15.0V

NJW4184U3-25B

NJW4184U3-33B

NJW4184U3-05B

NJW4184U3-15B

NJW4184DL1-25B

NJW4184DL1-33B

NJW4184DL1-34B

NJW4184DL1-05B

NJW4184DL1-15B

Ver.2015-05-20

- 2 -

NJW4184

ABSOLUTE MAXIMUM RATINGS

(Ta=25 C)

UNIT

PARAMETER

SYMBOL

RATINGS

Input Voltage

V_IN

V_INPEAK

V_CONT

V_O

-0.3 to +40

-0.3 to V_IN+17

Peak Input Voltage(*1)

Control Voltage(*2)

Output Voltage

625(*3)

SOT89-3/-5

TO252-3/-5

2400(*4)

1190(*3)

3125(*4)

Power Dissipation

P_D

-40 to +150

-40 to +85

-40 to +150

Junction Temperature

Operating Temperature

Storage Temperature

Topr

Tstg

(*1): Duration time: t 200ms, Output Current: Io 300mA

(*2):Apply only theAversion. Peak Control Voltage is same as “V_INPEAK

”

(*3): Mounted on glass epoxy board. (76.2 114.3 1.6mm:based on EIA/JDEC standard size, 2Layers, Cu area 100mm²)

(*4): Mounted on glass epoxy board. (76.2 114.3 1.6mm:based on EIA/JDEC standard, 4Layers)

(For 4Layers: Applying 74.2 74.2mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)

INPUT VOLTAGE RANGE : V_IN=4.0 to 35V

Ver.2015-05-20

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NJW4184

ELECTRICALCHARACTERISTICS

Unless otherwise noted, V_O3.0V: V_IN= V_O+ 1V, C_IN= 1.0µF, C_O= 4.7µF, T_a= 25°C

V_O3.0V: V_IN= 4.0V, C_IN= 1.0µF, C_O= 10µF, T_a= 25°C

PARAMETER

Output Voltage

SYMBOL

V_O

TESTCONDITION

MIN.

TYP.

MAX.

UNIT

I_O=30mA

-1.0%

+1.0%

Aversion I_O=0mA, except I_CONT

B version I_O=0mA

Quiescent Current

I_Q

μA

Quiescent Current

at Control OFF(*5)

Output Current

I_Q(OFF)

I_O

V_CONT=0V

300

μA

%/V

V_O0.9

V_IN= V_O+1V to 35V, I_O=30mA(V_O3V)

V_IN= 4V to 35V, I_O=30mA(V_O3V)

I_O=0mAto 300mA

Line Regulation

Load Regulation

0.05

V_O/ V_IN

0.01

%/mA

V_O/ I_O

V_IN= 5V, ein=50mVrms,

f=1kHz, I_O=10mA

V_O=2.5V

V_O=3.3V

V_O=3.4V

V_O=5.0V

V_O=8.0V

V_O=9.0V

Ripple Rejection

V_IN= V_O+2V, ein=50mVrms,

f=1kHz, I_O=10mA

V_O=12.0V

V_O=15.0V

0.1

0.5

0.2

Dropout Voltage (*6)

Control Current (*5)

Control Voltage

for ON-state(*5)

Control Voltage

for OFF-state(*5)

Average Temperature

Coefficient of Output

Voltage

I_O=100mA

V_CONT=1.6V

μA

V_IO

I_CONT

V_CONT(ON)

V_CONT(OFF)

1.6

0.6

V_O/ Ta

V_IN

Ta=0 to 85 C, I_O=30mA

ppm/ C

Input Voltage

4.0

(*5):Apply only theAversion.

(*6):The output voltage excludes under 3.8V.

The above specification is a common specification for all output voltages.

Therefore, it may be different from the individual specification for a specific output voltage.

Ver.2015-05-20

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NJW4184

POWER DISSIPATION vs.AMBIENTTEMPERATURE

NJW4184DL1/DL3ꢀPowerDissipation

(Topr=-40~+85°C,Tj=150°C)

3500

3000

on 4 layers board

2500

2000

on 2 layers board

1500

1000

500

-50

-25

100

125

150

-50

Temperature : Ta(°C)

NJW4184U2/U3ꢀPowerDissipation

(Topr=-40~+85°C,Tj=150°C)

3000

2500

2000

1500

1000

500

on 4 layers board

on 2 layers board

-50

-25

100

125

150

Temperature : Ta(°C)

Ver.2015-05-20

- 5 -

NJW4184

TEST CIRCUIT

･Aversion

I_IN

V_IN

V_OUT

4.7μF

(Ceramic)

I_OUT

V_OU

V_IN

NJW4184-A

1.0μF

I_CONT

CONTROL

GND

V_CONT

*7 : Vo < 3.0V version : Co=10 F

･B version

I_IN

V_IN

V_OUT

I_OUT

V_OUT

4.7 F

(ceramic)

V_IN

NJW4184-B

1.0 F

GND

*8 : Vo < 3.0V version : Co=10 F

Ver.2015-05-20

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NJW4184

TYPICALAPPLICATION

･Aversion

In the case where ON/OFF Control is not required

V_IN

V_OUT

4.7μF

1.0μF

NJW4184-A

CONTROL

GND

*9 : Vo < 3.0V version : Co=10 F

Connect control pin to V_INpin

In use of ON/OFF CONTROL

V_IN

V_OUT

*10

4.7μF

NJW4184-A

1.0μF

CONTROL

GND

*10 : Vo < 3.0V version : Co=10 F

State of control pin:

“H” output is enabled.

“L” or “open” output is disabled.

･B version

V_IN

V_OUT

*11

4.7 F

1.0 F

NJW4184-B

GND

*11 : Vo < 3.0V version : Co=10 F

Ver.2015-05-20

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NJW4184

*In the case of using a resistance "R" between V_INand control.

If this resistor is inserted, it can reduce the control current when the control voltage is high.

The applied voltage to control pin should set to consider voltage drop through the resistor “R” and the minimum

control voltage for ON-state.

The V_{CONT (ON)}and I_CONThave temperature dependence as shown in the "Control Current vs. Temperature" and "

Control Voltage vs. Temperature" characteristics. Therefore, the resistance "R" should be selected to consider the

temperature characteristics.

*Input Capacitor C_IN

Input Capacitor C_INis required to prevent oscillation and reduce power supply ripple for applications when high

power supply impedance or a long power supply line.

Therefore, use the recommended C_INvalue (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and

should connect between GND and the V_INpin as shortest path as possible to avoid the problem.

*Output Capacitor C_O

Output capacitor (C_O) will be required for a phase compensation of the internal error amplifier.

The capacitance and the equivalent series resistance (ESR) influence to stable operation of the regulator.

Use of a smaller C_Omay cause excess output noise or oscillation of the regulator due to lack of the phase

compensation.

On the other hand, Use of a larger C_Oreduces output noise and ripple output, and also improves output transient

response when rapid load change.

Therefore, use the recommended C_Ovalue (refer to conditions of ELECTRIC CHARACTERISTIC) or larger and

should connect between GND and the V_OUTpin as shortest path as possible for stable operation

The recommended capacitance depends on the output voltage rank. Especially, low voltage regulator requires larger

C_Ovalue.

In addition, you should consider varied characteristics of capacitor (a frequency characteristic, a temperature

characteristic, a DC bias characteristic and so on) and unevenness peculiar to a capacitor supplier enough.

When selecting C_O, recommend that have withstand voltage margin against output voltage and superior

temperature characteristic.

Ver.2015-05-20

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NJW4184

*The notes of the evaluation when the V_Opin is shorted to GND

When evaluated short circuit test, the IC may break down because of regenerated energy by the parasitic inductance

included in wiring pattern.

It phenomenon appears conspicuously when output voltage is high(Vo=8.0V or more)or connected to inductive load.

In case of short circuit in actual application, not likely to destruction of IC because of some of Resistance exist

between load.

If happened above phenomenon by the short circuit test with the actual application, recommend connecting schottky

barrier diode(SBD) between the V_Opin and GND or using output capacitors that have ESR more than 2Ω like a

tantalum or aluminum electrolytic capacitor.(see below figure)

(a)In case of insert Schottky barrier diode between the V_Opin to GND

V_IN

V_OUT

SBD

NJW4184

GND

(b) In case of using the electrolysis condenser or insert series resistance

V_IN

V_OUT

NJW4184

Connecting resistance(2Ω or more)in series.

(in case of ESR of C_OUTis low)

GND

Ver.2015-05-20

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NJW4184

*Overshoot of Output Voltage

Transient fluctuation of output voltage tends to be large compared to other typical regulators because NJW4184 is

designed with the concept of low current consumption characteristics.

In general, overshoot or undershoot of output voltage is more likely to occur when the following cases.

When input voltage or output current fluctuate sharply

When output capacitors is small

When output load is small

When start up from the narrow state between Input and output.

NJW4184 has built in overshoot protection (OSP) circuit and the aim of reducing the overshoot compared to the low

current consumption typical products.

However, there are cases that very large value of overshoot may occur because of delay of the OSP circuit when the

input voltage rises from 2.0V to 2.5V.

Overshoot value since the amount will vary with compound conditions, please check it with the actual environment

reference to the above.

In addition, the following measures will be mentioned as a method to reduce the overshoot value.

a. By increasing the input and output capacitors to absorb overshoot value.

b.Adjust the timing of the CONTROLpin voltage and rising speed of input voltage, to avoid the rise form 2.0V to 2.5V.

When using other power supply to CONTROL pin it is effective

to making the CONTROL pin to Low level at the range of V_IN

voltage from 2.0V to 2.5V.

V_OUT

NJW4184-A

However when it is difficult to control of CONTROLpin by another

power supply, it is possible to same control by dividing the input

voltage with resistance as shown in the left figure.

CONTROL

GND

(Application example)

In the case of R1=100kΩ/R2=30kΩ, since the CONTROL pin

voltage is below 0.6V when V_IN= 2.5V, the V_OUTis the OFF state.

Resistor divider ratio should be set consider to “Control Voltage

for ON-State” and ambient temperature.

Examplesofapplicationcircuits,usingacontrol pin.

Ver.2015-05-20

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NJW4184

TYPICALCHARACTERISTICS

NJW4184_5.0V

Output Voltage vs Output Current

NJW4184_5.0V

Output Voltage vs Input Voltage

5.2

5.1

@Ta=25 C

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Ta=25ºC

Ta=-50ºC

Ta=150ºC

Io=0mA

Io=30mA

Io=300mA

4.9

4.8

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

4.5

4.7

4.9

5.1

5.3

5.5

5.7

200

400

600

800

1000

Input Voltage : V_IN(V)

Output Current : Io (mA)

NJW4184_5.0V

NJW4184(A ver.)_5.0V

Ground Pin Current vs Output Current

@Ta=25 C

Quiescent Current vs Input Voltage

@Ta=25 C

0.2

160

140

120

100

0.18

0.16

0.14

0.12

0.1

Output is OPEN

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

0.08

0.06

0.04

0.02

200

400

600

Output Current : Io (mA)

Input Voltage:V_IN(V)

NJW4184(B ver.)_5.0V

Quiescent Current vs Input Voltage

NJW4184_5.0V

Control Current vs Control Voltage

160

140

120

100

@Ta=25 C

Output is OPEN

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@Ta=25 C

V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Rc=0Ω

Rc=100kΩ

Input Voltage:V_IN(V)

Control Voltage ：V_CONT(V)

Ver.2015-05-20

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NJW4184

NJW4184_5.0V

Output Voltage vs Control Voltage

NJW4184_5.0V

Load Regulation vs Output Current

5.5

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

@Ta=25 C

V_IN=6.0V

Io=30mA

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

4.5

3.5

Rc=100kΩ

2.5

1.5

@Ta=25 C

V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Rc=0Ω

0.5

1.5

2.5

200

400

Output Current : Io (mA)

Control Voltage：V_CONT(V)

NJW4184_5.0V

Peak Output Current vs Input Voltage

NJW4184_5.0V

Dropout Voltage VS Output Current

@Ta=25 C

800

700

600

500

400

300

200

100

1.20

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

1.00

0.80

0.60

0.40

0.20

0.00

@Ta=25 C

V_O=4.5V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

10 14 18 22 26 30 34 38

Input Voltage : V_IN(V)

100

200

300

400

500

Output Current : Io (mA)

NJW4184_5.0V

Ripple Rejection vs Output Current

NJW4184_5.0V

Ripple Rejection vs Frequency

100

Io=0A

Io=100mA

Io=10mA

f=1kHz

@Ta=25 C

V_IN=7.0V

ein=50mVrms

Cin=1.0μF(Cermic)

Co=4.7μF(Cermic)

@Ta=25 C

V_IN=7.0V

ein=50mVrms

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

f=10kHz

Io=300mA

0.01

0.1

100

0.001

0.1

1000

Frequency :f (kHz)

Output Current :Io (mA)

Ver.2015-05-20

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NJW4184

NJW4184_5.0V

Equivalent Serise Resistance vs Output Current

NJW4184_5.0V

Output Noise Voltage vs Output Current

100

600

500

400

300

200

100

@C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@Ta=25 C

V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

STABLE REGION

FLAT

LPF:80Hz

0.1

0.01

0.001

0.1

1000

0.001

0.1

1000

Output Current : Io (mA)

Output Current :Io (mA)

NJW4184_5.0V

Output Voltage vs Temperature

NJW4184_5.0V

Control Voltage vs Temperature

5.20

5.15

5.10

5.05

5.00

4.95

4.90

4.85

4.80

1.6

1.4

1.2

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

0.8

0.6

0.4

0.2

Io=0mA

Io=10mA

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Io=100mA

Io=30mA

Io=300mA

-50

100

150

-50

100

150

Temperature:Ta (ºC)

NJW4184_5.0V

Control current vs. Temperature

NJW4184_5.0V

Output Peak Current vs Temperature

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

800

700

600

500

400

300

200

100

@Vo=4.5V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@V_CONT=1.6V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Vin=Vo+1V

Vin=40V

-50

Temperature:Ta (ºC)

100

150

-50

Temperature:Ta (ºC)

100

150

Ver.2015-05-20

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NJW4184

NJW4184_5.0V

Short Circuit Current vs Temperature

NJW4184_5.0V

Line Regulation vs Temperature

500

450

400

350

300

250

200

150

100

0.10

0.08

0.06

0.04

0.02

0.00

-0.02

-0.04

-0.06

-0.08

-0.10

@Vo=GND

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@V_IN=6.0-35V

Io=30mA

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Vin=Vo+1V

Vin=40V

-50

100

150

-50

100

150

200

150

Temperature:Ta (ºC)

NJW4184_5.0V

Load Regulation vs Temperature

Output Voltage vs Temperature

0.10

0.09

0.08

0.07

0.06

0.05

0.04

0.03

0.02

0.01

0.00

6.0

5.0

4.0

3.0

2.0

1.0

0.0

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

Io=0-30mA

Io=0-300mA

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

100

150

Temperature:Ta (ºC)

NJW4184_5.0V

NJW4184(A ver.)_5.0V

Quiescent Current vs Temperature

Dropout Voltage vs Temperature

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0.00

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@Io=100mA

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

100

Temperature:Ta (ºC)

Ver.2015-05-20

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NJW4184

NJW4184(B ver.)_5.0V

Quiescent Current vs Temperature

NJW4184_5.0V

Input Transient Response

5.6

5.4

@V_IN=6.0V

C_IN=1.0μF(Ceramic)

Co=4.7μF(Ceramic)

@Ta=25℃

C_IN=1.0uF

Co=4.7uF

Io=0mA

5.2

Output Voltage

4.8

Input Voltage

0.4

0.8

1.2

1.6

-50

100

150

Time t (s)

：

Temperature:Ta (ºC)

NJW4184_5.0V

ON/OFF Transient Response

NJW4184_5.0V

Load Transient Response

5.3

5.2

5.1

@Ta=25℃

V_IN=6.0V

Io=30mA

C_IN=1.0uF

Co=4.7uF

Output Voltage

@Ta=25℃

V_IN=6.0V

Io=10-50mA

C_IN=1.0uF

Co=4.7uF

4.9

4.8

4.7

Output current

Control Voltage

0.2

0.4

0.6

0.8

Time t(ms)

：

Time t (ms)

：

[CAUTION]

Thespecificationsonthisdatabookareonly

givenforinformation,withoutanyguarantee

asregardseither mistakesoromissions.The

applicationcircuitsinthisdatabookare

describedonlytoshowrepresentativeusages

oftheproductandnotintendedforthe

guaranteeorpermissionofanyrightincludingthe

industrialrights.

Ver.2015-05-20

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NJW4184U3-05B-TE2 [NJRC]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E