SM5878AV [NPC]
3rd-order , 2-channel D/A converter; 3阶, 2路D / A转换器型号: | SM5878AV |
厂家: | NIPPON PRECISION CIRCUITS INC |
描述: | 3rd-order , 2-channel D/A converter |
文件: | 总16页 (文件大小:144K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SM5878AM/AV
3rd-order Σ∆, 2-channel D/A converter
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
PINOUT
The SM5878AM/AV is a 3rd-order Σ∆, 2-channel
D/A converter LSI for digital audio reproduction
equipment. It also incorporates an 8-times
oversampling digital filter and analog, post-converter
lowpass filters.
MUTE
DEEM
CKO
1
2
3
4
5
6
7
8
9
24 ATCK
23 MODE
22 RSTN
21 DS
DVSS
BCKI
DI
The SM5878AM/AV has digital deemphasis filter,
attenuator, and soft mute circuits built-in. Double-
speed operation and low-voltage operation are also
supported.
20 XVSS
19 XTO
DVDD
LRCI
TSTN
18 XTI
17 XVDD
16 MUTEO
15 AVDDR
14 RO
SM5878AM/AV D/A converter incorporates 3rd-
order ∑∆ modulator and DEM (Dynamic Element
Mating) circuits for high performance, even in the
presence of clock jitter.
TO1 10
AVDDL 11
LO 12
13 AVSS
The SM5878AM/AV operates from a 4.5 to 5.5 V
supply, and is available in 24-pin SSOP or VSOPs.
FEATURES
ORDERING INFORMATIONS
■ 4.5 to 5.5 V operating supply voltage range
■ 44.1 kHz sampling frequency
■ Normal (384fs) and double-speed (192fs),
16.9344 MHz system clock
■ 16.9344 MHz crystal oscillator circuits built-in
■ 16-bit, MSB first, rear-packed serial data input
format (≤ 64fs bit clock)
DEVICE
PACKAGE
SM5878AM
SM5878AV
24 - pin SSOP
24 - pin VSOP
■ 8-times oversampling digital filter
• 32 dB stopband attenuation
• ±0.05 dB passband ripple
■ Deemphasis filter operation
• 36 dB stopband attenuation
• −0.09 to +0.23 dB deviation from ideal
deemphasis filter characteristics
■ Attenuator
• 6-bit attenuator (64 steps)
• Soft mute function when MODE is HIGH
(approx. 1024/fs total muting time)
■ Built-in infinity-zero detector
■ Σ∆ 2-channel D/A converter
• 3rd-order noise shaper
• 32fs oversampling (16fs for double-speed
mode)
■ 2nd-order analog, post-converter lowpass filters
built-in
■ 24-pin SSOP/VSOP
■ Molybdenum-gate CMOS process
NIPPON PRECISION CIRCUITS—1
SM5878AM/AV
PACKAGE DIMENSIONS
Unit: mm
24-pin SSOP
24-pin VSOP
10.05 0.20
10.20 0.30
7.8 0.1
+0.1
−0.05
0.65
0.7
0.8
0.36 0.10
0
10
0
10
0.22
0.5 0.2
0.50 0.20
Package Marking
Package Marking
S M 5 8 7 8 A M
S M 5 8 7 8 A V
NIPPON PRECISION CIRCUITS—2
SM5878AM/AV
BLOCK DIAGRAM
LRCI
BCKI
DI
Input interface
MUTEO
DEEM
MODE
ATCK
L
R
Attenuation
counter
Filter & attenuation
operation block
MUTE
CKO
XVSS
XTO
XTI
L
R
RSTN
DS
Timing
control
DVSS
DVDD
TSTN
TO1
Noise shaper
operation block
XVDD
AVDDL
AVDDR
11Level
DEM DAC
11Level
DEM DAC
11Level
DEM DAC
11Level
DEM DAC
+
−
−
+
LO
AVSS
RO
PIN DESCRIPTION
Number
Name
I/O
Description
When MODE is HIGH: Soft mute ON/OFF control. Mute is active when HIGH.
1
MUTE
Ip
When MODE is LOW: Attenuator level direction control. The attenuator direction is down when HIGH.
2
3
4
5
6
7
DEEM
CKO
DVSS
BCKI
DI
Ip
O
-
Deemphasis control. Deemphasis is ON when HIGH, and OFF when LOW.
16.9344 MHz clock output
Digital ground
Ip
Ip
-
Bit clock input
Serial data input
Digital supply
DVDD
Input sample data rate (fs) clock input pin. Left-channel input when HIGH, and right-channel input when
LOW.
8
9
LRCI
Ip
Ip
TSTN
Test pin. Test mode when LOW.
NIPPON PRECISION CIRCUITS—3
SM5878AM/AV
Number
10
Name
TO1
I/O
O
-
Description
Test output 1. Normally LOW.
11
AVDDL
LO
Left-channel analog supply
Left-channel analog output
Analog ground
12
O
-
13
AVSS
RO
14
O
-
Right-channel analog output
Right-channel analog supply
Infinity-zero detection output
Crystal oscillator supply
15
AVDDR
MUTEO
XVDD
XTI
16
O
-
17
18
I
Crystal oscillator or 16.9344 MHz external clock input
Crystal oscillator output
19
XTO
O
-
20
XVSS
DS
Crystal oscillator ground
21
Ip
Ip
Ip
Ip
Double/Normal-speed mode select. Double-speed mode when HIGH.
Reset pin. Reset when LOW.
22
RSTN
MODE
ATCK
23
Soft mute/attenuator mode select. Soft mute mode when HIGH.
Attenuator level setting clock. Disabled when MODE is HIGH.
24
SPECIFICATIONS
Absolute Maximum Ratings
DV = AV = XV = 0 V, AV = AV
= AV
DDR
SS
SS
SS
DD
DDL
Parameter
Symbol
DV , AV , XV
DD
Rating
Unit
V
Supply voltage range
−0.3 to 7.0
DD
DD
1
Input voltage range
V
DV − 0.3 to DV + 0.3
V
IN1
SS
DD
XTI input voltage range
V
XV − 0.3 to XV + 0.3
V
IN
SS
DD
Storage temperature range
Power dissipation
T
−55 to 125
°C
mW
°C
s
stg
P
250
255
10
D
Soldering temperature
Soldering time
T
sld
t
sld
1. Pins MUTE, DEEM, BCKI, DI, LRCI, TSTN, DS, RSTN, MODE and ATCK.
Also applicable during supply switching.
Recommended Operating Conditions
DV = AV = XV = 0 V, AV = AV
= AV
DDR
SS
SS
SS
DD
DDL
Parameter
Symbol
DV , AV , XV
DD
Rating
Unit
Supply voltage range
4.5 to 5.5
V
DD
DD
DV − XV
,
DD
DD
DV − AV
,
DD
DD
XV − AV
,
DD
DD
Supply voltage variation
±0.1
V
DV − XV ,
SS
SS
DV − AV ,
SS
SS
XV − AV
SS
SS
Operating temperature range
T
−40 to 85
°C
opr
note) Since DVDD, XVDD, AVDDL, and AVDDR are connected via the LSI substrate, current may flow if potential difference occurs among them.
NIPPON PRECISION CIRCUITS—4
SM5878AM/AV
DC Electrical Characteristics
DV = AV = XV = 0 V, DV = AV = XV = 4.5 to 5.5 V, AV = AV
= AV
, T = −40 to 85
SS
SS
SS
DD
DD
DD
DD
DDL
DDR
a
°C
Rating
Parameter
Symbol
Condition
Unit
min
typ
10
1.5
8.5
–
max
15
3
1
DVDD digital supply current
I
–
–
–
mA
mA
mA
V
DDD
1
XVDD system clock supply current
I
DDX
1
2
AVDD analog supply current
I
12
–
DDA
XTI HIGH-level input voltage
XTI LOW-level input voltage
XTI AC-coupled input voltage
V
Clock input
Clock input
0.7XV
DD
IH1
V
–
–
0.3XV
V
IL1
DD
V
0.3XV
–
–
–
V
p-p
INAC
DD
3
HIGH-level input voltage
V
2.4
–
–
V
V
IH2
3
LOW-level input voltage
V
–
0.5
–
IL2
4
HIGH-level output voltage
V
I
= −1 mA
= 1 mA
OL
AV − 0.4
–
V
OHA
OH
DD
4
LOW-level output voltage
V
I
–
–
0.4
–
V
OLA
CKO HIGH-level output voltage
CKO LOW-level output voltage
XTI HIGH-level input current
XTI LOW-level input current
V
I
= −1 mA
= 1 mA
OL
DV − 0.4
–
V
OHC
OH
DD
V
I
–
–
–
–
–
–
0.4
18
18
18
1.0
V
OLC
I
V
= XV
DD
9
µA
µA
µA
µA
IH1
IN
I
V
= 0 V
= 0 V
9
IL1
IN
4
LOW-level input current
I
V
9
IL2
IN
4
Input leakage current
I
V
= DV
DD
–
LH
IN
1. DV = AV = XV = 5 V, DS = 5 V (double speed), XTI clock input frequency f = 16.9344 MHz, no output load.
DD
DD
DD
XTI
2. I is the total current.
DDA
3. Pins MUTE, DEEM, BCKI, DI, LRCI, TSTN, DS, RSTN, MODE and ATCK.
4. Pins TO1 and MUTEO.
AC Electrical Characteristics
System clock (XTI)
Crystal Oscillator
Rating
typ
Parameter
Symbol
Unit
min
max
Oscillator frequency
f
4.0
16.9344
20.0
MHz
OSC
NIPPON PRECISION CIRCUITS—5
SM5878AM/AV
External clock input
Rating
typ
Parameter
Symbol
Unit
min
20.0
20.0
50.0
max
125
125
250
HIGH-level clock pulsewidth
LOW-level clock pulsewidth
Clock pulse cycle
t
29.5
29.5
59.0
ns
ns
ns
CWH
t
CWL
t
XI
XTI input clock
V
IH1
0.5V
DD
V
IL1
t
t
CWL
CWH
t
XI
Serial input (BCKI, DI, LRCI)
Rating
Parameter
Symbol
Unit
min
50
typ
–
max
–
BCKI HIGH-level pulsewidth
BCKI LOW-level pulsewidth
BCKI pulse cycle
t
ns
ns
ns
ns
ns
ns
ns
BCWH
t
50
–
–
BCWL
t
6t
–
–
BCY
XI
DI setup time
t
50
–
–
DS
DI hold time
t
50
50
50
–
–
DH
Last BCKI rising edge to LRCI edge
LRCI edge to first BCKI rising edge
t
–
–
BL
t
–
–
LB
Serial input timing
BCKI
1.5V
1.5V
1.5V
tBCWH
tBCWL
tBCY
DI
tDS
tDH
LRCI
tLB
tBL
NIPPON PRECISION CIRCUITS—6
SM5878AM/AV
Control input (MUTE, MODE, ATCK, DEEM, DS)
Rating
Parameter
ATCK LOW-level pulsewidth
Symbol
Unit
min
0.5/fs
0.5/fs
100
100
100
100
–
typ
–
max
–
1
1
t
µs
µs
ns
ns
ns
ns
ns
ns
ATWL
ATCK HIGH-level pulsewidth
MUTE setup time
MUTE hold time
MODE setup time
MODE hold time
Rise time
t
–
–
ATWH
t
–
–
MUS
t
–
–
MUH
t
–
–
MOS
t
–
–
MOH
t
–
50
50
r
Fall time
t
–
–
f
1. fs is LRCI clock frequency.
Control input timing
MUTE
MODE
1.5 V
t
t
t
t
MUS
MOS
MUH
MOH
1.5 V
ATCK
t
t
ATWH
ATWL
t
t
r
f
DEEM
DS
MUTE
MODE
ATCK
2.4 V
2.4 V
1.5 V
0.5 V
0.5 V
Reset Input (RSTN)
Rating
typ
Parameter
RSTN LOW-level pulsewidth after supply rising edge
Symbol
Unit
ns
min
max
t
50
–
–
RSTN
NIPPON PRECISION CIRCUITS—7
SM5878AM/AV
Theoretical Filter Characteristics
Deemphasis OFF overall characteristics
Frequency band
Attenuation (dB)
Parameter
Passband ripple
f
@ fs = 44.1 kHz
0 to 20.0 kHz
24.1 to 328.7 kHz
20.0 kHz
min
−0.05
32
typ
–
max
+0.05
–
0 to 0.4535fs
0.5465fs to 7.4535fs
0.4535fs
Stopband attenuation
–
Built-in analog LPF compensation
–
−0.34
–
Overall frequency characteristic (deemphasis OFF)
0
10
20
30
40
50
60
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
Frequency (fs)
Passband characteristic (deemphasis OFF)
0.0
0.2
0.4
0.6
0.8
0.000
0.125
0.250
0.375
0.4535
0.500
Frequency (fs)
NIPPON PRECISION CIRCUITS—8
SM5878AM/AV
Deemphasis ON overall characteristics
Frequency band
@ fs = 44.1 kHz
Attenuation (dB)
typ
Parameter
f
min
max
Deviation from ideal deemphasis filter
characteristics
0 to 0.4535fs
0 to 20.0 kHz
−0.09
–
+0.23
Stopband attenuation
0.5465fs to 7.4535fs
0.4535fs
24.1 to 328.7 kHz
20.0 kHz
36
–
–
–
–
Built-in analog LPF compensation
−0.34
Overall frequency characteristic (deemphasis ON)
0
10
20
30
40
50
60
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
Frequency (fs)
Passband characteristic (deemphasis ON)
0
2
4
6
8
10
12
0.000
0.125
0.250
0.375
0.4535 0.500
Frequency (fs)
NIPPON PRECISION CIRCUITS—9
SM5878AM/AV
AC Analog Characteristics
Normal-voltage: DV = AV = XV = 0 V, DV = AV = XV = 5 V, AV = AV
= AV
, DS =
SS
SS
SS
DD
DD
DD
DD
DDL
DDR
0 V, DEEM = 0 V, crystal oscillator frequency f
= 16.9344 MHz, T = 25 °C
OSC
a
Rating
typ
Parameter
Symbol
Condition
min
Unit
max
Total harmonic distortion
LSI output level
THD + N
1 kHz, 0 dB
–
1.2
–
0.003
1.3
0.006
%
V
1 kHz, 0 dB
1.4
–
V
rms
out1
Evaluation board output level
Dynamic range
V
1 kHz, 0 dB
1.3
V
rms
out2
D.R
S/N
1 kHz, −60 dB
1 kHz, 0/−∞ dB
1 kHz, −∞/0 dB
92
94
91
98
–
dB
dB
dB
1
Signal-to-noise ratio
100
97
–
Channel separation
Ch. Sep
–
1. Signal-to-noise is measured following a device reset, with DATA = 0 (DI = LOW). Under these conditions, the signal-to-noise ratio includes noise-shaper
noise.
Measurement Circuit and Conditions
Measurement circuit block diagram
CKO (384fs)
Left channel
BCK
Signal
generator
Evaluation
board
Left/Right
channel selector
Distortion
analyzer
LRCK (fs)
DATA
Right channel
NF Corporation 3346A.
10 k input impedance
Shibasoku AD725C.
RMS measurement
fs = 44.1 kHz
DATA = 16 bits
Measurement conditions
3346A left/right-channel selector
switch
AD725C distortion analyzer with
built-in filter
1
Parameter
Symbol
Total harmonic distortion
Output level
THD + N
THRU
20 kHz lowpass filter ON
400 Hz highpass filter OFF
V
out
Dynamic range
DR
D-RANGE
20 kHz lowpass filter ON
400 Hz highpass filter OFF
JIS A filter ON
Signal-to-noise ratio
Channel separation
S/N
THRU
THRU
20 kHz lowpass filter ON
400 Hz highpass filter OFF
Ch. Sep
1. Pins LO and RO should have an output load of 10 kΩ (min).
NIPPON PRECISION CIRCUITS—10
SM5878AM/AV
Measurement circuit
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
A V S S
R O
1 2
A V D D 1 L 1
T O 1
L O
A V D D R
1 0
T S T N
9
M U T E O
X V D D
L R C 8 I
D V D 7 D
X T I
D I
6
X T O
B C K 5 I
X V S S
D S
4
D V S S
3
C K O
R S T N
2
M O D E
D E E M
M U T E
1
A T C K
NIPPON PRECISION CIRCUITS—11
SM5878AM/AV
FUNCTIONAL DESCRIPTION
System Clock/Speed Switching (XTI, XTO, CKO, DS)
The system clock on XTI can be set to run at one of
two speeds, 384fs (normal speed) or 192fs (double-
speed), where fs is the input frequency on LRCI. The
speed for CD playback is set by the input level on
DS, as shown in table 1. The system clock should be
fixed at 16.9344 MHz.
Note that the input clock accuracy and signal-to-
noise ratio greatly influence the AC analog
characteristics.
The system clock can be controlled by a crystal
oscillator comprising a crystal connected between
XTI and XTO and the built-in CMOS inverter.
Alternatively, an external system clock can be input
on XTI. As the internal CMOS inverter has a
feedback resistor, the external clock can be AC
coupled to XTI. The system clock is output on CKO.
Table 1. System clock select
DS
LOW
(normal
speed)
HIGH
(double
speed)
Parameter
Symbol
XTI input clock
frequency
f
XI
384fs
192fs
(= 1/t )
XI
16.9344 MHz
at fs = 44.1
kHz
16.9344 MHz
at fs = 88.2
kHz
CD playback XTI
frequency
f
XI
CKO output clock
frequency
f
384fs
192fs
CO
Internal system
clock period
T
t
t
XI
SYS
XI
System Reset (RSTN)
The device should be reset in the following cases.
The device is reset by applying a LOW-level pulse on
RSTN. At system reset, the internal arithmetic
operation and output timing counter are synchronized
on the next LRCI rising edge, as shown in figure 1.
■ At power ON
■ When LRCI and/or the system clock XTI stop, or
other abnormalities occur.
LOW
RSTN
LRCI
1
2
3
9
10
Internal reset
LO
Outputs muted
RO
Figure 1. System reset timing
Audio Data Input (DI, BCKI, LRCI)
The digital audio data is input on DI in MSB-first, 2s-
complement, 16-bit serial format.
reset, as long as the clock frequency ratio between
LRCI and the system clock XTI is maintained, phase
differences between LRCI, BCKI and the system
clock XTI do not affect the functional operation.Also,
any jitter present on the data input clock does not
appear as output pulse jitter.
Serial data bits are read into the SIPO register (serial-
to-parallel converter register) on the rising edge of the
bit clock BCKI.
The arithmetic operation and output timing are
independent of the input timing. Accordingly, after a
The bit clock frequency on BCKI should be between
32fs and 64fs.
NIPPON PRECISION CIRCUITS—12
SM5878AM/AV
Deemphasis Filter (DEEM)
The built-in digital deemphasis filter is designed to
operate at 44.1 kHz. Deemphasis is ON when DEEM
is HIGH, and OFF when DEEM is LOW.
Attenuation (MODE, ATCK, MLEN)
The digital attenuation mode is selected when
MODE is LOW. The attenuator operates by
multiplying the internal 6-bit up/down counter’s
output data with the signal data.
The gain is set by the counter contents DATT as
follows.
DATT
63
---------------
=
×
Gain 20 log
[dB]
The direction of the 6-bit up/down counter is
controlled by the level on MUTE (down when
MUTE is HIGH, and up when MUTE is LOW). The
count is advanced on the rising edge of ATCK.
Upon system initialization or when MODE changes
state, DATT is set to 63, which corresponds to the
maximum gain of 0 dB as shown in table 2.
When the count reaches 0 (down) or 63 (up), the
counter automatically stops.
Table 2. Attenuator gain
DATT
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
Gain (dB)
0.0
DATT
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
Gain (dB)
−2.545
−2.732
−2.923
−3.118
−3.317
−3.522
−3.731
−3.946
−4.166
−4.391
−4.623
−4.861
−5.105
−5.357
−5.617
−5.884
DATT
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Gain (dB)
−6.160
−6.444
−6.739
−7.044
−7.360
−7.687
−8.028
−8.383
−8.752
−9.138
−9.542
−9.966
−10.412
−10.881
−11.378
−11.904
DATT
15
14
13
12
11
10
9
Gain (dB)
−12.465
−13.064
−13.708
−14.403
−15.159
−15.987
−16.902
−17.925
−19.085
−20.424
−22.007
−23.946
−26.444
−29.966
−35.987
−∞
−0.139
−0.280
−0.424
−0.570
−0.718
−0.869
−1.023
−1.180
−1.339
−1.501
−1.667
−1.835
−2.007
−2.183
−2.362
8
7
6
5
4
3
2
1
0
NIPPON PRECISION CIRCUITS—13
SM5878AM/AV
Soft Mute (SMUTE)
Soft mute mode is selected when MODE is HIGH.
The up/down counter is switched to internal clock
drive, and soft mute operation is controlled by
MUTE only.
Upon system initialization or when MODE changes
state, mute is released, which corresponds to the
maximum gain of 0 dB.
When MUTE goes HIGH, the up/down counter
counts down. The total time to go from 0 to
maximum mute is 1024/fs. This corresponds to
approximately 23.2 ms at fs = 44.1 kHz.
MUTE
0 dB
Gain
–
When MUTE is LOW, soft mute is released. The
attenuation counter output counts up, increasing the
gain. The time taken to return to 0 dB is also 1024/fs.
Soft mute operation is shown in figure 2.
1024/fs
1024/fs
Figure 2. Soft mute operation example
Infinity-Zero (MUTEO)
The SM5878AM/AV outputs an infinity-zero
detection output signal under the following
circumstances.
■ When an infinity-zero occurs in the input data.
When an infinity-zero is detected, a period of 2
× (1/fs) ≈ 0.37 seconds takes place before
14
MUTEO goes HIGH.
■ From immediately after a reset input on RSTN
until the initialization cycle finishes and the first
data cycle occurs.
214/fs
1
2
3
8
9
LRCI
DI
Signal
No Signal
Signal
RSTN
MUTEO
Initialize
Figure 3. MUTEO output timing
TIMING DIAGRAMS
Input Timing (DI, BCKI, LRCI)
1/fs
MSB
LSB
MSB
LSB
16 bits
16 bits
Left channel
Right channel
DI
BCKI
(64fs max)
LRCI
NIPPON PRECISION CIRCUITS—14
SM5878AM/AV
TYPICAL APPLICATIONS
Input Interface Circuits
Normal Speed
16.9344 MHz crystal
XTI
XTO
16.9344 MHz
44.1 kHz
XTAI
LRCK
DA16
DA15
CKO
LRCI
DI
Sony
CXD2500
SM5878
2.1168 MHz
BCKI
DS
PSSL
Double Speed
16.9344 MHz crystal
XTI
XTO
16.9344 MHz
XTAI
LRCK
DA16
DA15
CKO
LRCI
DI
44.1 kHz (88.2 kHz)
Sony
CXD2500
SM5878
2.1168 MHz (4.2336 MHz)
BCKI
DS
PSSL
Normal
Double speed
Normal/double
speed control
( ) indicate double-speed mode
Note that the output analog characteristics and other
specifications are not guaranteed for a particular
format or application circuit.
NIPPON PRECISION CIRCUITS—15
SM5878AM/AV
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NIPPON PRECISION CIRCUITS INC.
NC9620BE 1997.09
NIPPON PRECISION CIRCUITS—16
©2020 ICPDF网 联系我们和版权申明