SM8703 [NPC]
Clock Generator for MPEG2 System; 时钟发生器的MPEG2系统
| 型号： | SM8703 |
| 厂家： | 
NIPPON PRECISION CIRCUITS INC |
| 描述： | Clock Generator for MPEG2 System |
| 文件： | 总12页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SM8703AV
Clock Generator for MPEG2 System
NIPPON PRECISION CIRCUITS INC.
OVERVIEW
The SM8703AV is a 27 MHz master clock, 5-system output clock generator for MPEG2 system. It has 2 built-
in PLLs that, with the addition of a single crystal oscillator element, can generate 384fs, 512fs and 768fs
clocks which are necessary for MPEG2 system, plus independent fixed-frequency 27 MHz and 33.8688 MHz
output clocks. Each output can stop unused output by using disable function, therefore, unnecessary radiation
can be suppressed. Also, visual and audio synchronous is not disrupted since each output frequency is kept in
the normal ratio. Supported sampling frequencies (fs) include 44.1 or 48 kHz.
FEATURES
PINOUT
(Top View)
■ 27 MHz master clock (internal PLL reference
clock)
■ Generated clocks
• 27 MHz output
• 33.8688 MHz output
• 384fs output
• 512fs output
• 768fs output
■ Sampling frequency fs
• 44.1/48 kHz
■ Output disable function
■ Low jitter output: 100 ps (typ, 15pF load)
■ Supply voltage: 3.3 V
■ 24-pin VSOP package
1
24
VDD
MO2
FSEL/MDT
SO5
VSS
MO1
MCK
MLEN
VDDA
VSSA
XTI
RSV
SO2
VDD1
VSS1
RSV
XTO
SO3
RSV
SO4
VDD2
VSS2
RSV
12
13
SO1
APPLICATIONS
■ DVD players
■ Set top box
■ MPEG2 system
PACKAGE DIMENSIONS
(Unit: mm)
ORDERING INFORMATION
7.8 ± 0.1
De vice
Packag e
SM8703AV
24-pin VS OP
0 to 10
0.65
0.1
+ 0.1
0.22 − 0.05
M
0.13
NIPPON PRECISION CIRCUITS—1
SM8703AV
BLOCK DIAGRAM
FSEL/MDT
External
Interface
MCK
MLEN
SO5
SO4
SO3
SO2
SO1
Phase
Comparator0
Charge
Pump0
Divider0
LPF0
VCO0
XTI
Oscillator
XTO
Divider
Divider0
Phase
Comparator1
Charge
Pump1
Divider1
LPF1
VCO1
Divider1
MO1
MO2
NIPPON PRECISION CIRCUITS—2
SM8703AV
PIN DESCRIPTION
Nu mb e r
Na me
VDD
VS S
I/O
–
Des cription
1
2
Power supply for Digital block
VSS for Digital block
–
3
MO1
MCK
MLEN
VDDA
VS S A
XTI
O
27 MHz fixed-frequency output 1
Serial interface bit clock input
Serial interface latch enable input
Power supply for Analog block
VSS for Analog block
1
4
Ip
1
5
Ip
6
–
–
7
8
I
Reference signal crystal oscillator element connection or external clock input
Reference signal crystal oscillator element connection
Reserved (must be open)
Reserved (must be open)
33.8688 MHz fixed-frequency output
VSS for Output buffer
9
XTO
O
–
10
11
12
13
14
15
16
17
18
19
20
21
22
RS V
RS V
S O1
–
O
–
VSS2
VDD2
S O4
–
Power supply for Output buffer
512fs output
O
O
–
S O3
512fs output
RS V
VSS1
VDD1
S O2
Reserved (must be open)
VSS for Output buffer
–
–
Power supply for Output buffer
384fs output
O
–
RS V
S O5
Reserved (must be open)
768fs output
O
Parallel mode: Sampling frequency select signal input
Serial mode: Control data input
1
23
24
FSEL/MDT
MO2
Ip
O
27 MHz fixed-frequency output 2
1. Schmitt trigger input with internal pull-up resistor
NIPPON PRECISION CIRCUITS—3
SM8703AV
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Supply voltage range
Symbol
Condition
Rating
Unit
V
V
, V
,
DDA
DD1
DD
−
0.3 to 6.5
V
, V
DD2
V
– V
– V
– V
– V
– V
,
,
,
,
,
DDA
DD
DD1
DD2
DD1
DD2
V
V
DDA
DDA
Supply voltage deviation
Ground voltage deviation
±0.1
±0.1
V
V
V
V
DD
DD
V
– V
DD1
DD2
V
– V
,
S S A
S S
SS1
SS2
SS1
SS2
V
V
– V
– V
– V
– V
,
,
S S A
S S A
V
V
,
,
S S
S S
V
– V
SS1
SS2
Input voltage range
V
Digital inputs
Digital outputs
−
0.3 to V
0.3 to V
+
+
0.3
0.3
V
V
IN
DD
Output voltage range
Power dissipation
V
OUT
−
DD
P
300
m W
D
Storage temperature range
T
−55 to 125
°C
stg
Recommended Operating Conditions
Parameter
Supply voltage ranges
Symbol
Condition
Rating
Unit
V
V
, V
,
DDA
DD1
DD
3.0 to 3.6
–40 to 85
V
, V
DD2
Operating temperature range
T
°C
opr
NIPPON PRECISION CIRCUITS—4
SM8703AV
DC Electrical Characteristics
External clock, T = –40 to 85 °C, V
= V = V
= V = 3.0 to 3.6 V unless otherwise stated
DD2
a
DDA
DD
DD1
Rating
Parameter
Symbol
Condition
Unit
min
typ
ma x
45
All supplies.
= V = V
V
= V
= 3.3V,
DDA
= 25
DD
DD1
DD2
Current consumption
I
T
°
C, fs = 48 kHz,
–
32
mA
DD
a
Crystal oscillator element,
no load on all outputs
HIGH-level input voltage
LOW -level input voltage
HIGH-level input current
LOW -level input current
HIGH-level input current
LOW -level input current
HIGH-level output voltage
LOW -level output voltage
V
XTI, FSEL/MDT, MCK, MLEN
XTI, FSEL/MDT, MCK, MLEN
0.8 V
–
–
–
–
–
–
–
–
–
V
V
IH
DD
V
–
–
–
–
–
0.2 V
1
IL
DD
I
FSEL/MDT, MCK, MLEN, V = V
DD
µA
µA
µA
µA
V
IH1
IN
I
FSEL/MDT, MCK, MLEN, V = 0 V
−
100
40
40
IL1
IN
I
XTI, V = V
IN DD
IH2
I
XTI, V = 0 V
−
IL2
IN
V
All outputs. I
=
−
2 mA
V −
DD
0.4
–
OH
OH
OL
V
All outputs. I = 4 mA
–
0.4
V
OL
AC Electrical Characteristics
External clock, T = –40 to 85 °C, V
= V = V
= V = 3.0 to 3.6 V unless otherwise stated
DD2
a
DDA
DD
DD1
Rating
Parameter
Symbol
Condition
Unit
min
typ
ma x
XTI external input clock frequency
Output clock rise time
f
–
27.0000
–
MHz
ns
M
All outputs, 0.2 to 0.8V
,
,
DD
t
–
–
2.0
2.0
–
–
R
C
= 15 pF
L
All outputs, 0.8 to 0.2V
DD
Output clock fall time
t
ns
ps
%
F
C
= 15 pF
L
All outputs, Standard tolerance,
Crystal oscillator element,
1
Output clock jitter
JITTER
DUTY
–
100
50
–
C
= 15 pF
L
All outputs, Crystal oscillator
element, 1.4V to 1.4V, C = 15 pF
1
Output clock duty
45
55
L
Settling time
t
All outputs
All outputs
–
–
–
100
30
ns
S
2
Power-up time
t
15
ms
P
1. 1.4V to 1.4V.Ta=20°C.The characteristics of output clock jitter and output clock duty depends on crystal oscillator.
NPC’s standard crystal oscillator: R = 10.5
measurement apparatus: HP4195
Ω, L = 5.38 mH, Ca = 6.74 fF, Cb = 1.85 pF
Load capacitance: C1 = 7 pF, C2 = 11 pF
Cb
L
Ca
R
2. Time from OFF condition to stable frequency output.
NIPPON PRECISION CIRCUITS—5
SM8703AV
Serial Interface AC Characteristics
External clock, T = –40 to 85 °C, V
= V = V
= V = 3.0 to 3.6 V unless otherwise stated
DD2
a
DDA
DD
DD1
Rating
Parameter
Symbol
Condition
Unit
min
40
typ
–
ma x
MCK HIGH-level pulsewidth
MCK LOW-level pulsewidth
MCK pulse cycle time
MDT setup time
t
–
–
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
MC WH
t
40
–
MCWL
t
100
40
–
MCY
t
–
MDS
MDT hold time
t
40
–
MDH
1
MLEN setup time
t
40
–
MLS
2
MLEN hold time
t
40
–
MLH
MLEN HIGH-level pulsewidth
MLEN LOW-level pulsewidth
t
200
–
MHH
t
16
×
t
–
MLL
MCY
1. Time from the MLEN falling edge to the next MCK rising edge. If the MCK clock stops after the LSB, the MLEN rise timing is optional.
2. Time from MCK rising edge corresponding to the LSB to the MLEN rising edge.
tMCWH
tMCWL
tMLH
tMLS
0.5VDD
0.5VDD
MCK
MDT
MLEN
t
MCY
MSB
LSB
tMLS
t
MDS
t
MLL
MDH
t
tMHH
0.5VDD
NIPPON PRECISION CIRCUITS—6
SM8703AV
FUNCTIONAL DESCRIPTION
27 MHz Master Clock
The 27 MHz master clock is generated either by connecting a crystal oscillator element between XTI (pin 8)
and XTO (pin 9), as shown in figure 1, or by connecting an external 27 MHz clock to XTI, as shown in figure
2. Input 27MHz master clock on XTI when using an external clock. Crystal oscillator element must be funda-
mental.
C2
XTI (Pin8)
Internal
Oscillator
Circuits
XTO (Pin9)
C1
C1, C2 = 5 to 33pF
MO1 (Pin3)
MO2 (Pin24)
SM8703AV
Figure 1. Crystal oscillator connection
External Clock
Open
XTI (Pin8)
Internal
Circuits
Oscillator
XTO (Pin9)
MO1 (Pin3)
MO2 (Pin24)
SM8703AV
Figure 2. External clock input
NIPPON PRECISION CIRCUITS—7
SM8703AV
Sampling Frequency and Output Clock Frequency
The SM8703AV generates several output clocks from the 27 MHz master clock, with frequencies of 384fs
(SO2), 512fs (SO3, SO4) and 768fs (SO5), where fs is the sampling frequency selected by external control
inputs. SO1 outputs 33.8688 MHz clock. The supported sampling frequencies are 44.1 kHz and 48 kHz,
selected by the sampling frequency select pin (FSEL). The generated frequencies are shown in table 1.
Table 1. Sampling frequency and output clock frequency
Output clock frequency (MHz)
Sampling
FSEL
frequency fs
S O1
S O2
SO3, SO4
22.5792
24.5760
S O5
LOW
44.1 kHz
48 kHz
33.8688
33.8688
16.9344
18.4320
33.8688
36.8640
HIGH
Enable/Disable control
3 wire serial interface is available by using MCK(pin4), MLEN(pin5) and MDT(pin23:FSEL common) pins as
serial mode. At the serial control mode, each enable (fixed as "LOW" at disable) of output frequency can be set
to stop unnecessary outputs.
MCK
FSEL/MDT D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MLEN
Figure 3. Serial control format
16-bit mode resister (MREG) construction in Figure 4. The name and function of each bit are shown in Table 2
and 3. Set the mode-resister D15-D10 as "011100" in the serial control.
MREG
0
1
1
1
0
0
RSV CE5 CE4 CE3 CE2 CE1 RSV RSV RSV RSV
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Note: RSV is fixed as LOW.
Figure 4. Mode resister construction
NIPPON PRECISION CIRCUITS—8
SM8703AV
Table 2. Mode resister function
Bit
Na me
RS V
CE5
CE4
CE3
CE2
CE1
RS V
Function
D9
Must be "LOW"
D8
MO1, MO2 output enable/disable
SO5 output enable/disable
SO3, SO4 output enable/disable
SO2 output enable/disable
SO1 output enable/disable
Must be "LOW"
D7
D6
D5
D4
D3/D2/D1/D0
Table 3. Clock output control settings(CE5 to 1)
CE5 to CE1
LOW
Clock output
Disable (Output fixed as "LOW")
Enable (Default)
HIGH
Note
Output frequency changes according to the MDT pin condition, as MDT and FSEL pin (Sampling frequency
select signal input) are common. Refer to the section “Settling Time (when the sampling frequency is changed)”.
MCK
FSEL/MDT
MREG (16bit data)
MLEN
ts
Stable
SO2 to 5
Stable
Unstable
Figure 5. Serial transfer timing
NIPPON PRECISION CIRCUITS—9
SM8703AV
Settling Time (when the sampling frequency is changed)
The output response when the frequency is changed is shown in figure 6.
FSEL/MDT
tS
tS
SO2
SO3
SO4
SO5
fs = 44.1kHz
fs = 48kHz
fs = 44.1kHz
MO1
MO2
27.0000MHz
33.8688MHz
SO1
Figure 6. System clock transient timing
NIPPON PRECISION CIRCUITS—10
SM8703AV
TYPICAL APPLICATION
+3.3V
+3.3V
CPU
27MHz
27MHz
VDD
VSS
MO2
C3
FSEL/MDT
SO5
MO1
MCK
MLEN
VDDA
VSSA
XTI
768fs
384fs
RSV
SO2
VDD1
VSS1
RSV
C5
C4
C1
C2
X'tal
XTO
RSV
SO3
512fs
512fs
SO4
RSV
VDD2
C6
SO1
VSS2
SM8703AV
33.8688MHz
■ Connect the decoupling capacitors (approximately
0.1µF and 1000pF) in parallel, as close to power
supply pins as possible.
■ Power supply and VSS pins.
• VDD : Power supply for digital block
(CPU I/F*, MO1, MO2)
■ In order to minimize noise, it is useful to make
VSS as solid pattern.
• VSS : VSS for digital block
(CPU I/F*, MO1, MO2)
■ Master clock stability affects the other outputs sta-
bility. In the usage of crystal oscillator, load
capacitor and crystal oscillator should be placed as
close to the SM8703AV as possible, and wired
shortly. Select crystal oscillators and load capaci-
tance carefully, depending on the condition, as
those combination will have influence on the fre-
quency accuracy(C1, C2).
• VDDA : Power supply for PLL block
(XTI, XTO, PLL/VCO)
• VSSA : VSS for PLL block
(XTI, XTO, PLL/VCO)
• VDD1 : Power supply for output block
(except SO1)
• VSS1 : VSS for output block
(except SO1)
■ Supply pattern including decoupling capacitors
needs careful attention to make the IC’s perfor-
mance better, since the SM8703AV outputs sev-
eral high frequency clocks. Pattern capacitance
from output pins should not to be large for preven-
tion of the noise. Connecting output pins to buff-
ers is useful if it is necessary.
• VDD2 : Power supply for SO1
• VSS2 : VSS for SO1
*: CPU I/F: FSEL/MDT, MLEN, MCK
NIPPON PRECISION CIRCUITS—11
SM8703AV
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NIPPON PRECISION CIRCUITS INC.
NC9902AE 2000.03
NIPPON PRECISION CIRCUITS—12
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