CD41063BMN [NSC]
Decade Counter with Asynchronous Clear; 十进制计数器具有异步清零型号: | CD41063BMN |
厂家: | National Semiconductor |
描述: | Decade Counter with Asynchronous Clear |
文件: | 总8页 (文件大小:153K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
March 1988
CD40160BM/CD40160BC
Decade Counter with Asynchronous Clear
CD40161BM/CD40161BC
Binary Counter with Asynchronous Clear
CD40162BM/CD40162BC
Decade Counter with Synchronous Clear
CD40163BM/CD40163BC
Binary Counter with Synchronous Clear
General Description
Features
Y
Wide supply voltage range
3.0V to 15V
0.45 V (typ.)
These (synchronous presettable up) counters are monolith-
ic complementary MOS (CMOS) integrated circuits con-
structed with N- and P-channel enhancement mode transis-
tors. They feature an internal carry look-ahead for fast
counting schemes and for cascading packages without ad-
ditional gating.
Y
High noise immunity
DD
Y
Low power TTL
compatibility
fan out of 2 driving 74L
or 1 driving 74LS
Y
Internal look-ahead for fast counting schemes
Carry output for N-bit cascading
Load control line
Y
Y
Y
Y
A low level at the load input disables counting and causes
the outputs to agree with the data input after the next posi-
tive clock edge. The clear function for the CD40162B and
CD40163B is synchronous and a low level at the clear input
sets all four outputs low after the next positive clock edge.
The clear function for the CD40160B and CD40161B is
asynchronous and a low level at the clear input sets all four
outputs low, regardless of the state of the clock.
Synchronously programmable
Equivalent to MC14160B, MC14161B, MC14162B,
MC14163B
Y
Equivalent to MM74C160, MM74C161, MM74C162,
MM74C163
Counting is enabled when both count enable inputs are
high. Input T is fed forward to also enable the carry out. The
carry output is a positive pulse with a duration approximately
equal to the positive portion of Q and can be used to en-
A
able successive cascaded stages. Logic transitions at the
enable P or T inputs can occur when the clock is high or
low.
Connection Diagram
Dual-In-Line Package
Order Number CD40160B, CD40161B,
CD40162B or CD40163B
TL/F/5986–1
Top View
C
1995 National Semiconductor Corporation
TL/F/5986
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (V
)
DD
3V to 15 V
DC
Input Voltage (V
)
IN
0V to V V
DD DC
b
a
0.5 to 18 V
DC Supply Voltage (V
)
DD
DC
Operating Temperature Range (T )
A
b
a
0.5 V
Input Voltage (V
IN
)
0.5 to V
DD
DC
b
b
a
55 C to 125 C
CD40XXXBM
CD40XXXBC
§
40 C to 85 C
§
§
b
a
65 C to 150 C
Storage Temperature Range (T )
S
§
§
a
§
Power Dissipation (P )
D
Dual-In-Line
Small Outline
700 mW
500 mW
Lead Temperature
(Soldering, 10 seconds)
260 C
§
DC Electrical Characteristics CD40160BM/CD40161BM/CD40162BM/CD40163BM (Note 2)
Limits
b
a
a
Symbol
Parameter
Conditions
55 C
§
25 C
125 C
§
Units
§
Typ
Min
Max
Min
Max
Min
Max
e
e
e
I
Quiescent Device
Current
V
DD
V
DD
V
DD
5V
10V
15V
5
10
20
5
10
20
150
300
600
mA
mA
mA
DD
k
1 mA
V
OL
Low Level Output
Voltage
I
V
V
V
l
O
l
e
5V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
DD
DD
DD
e
e
10V
15V
k
1 mA
V
OH
High Level Output
Voltage
I
V
V
V
l
O
l
e
5V
4.95
9.95
14.95
4.95
9.95
14.95
5
10
15
4.95
9.95
14.95
V
V
V
DD
DD
DD
e
e
10V
15V
e
e
e
e
V
V
Low Level Input
Voltage
V
V
V
5V, V
O
10V, V
15V, V
0.5V or 4.5V
1V or 9V
1.5V or 13.5V
1.5
3.0
4.0
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
IL
DD
DD
DD
e
O
e
O
e
e
e
e
High Level Input
Voltage
V
DD
V
DD
V
DD
5V, V
O
10V, V
15V, V
0.5V or 4.5V
1V or 9V
1.5V or 13.5V
3.5
7.0
11.0
3.5
7.0
11.0
3.5
7.0
11.0
V
V
V
IH
e
e
O
O
e
e
e
e
I
I
I
Low Level Output
Current (Note 3)
V
V
V
5V, V
O
10V, V
15V, V
0.4V
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
OL
DD
DD
DD
e
0.5V
1.5V
O
O
e
e
e
e
e
5V, V
O
b
b
b
b
0.36
High Level Output
Current (Note 3)
V
DD
V
DD
V
DD
4.6V
9.5V
13.5V
0.64
0.51
0.88
2.25
8.8
mA
mA
mA
OH
IN
e
e
b
b
b
b
b
10V, V
15V, V
1.6
4.2
1.3
3.4
0.9
2.4
O
O
b
b
b
b
10b
5
5
e
e
e
e
b
0.10
0.10
b
b
0.10
0.10
b
1.0
1.0
Input Current
V
DD
V
DD
15V, V
15V, V
0V
15V
10
mA
mA
IN
IN
DC Electrical Characteristics CD40160BC/CD40161BC/CD40162BC/CD40163BC (Note 2)
Limits
b
a
a
Symbol
Parameter
Conditions
40 C
§
25 C
85 C
§
Units
§
Typ Max
Min
Max
Min
Min
Max
e
e
e
I
Quiescent Device Current
V
DD
V
DD
V
DD
5V
10V
15V
20
40
80
20
40
80
150
300
600
mA
mA
mA
DD
k
1 mA
V
OL
V
OH
V
IL
Low Level Output
Voltage
I
V
V
V
l
O
l
e
e
e
5V
10V
15V
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
DD
DD
DD
k
1 mA
High Level Output
Voltage
I
V
V
V
l
O
l
e
e
e
5V
10V
15V
4.95
9.95
14.95
4.95
9.95
14.95
5
10
15
4.95
0.95
14.95
V
V
V
DD
DD
DD
e
e
e
e
Low Level Input
Voltage
V
V
V
5V, V
10V, V
15V, V
0.5V or 4.5V
1V or 9V
1.5V or 13.5V
1.5
3.0
4.0
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
DD
DD
DD
O
e
O
e
O
2
DC Electrical Characteristics CD40160BC/CD40161BC/CD40162BC/CD40163BC (Note 2) (Continued)
Limits
b
a
a
85 C
Symbol
Parameter
Conditions
40 C
§
25 C
Units
§
Typ
§
Min
Max
Min
Max
Min
Max
e
e
e
e
V
High Level Input
Voltage
V
V
V
5V, V
O
10V, V
15V, V
0.5V or 4.5V
1V or 9V
1.5V or 13.5V
3.5
7.0
11.0
3.5
7.0
11.0
3.5
7.0
11.0
V
V
V
IH
OL
OH
IN
DD
DD
DD
e
O
e
O
e
e
e
e
I
I
I
Low Level Output
Current (Note 3)
V
DD
V
DD
V
DD
5V, V
0.4V
0.5V
1.5V
0.52
1.3
3.6
0.44
1.1
3.0
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
O
e
e
10V, V
15V, V
O
O
e
e
e
e
O
b
b
b
b
0.36
High Level Output
Current (Note 3)
V
DD
V
DD
V
DD
5V, V
10V, V
15V, V
4.6V
9.5V
13.5V
0.52
0.44
0.88
2.25
8.8
mA
mA
mA
e
e
b
b
b
b
b
b
b
1.3
3.6
1.1
3.0
0.9
2.4
O
O
b
b
10b
5
5
e
e
e
e
b
0.30
0.30
b
b
0.30
0.30
b
1.0
1.0
Input Current
V
DD
V
DD
15V, V
15V, V
0V
15V
10
mA
mA
IN
IN
e
e
e
50 pF, R 200k, unless otherwise specified.
L
AC Electrical Characteristics* T
25 C, C
§
A
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
e
e
e
t
t
t
t
t
t
t
t
t
f
t
or t
or t
or t
Propagation Delay Time from
Clock to Q
V
V
V
5V
10V
15V
250
100
80
400
160
130
ns
ns
ns
PHL
PHL
PHL
PHL
SU
PLH
PLH
PLH
DD
DD
DD
e
e
e
Propagation Delay Time from
Clock to Carry Out
V
DD
V
DD
V
DD
5V
10V
15V
290
120
100
450
190
160
ns
ns
ns
e
e
e
Propagation Delay Time from T
Enable to Carry Out
V
DD
V
DD
V
DD
5V
10V
15V
180
70
60
290
130
110
ns
ns
ns
e
e
e
Propagation Time from Clear to Q
(CD40160B, CD40161B Only)
V
DD
V
DD
V
DD
5V
10V
15V
190
80
70
300
150
120
ns
ns
ns
e
e
e
Minimum Time Prior to Clock that
Data or Load must be Present
V
DD
V
DD
V
DD
5V
10V
15V
120
30
25
ns
ns
ns
e
e
e
Minimum Time Prior to Clock that
Enable P or T must be Present
V
DD
V
DD
V
DD
5V
10V
15V
170
70
60
280
120
100
ns
ns
ns
SU
e
e
e
Minimum Time Prior to Clock that
Clear must be Present (CD40162B,
CD40163B Only)
V
DD
V
DD
V
DD
5V
10V
15V
120
50
40
190
80
70
ns
ns
ns
SU
e
e
e
or t
WH
Maximum Clock Pulse Width
Maximum Clock Rise or Fall Time
Maximum Clock Frequency
Transition Time
V
DD
V
DD
V
DD
5V
10V
15V
125
45
35
250
90
70
ns
ns
ns
WL
e
e
e
or t
FCL
V
DD
V
DD
V
DD
5V
10V
15V
15
5.0
5.0
ms
ms
ms
RCL
CL
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
2
5.5
7
4
11
14
MHz
MHz
MHz
or t
TLH
All Outputs
THL
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
100
50
40
200
100
80
ns
ns
ns
C
C
Average Input Capacitance
Power Dissipation Capacity
Any Input
(Note 4)
5.0
95
7.5
pF
pF
IN
PD
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices
should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
e
Note 2: V
0V unless otherwise specified.
and I are tested one output at a time.
SS
Note 3: I
OH
OL
Note 4: C determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note,
PD
AN-90.
3
Logic Diagram
CD40160B, CD40162B Clear is Synchronous for the CD40162B
TL/F/5986–2
CD40161B, CD40163B Clear is Synchronous for the CD40163B
TL/F/5986–3
4
Logic Waveforms
CD40160B, . . . CD40162B Decade Counters
CD40161B, . . . CD40163B Binary Counters
TL/F/5986–5
TL/F/5986–4
Switching Time Waveforms
TL/F/5986–6
s
s
e
e
&
50X.
OUT
Note 1: All input pulses are from generators having the following characteristics: t
Note 2: All times are measured from 50% to 50%.
t
20 ns, PRR
1 MHz, duty cycle
50%, Z
r
f
Cascading Packages
TL/F/5986–7
5
6
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD40160BMJ, CD40160BCJ, CD40161BMJ,
CD40161BCJ, CD40162BMJ, CD40162BCJ, CD40163BMJ or CD40163BCJ
NS Package Number J16A
7
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD40160BMN, CD40160BCN, CD40161BMN,
CD40161BCN, CD40162BMN, CD40162BCN, CD41063BMN or CD40163BCN
NS Package Number N16E
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
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systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
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a
1111 West Bardin Road
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