CD4538BCJ [NSC]
IC 4000/14000/40000 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDIP16, CERAMIC, DIP-16, Prescaler/Multivibrator;
| 型号： | CD4538BCJ |
| 厂家： | 
National Semiconductor |
| 描述： | IC 4000/14000/40000 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDIP16, CERAMIC, DIP-16, Prescaler/Multivibrator |
| 文件： | 总10页 (文件大小：239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1988
CD4538BM/CD4538BC Dual Precision Monostable
General Description
Features
Y
Wide supply voltage range
3.0V to 15V
0.45 V (typ.)
The CD4538B is a dual, precision monostable multivibrator
with independent trigger and reset controls. The device is
retriggerable and resettable, and the control inputs are inter-
nally latched. Two trigger inputs are provided to allow either
rising or falling edge triggering. The reset inputs are active
low and prevent triggering while active. Precise control of
output pulse-width has been achieved using linear CMOS
techniques. The pulse duration and accuracy are deter-
Y
High noise immunity
CC
Y
Low power
TTL compatibility
Fan out of 2 driving 74L
or 1 driving 74LS
Y
e
New formula: PW
(PW in seconds, R in Ohms, C in Farads)
RC
OUT
Y
Y
Y
Y
Y
g
Wide pulse-width range
1.0% pulse-width variation from part to part (typ.)
%
1 ms to
mined by external components R and C . The device does
X
X
Separate latched reset inputs
Symmetrical output sink and source capability
Low standby current
not allow the timing capacitor to discharge through the tim-
ing pin on power-down condition. For this reason, no exter-
nal protection resistor is required in series with the timing
pin. Input protection from static discharge is provided on all
pins.
5 nA (typ.)
@
5 V
DC
Y
Pin compatible to CD4528B
Block and Connection Diagrams
Dual-In-Line Package
CD4538BM
CD4538BC
TL/F/6000–2
Top View
Order Number CD4538B
TL/F/6000–1
R
and C are External Components
X
X
e
e
V
Pin 16
Pin 8
DD
V
SS
Truth Table
e
e
e
e
e
e
e
H
High Level
Inputs
Outputs
L
Low Level
Transition from Low to High
Transition from High to Low
One High Level Pulse
One Low Level Pulse
Irrelevant
u
v
É
ß
X
Clear
A
B
Q
Q
L
X
X
H
H
X
H
X
X
X
L
L
H
H
L
L
H
L
É
É
ß
ß
v
H
u
C
1995 National Semiconductor Corporation
TL/F/6000
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 and 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (V
)
DD
3 to 15 V
DC
Input Voltage (V
)
IN
0 to V V
DD DC
b
a
0.5 to 18 V
DC Supply Voltage (V
)
DD
DC
Operating Temperature Range (T )
A
b
a
0.5 V
Input Voltage (V
IN
)
0.5V to V
DD
DC
b
b
a
55 C to 125 C
CD4538BM
CD4538BC
§
40 C to 85 C
§
§
b
a
65 C to 150 C
Storage Temperature Range (T )
S
§
§
a
§
Power Dissipation (P )
D
Dual-In-Line
Small Outline
700 mW
500 mW
Lead Temperature (T )
L
(Soldering, 10 seconds)
260 C
§
DC Electrical Characteristics CD4538BM (Note 2)
b
a
a
55 C
§
25 C
§
125 C
§
Symbol
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
Min
Max
e
e
e
e
e
I
Quiescent
V
V
V
5V
V
V
V
5
0.005
0.010
0.015
5
150
300
600
mA
mA
mA
DD
DD
DD
DD
IH
DD
Device Current
10V
15V
V
SS
10
20
10
20
IL
(
(
(
All Outputs Open
e
e
e
V
V
V
Low Level
V
V
V
5V
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
OL
OH
IL
DD
DD
DD
k
e
I
1 mA
, V
l
O
l
IH
Output Voltage
10V
15V
e
e
V
V
V
V
DD IL
SS
e
e
e
High Level
V
V
V
5V
4.95
9.95
4.95
9.95
5
4.95
9.95
V
V
V
DD
DD
DD
k
e
I
1 mA
, V
l
O
l
IH
Output Voltage
10V
15V
10
15
V
V
DD IL
SS
14.95
14.95
14.95
k
1 mA
e
e
e
Low Level
I
l
O
l
e
0.5V or 4.5V
e
1.0V or 9.0V
Input Voltage
V
5V, V
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
DD
DD
DD
O
V
V
10V, V
15V, V
O
e
1.5V or 13.5V
O
k
1 mA
e
e
e
V
High Level
I
IH
l
O
l
e
0.5V or 4.5V
e
1.0V or 9.0V
Input Voltage
V
5V, V
3.5
7.0
3.5
7.0
2.75
5.50
8.25
3.5
7.0
V
V
V
DD
DD
DD
O
V
V
10V, V
15V, V
O
O
e
1.5V or 13.5V
11.0
11.0
11.0
e
e
e
0.4V
I
I
Low Level
Output Current
(Note 3)
V
V
V
5V, V
O
0.64
1.6
0.51
1.3
0.88
2.25
8.8
0.36
0.9
mA
mA
mA
OL
DD
e
e
V
V
V
IH
DD
e
10V, V
0.5V
DD
O
V
SS
IL
e
e
1.5V
15V, V
(
4.2
3.4
2.4
D
O
e
e
e
5V, V
O
b
b
b
b
b
0.36
High Level
Output Current
(Note 3)
V
V
V
4.6V
0.64
0.51
0.88
2.25
mA
mA
mA
OH
DD
e
e
V
V
V
IH
DD
e
b
b
b
b
b
b
10V, V
9.5V
1.6
4.2
1.3
3.4
0.9
2.4
DD
O
e
V
SS
IL
e
b
15V, V
13.5V
(
8.8
D
O
e
e
I
I
Input Current,
Pin 2 or 14
V
15V, V
0V or 15V
IN
IN
DD
IN
IN
b
5
5
g
g
g
g
g
0.02
10
0.05
0.5 mA
1.0 mA
e
e
Input Current
Other Inputs
V
15V, V
0V or 15V
DD
b
g
g
g
0.1
0.1
10
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for acutal device
operation.
e
Note 2: V
0V unless otherwise specified.
and I are tested one output at a time.
SS
Note 3: I
OH
OL
2
DC Electrical Characteristics CD4538BC (Note 2)
b
a
a
40 C
§
25 C
§
85 C
§
Symbol
Parameter
Conditions
Units
Min
Max
Min
Typ
Max
Min
Max
e
e
e
e
e
I
Quiescent
V
V
V
5V
V
V
V
20
40
80
0.005
0.010
0.015
20
40
80
150
300
600
mA
mA
mA
DD
DD
DD
DD
IH
DD
Device Current
10V
15V
V
SS
IL
(
(
(
All Outputs Open
e
e
e
V
V
V
Low Level
V
V
V
5V
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
OL
OH
IL
DD
DD
DD
k
e
I
1 mA
, V
l
O
l
IH
Output Voltage
10V
15V
e
e
V
V
V
V
DD IL
SS
e
e
e
High Level
V
V
V
5V
4.95
9.95
4.95
9.95
5
4.95
9.95
V
V
V
DD
DD
DD
k
e
I
1 mA
, V
l
O
l
IH
Output Voltage
10V
15V
10
15
V
V
DD IL
SS
14.95
14.95
14.95
k
1 mA
e
e
e
Low Level
I
l
O
l
e
0.5V or 4.5V
e
1.0V or 9.0V
Input Voltage
V
5V, V
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
V
V
V
DD
DD
DD
O
V
V
10V, V
15V, V
O
e
1.5V or 13.5V
O
k
1 mA
e
e
e
V
High Level
I
IH
l
O
l
e
0.5V or 4.5V
e
1.0V or 9.0V
Input Voltage
V
5V, V
3.5
7.0
3.5
7.0
2.75
5.50
8.25
3.5
7.0
V
V
V
DD
DD
DD
O
V
V
10V, V
15V, V
O
O
e
1.5V or 13.5V
11.0
11.0
11.0
e
e
e
0.4V
I
I
Low Level
Output Current
(Note 3)
V
V
V
5V, V
O
0.52
1.3
0.44
1.1
0.88
2.25
8.8
0.36
0.9
mA
mA
mA
OL
DD
e
e
V
V
V
IH
DD
e
10V, V
0.5V
DD
O
V
SS
IL
e
e
1.5V
15V, V
(
3.6
3.0
2.4
D
O
e
e
e
5V, V
O
b
b
b
b
b
0.36
High Level
Output Current
(Note 3)
V
V
V
4.6V
0.52
0.44
0.88
2.25
mA
mA
mA
OH
DD
e
e
b
b
b
b
b
b
10V, V
9.5V
V
IL
V
SS
1.3
3.6
1.1
3.0
0.9
2.4
DD
O
e
e
b
15V, V
13.5V
(
8.8
D
O
e
e
I
I
Input Current,
Pin 2 or 14
V
15V, V
0V or 15V
IN
IN
DD
IN
IN
b
5
5
g
g
g
g
g
0.02
10
0.05
0.5 mA
1.0 mA
e
e
Input Current
Other Inputs
V
15V, V
0V or 15V
DD
b
g
g
g
0.3
0.3
10
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed, they are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for acutal device
operation.
e
Note 2: V
0V unless otherwise specified.
and I are tested one output at a time.
SS
Note 3: I
OH
OL
3
e
e
e
e
t 20 ns unless otherwise specified
f
AC Electrical Characteristics* T
25 C, C
§
50 pF, and t
A
L
r
Symbol
Parameter
Conditions
Min
Typ
Max
Units
e
e
e
t
t
, t
TLH THL
Output Transition Time
V
V
V
5V
10V
15V
100
50
40
200
100
80
ns
ns
ns
DD
DD
DD
, t
PLH PHL
Propagation Delay Time
Trigger OperationÐ
A or B to Q or Q
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
300
150
100
600
300
220
ns
ns
ns
Reset OperationÐ
to Q or Q
C
D
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
250
125
95
500
250
190
ns
ns
ns
e
e
e
t
t
, t
WL WH
Minimum Input Pulse Width
A, B, or C
V
V
V
5V
10V
15V
35
30
25
70
60
50
ns
ns
ns
DD
DD
DD
D
e
e
e
Minimum Retrigger Time
Input Capacitance
V
DD
V
DD
V
DD
5V
10V
15V
0
0
0
ns
ns
ns
RR
0
C
Pin 2 or 14
Other Inputs
10
5
pF
pF
IN
7.5
e
e
e
PW
OUT
Output Pulse Width (Q or Q)
(Note: For Typical Distribution,
seeFigure 9 )
V
DD
V
DD
V
DD
5V
10V
15V
208
211
216
226
230
235
244
248
254
ms
ms
ms
e
e
R
C
100 kX
0.002 mF
X
X
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
8.83
9.02
9.20
9.60
9.80
10.00
10.37
10.59
10.80
ms
ms
ms
e
e
R
C
100 kX
0.1 mF
X
X
e
e
e
V
DD
V
DD
V
DD
5V
10V
15V
0.87
0.89
0.91
0.95
0.97
0.99
1.03
1.05
1.07
s
s
s
e
e
R
C
100 kX
10.0 mF
X
X
e
e
e
g
g
g
Pulse Width Match between
Circuits in the Same Package
V
DD
V
DD
V
DD
5V
10V
15V
1
1
1
%
%
%
e
e
R
C
100 kX
0.1 mF
X
X
e
e
C
0.1 mF, R
100 kX
X
X
Operating Conditions
R
C
External Timing Resistance
External Timing Capacitance
5.0
0
**
No Limit
kX
pF
X
X
*AC parameters are guaranteed by DC correlated testing.
**The maximum usable resistance R is a function of the leakage of the Capacitor C , leakage of the CD4538B, and leakage due to board layout, surface
resistance, etc.
X
X
Logic Diagram
TL/F/6000–3
FIGURE 1
4
Theory of Operation
TL/F/6000–4
FIGURE 2
Trigger Operation
The block diagram of the CD4538B is shown in Figure 1,
with circuit operation following.
via the input trigger without regard to the capacitor voltage.
Thus, propagation delay from trigger to Q is independent of
the value of C , R , or the duty cycle of the input waveform.
X
X
As shown in Figures 1 and 2, before an input trigger occurs,
the monostable is in the quiescent state with the Q output
low, and the timing capacitor C completely charged to
Retrigger Operation
X
The CD4538B is retriggered if a valid trigger occursl fol-
lowed by another valid triggerm before the Q output has
returned to the quiescent (zero) state. Any retrigger, after
the timing node voltage at pin 2 or 14 has begun to rise from
V
. When the trigger input A goes from V to V
DD SS
(while
DD
inputs B and C are held to V ) a valid trigger is recog-
D DD
nized, which turns on comparator C1 and N-Channel tran-
sistor N1j. At the same time the output latch is set. With
transistor N1 on, the capacitor C rapidly discharges toward
V
, but has not yet reached V
REF1
, will cause an in-
REF2
X
crease in output pulse width T. When a valid retrigger is
initiatedm, the voltage at T2 will again drop to V before
progressing along the RC charging curve toward V . The
DD
Q output will remain high until time T, after the last valid
retrigger.
V
until V
is reached. At this point the output of com-
REF1
SS
REF1
parator C1 changes state and transistor N1 turns off. Com-
parator C1 then turns off while at the same time comparator
C2 turns on. With transistor N1 off, the capacitor C begins
X
to charge through the timing resistor, R , toward V . When
DD
X
, comparator C2 chang-
the voltage across C equals V
X
REF2
Reset Operation
The CD4538B may be reset during the generation of the
output pulse. In the reset mode of operation, an input pulse
on C sets the reset latch and causes the capacitor to be
D
es state causing the output latch to reset (Q goes low) while
at the same time disabling comparator C2. This ends the
timing cycle with the monostable in the quiescent state,
waiting for the next trigger.
fast charged to V
by turning on transistor Q1n. When
DD
A valid trigger is also recognized when trigger input B goes
to V (while input A is at V and input C is at
SS SS
the voltage on the capacitor reaches V
, the reset latch
REF2
will clear and then be ready to accept another pulse. If the
input is held low, any trigger inputs that occur will be
from V
DD
D
V
)k.
DD
C
D
It should be noted that in the quiescent state C is fully
X
inhibited and the Q and Q outputs of the output latch will not
change. Since the Q output is reset when an input low level
charged to V , causing the current through resistor R to
DD
X
be zero. Both comparators are ‘‘off’’ with the total device
current due only to reverse junction leakages. An added
feature of the CD4538B is that the output latch is set
is detected on the C input, the output pulse T can be made
D
significantly shorter than the minimum pulse width specifica-
tion.
5
Typical Applications
TL/F/6000–5
TL/F/6000–6
TL/F/6000–7
TL/F/6000–8
FIGURE 3. Retriggerable Monostables Circuitry
FIGURE 4. Non-Retriggerable Monostables Circuitry
TL/F/6000–9
FIGURE 5. Connection of Unused Sections
6
Typical Applications (Continued)
TL/F/6000–10
FIGURE 6. Switching Test Waveforms
e
e
R
R
100 kX
XÊ
X
pF
F
e
*C
L
50 pF
TL/F/6000–11
TL/F/6000–12
Input Connections
Characteristics CD
, t , t , t
A
B
t
PLH PHL TLH THL
PW , t , t
V
PG1
V
DD
DD
OUT WH WL
, t , t , t
t
PLH PHL TLH THL
PW , t , t
V
V
PG2
PG2
DD
SS
TL/F/6000–14
OUT WH WL
e
Duty Cycle
50%
t
t
, t
PLH(R) PHL(R)
,
PG3
PG1
, t
WH WL
FIGURE 8. Power Dissipation Test
Circuit and Waveforms
*Includes capacitance of probes,
wiring, and fixture parasitic
Note: Switching test waveforms
for PG1, PG2, PG3 are
shown in Figure 6.
TL/F/6000–13
FIGURE 7. Switching Test Circuit
7
Typical Applications (Continued)
TL/F/6000–15
TL/F/6000–16
FIGURE 9. Typical Normalized Distribution of Units
for Output Pulse Width
FIGURE 12. Typical Pulse Width Error
Versus Temperature
TL/F/6000–17
TL/F/6000–18
FIGURE 10. Typical Pulse Width Variation as a
Function of Supply Voltage V
FIGURE 13. Typical Pulse Width Error
Versus Temperature
DD
TL/F/6000–20
TL/F/6000–19
FIGURE 11. Typical Total Supply Current Versus
FIGURE 14. Typical Pulse Width Versus
Timing RC Product
e
e
100 pF, One Monostable Switching Only
Output Duty Cycle, R
e
100 kX, C
50 pF,
X
L
C
X
8
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4538BMJ or CD4538BCJ
NS Package Number J16A
9
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number CD4538BMN or CD4538BCN
NS Package Number N16E
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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相关型号：
CD4538BCMX_NL
Monostable Multivibrator, 4000/14000/40000 Series, 2-Func, CMOS, PDSO16, 0.150 INCH, MS-012, SOIC-16
FAIRCHILD
CD4538BCM_NL
Monostable Multivibrator, 4000/14000/40000 Series, 2-Func, CMOS, PDSO16, 0.150 INCH, LEAD FREE, MS-012, SOIC-16
FAIRCHILD
CD4538BCN_NL
Monostable Multivibrator, 4000/14000/40000 Series, 2-Func, CMOS, PDIP16, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-16
FAIRCHILD
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