DM74LS122 [NSC]
DM74LS122 Retriggerable One-Shot with Clear and Complementary Outputs; DM74LS122可重触发单稳态具有清零和互补输出
| 型号： | DM74LS122 |
| 厂家： | 
National Semiconductor |
| 描述： | DM74LS122 Retriggerable One-Shot with Clear and Complementary Outputs |
| 文件： | 总6页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1989
DM74LS122 Retriggerable One-Shot with
Clear and Complementary Outputs
Y
Retriggerable to 100% duty cycle
General Description
Y
Y
Y
Y
Y
Over-riding clear terminates output pulse
Internal 10 kX timing resistor
TTL, DTL compatible
The DM74LS122 is a retriggerable monostable multivibrator
featuring both positive and negative edge triggering with
complementary outputs. An internal 10 kX timing resistor is
provided for design convenience minimizing component
count and layout problems. This device can be used with a
single external capacitor. The ’LS122 has two active-low
transition triggering inputs (A), two active-high transition trig-
gering inputs (B), and a CLEAR input that terminates the
output pulse width at a predetermined time independent of
the timing components. The clear (CLR) input also serves
as a trigger input when it is pulsed with a low level pulse
transition (ß). To obtain optimum and trouble free opera-
tion please read operating rules and NSC one-shot applica-
tion notes carefully and observe recommendations.
Compensated for V
Input clamp diodes
and temperature variations
CC
Functional Description
The basic output pulse width is determined by selection of
the internal resistor R or an external resistor (R ) and
INT X
capacitor (C ). Once triggered, the output pulse width may
X
be extended by retriggering the gated active-low (A) tran-
sition inputs or the active-high transition (B) inputs or the
CLEAR input. The output pulse width can be reduced or
terminated by overriding it with the active-low CLEAR input.
Features
Y
DC triggered from active-high transition or active-low
transition inputs
Connection Diagram
Dual-In-Line Package
Function Table
Inputs
A2
Outputs
CLEAR
A1
B1
B2
Q
Q
L
X
X
H
X
X
L
X
H
X
X
X
X
X
L
H
L
H
X
L
X
L
H
X
X
X
L
L
H
H
H
H
H
H
H
H
u
u
X
H
u
H
u
H
H
H
H
H
É
É
É
É
É
É
É
É
É
ß
ß
ß
ß
ß
ß
ß
ß
ß
u
H
u
H
H
H
H
H
H
L
X
X
X
H
L
L
v
v v
H
v
L
X
L
X
TL/F/6385–1
Order Number DM74LS122M or DM74LS122N
See NS Package Number M14A or N14A
e
e
e
H
L
High Logic Level
Low Logic Level
X
Can Be Either Low or High
e
Positive Going Transition
Negative Going Transition
u
e
v
e
É
A Positive Pulse
A Negative Pulse
e
ß
C
1995 National Semiconductor Corporation
TL/F/6385
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
7V
Operating Free Air Temperature Range
DM74LS
a
0 C to 70 C
§
§
b
a
65 C to 150 C
Storage Temperature
§
§
Recommended Operating Conditions
Symbol
Parameters
Min
4.75
2
Nom
Max
Units
V
V
V
V
Supply Voltage
5
5.25
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
V
IH
0.8
V
IL
b
I
I
0.4
mA
mA
OH
OL
8
t
Pulse Width
(Note 6)
A or B High
A or B Low
Clear Low
40
40
40
5
W
ns
R
C
C
External Timing Resistor
External Timing Capacitance
Wiring Capacitance
260
kX
mF
EXT
No Restriction
EXT
WIRE
50
70
pF
at R /C Terminal
EXT EXT
T
A
Free Air Operating Temperature
0
C
§
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
Min
Max
Units
(Note 1)
e
e
e b
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
18 mA
V
V
I
CC
e
High Level Output
Voltage
V
V
Max
Min
OH
CC
OH
2.7
3.4
e
e
Max, V
IL
IH
e
e
e
V
Low Level Output
Voltage
V
V
Min, I
Max
Min
OL
CC
OL
0.35
0.25
0.5
e
Max, V
IH
V
IL
e
e
I
4 mA, V
CC
Min
0.4
0.1
20
OL
@
Input Current Max
e
e
I
V
Max, V
7V
I
CC
I
mA
Input Voltage
e
e
e
e
e
I
I
I
High Level Input Current
Low Level Input Current
V
CC
V
CC
V
CC
Max, V
Max, V
Max
2.7V
0.4V
mA
IH
IL
I
b
0.4
mA
I
Short Circuit
OS
b
b
100
20
mA
mA
Output Current
(Note 2)
e
V
CC
I
Supply Current
Max (Notes 3, 4 and 5)
6
11
CC
2
e
e
25 C (See Section 1 for Test Waveforms and Output Load)
Switching Characteristics at V
5V and T
§
CC
A
e
R
L
2 kX
From (Input)
To (Output)
e
e
15 pF
e
1000 pF, R 10 kX
EXT
C
15 pF
C
L
L
Symbol
Parameter
Units
e
e
e
C
EXT
C
0 pF, R
EXT
5 kX
EXT
Min
Max
Min
Max
t
t
t
t
t
t
t
t
Propagation Delay Time
Low to High Level Output
A to Q
B to Q
PLH
33
ns
ns
ns
ns
ns
ns
Propagation Delay Time
Low to High Level Output
PLH
44
45
Propagation Delay Time
High to Low Level Output
A to Q
PHL
Propagation Delay Time
High to Low Level Output
B to Q
PHL
56
Propagation Delay Time
Low to High Level Output
Clear to Q
Clear to Q
A or B to Q
A or B to Q
PLH
45
Propagation Delay Time
High to Low Level Output
PHL
27
Minimum Width of Pulse
at Output Q
WQ(Min)
200
ns
Output Pulse Width
4
5
ms
W(out)
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
CC
A
e
e
Note 3: Quiescent I is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs open, C
CC
0.02 mF, and R
EXT
EXT
25 kX.
e
e
25 kX.
Note 4: I is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs open, C
CC
0.02 mF, and R
EXT
EXT
Note 5: With all outputs open and 4.5V applied to all data and clear inputs, I
CC
is measured after a momentary ground, then 4.5V is applied to the clock.
e
e
5V.
Note 6: T
25 C and V
§
A
CC
Operating Rules
1. To use the internal 10 kX timing resistor, connect the
R
pin to V
.
CC
INT
2. An external resistor (R ) or the internal resistor (10 kX)
and an external capacitor (C ) are required for proper
X
X
operation. The value of C may vary from 0 to any neces-
X
sary value. For small time constants use high-quality
mica, glass, polypropylene, polycarbonate, or polystyrene
capacitors. For large time constants use solid tantalum or
special aluminum capacitors. If the timing capacitors
have leakages approaching 100 nA or if stray capaci-
tance from either terminal to ground is greater than 50 pF
the timing equations may not represent the pulse width
the device generates.
TL/F/6385–2
FIGURE 1
3. The pulse width is essentially determined by external tim-
k
ing components R and C . For C
X
1000 pF see Fig-
ure 1; design curves on T as function of timing compo-
X
X
W
1000 pF the output is defined as:
ll
nents value. For C
X
e
T
W
KR C
X X
[
]
where
R
X
is in kX
[
]
C
is in pF
is in ns
X
[
]
T
W
&
K
0.37
3
Operating Rules (Continued)
The K factor is not a constant, but, varies with C . See
X
Figure 2.
TL/F/6385–6
FIGURE 5
TL/F/6385–3
FIGURE 2
4. The switching diode required for most TTL one-shots
when using an electrolytic timing capacitor is not needed
for the ’LS122 and should not be used.
5. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
TL/F/6385–4
TL/F/6385–7
Note: ‘‘R
’’ should be as close to the device pins as possible.
remote
FIGURE 6
8. Under any operating condition C and R must be kept
as close to the one-shot device pins as possible to mini-
mize stray capacitance, to reduce noise pick-up, and to
reduce I-R and Ldi/dt voltage developed along their con-
FIGURE 3
6. The retriggerable pulse width is calculated as shown be-
low:
X
X
e
a
e
c
c
a
C T
X
T
T
W
t
0.50
R
PLH
X
PLH
The retriggered pulse width is equal to the pulse width
plus a delay time period (Figure 4).
necting paths. If the lead length from C to pins (13) and
X
(11) is greater than 3 cm, for example, the output pulse
width might be quite different from values predicted from
the appropriate equations. A non-inductive and low ca-
pacitive path is necessary to ensure complete discharge
of C in each cycle of its operation so that the output
X
pulse width will be accurate.
TL/F/6385–5
9. V and ground wiring should conform to good high-fre-
CC
FIGURE 4
quency standards and practices so that switching tran-
sients on the V and ground return leads do not cause
CC
interaction between one-shots. A 0.01 mF to 0.10 mF by-
pass capacitor (disk ceramic or monolithic type) from V
7. Output pulse width variation versus V and operation
temperatures: Figure 5 depicts the relationship between
CC
CC
to ground is necessary on each device. Furthermore, the
pulse width variation versus V ; and Figure 6 depicts
CC
pulse width variation versus temperatures.
bypass capacitor should be located as close to the V
pin as space permits.
CC
*For further detailed device characteristics and output performance
please refer to the NSC one-shot application note AN-366.
4
Physical Dimensions inches (millimeters)
14-Lead Small Outline Molded Package (M)
Order Number DM74LS122M
NS Package Number M14A
5
Physical Dimensions inches (millimeters) (Continued)
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS122N
NS Package Number N14A
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