DP7310J [NSC]
DP7310/DP8310/DP7311/DP8311 Octal Latched Peripheral Drivers; DP7310 / DP8310 / DP7311 / DP8311八进制锁存外设驱动器
| 型号： | DP7310J |
| 厂家： | 
National Semiconductor |
| 描述： | DP7310/DP8310/DP7311/DP8311 Octal Latched Peripheral Drivers |
| 文件： | 总10页 (文件大小：171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1995
DP7310/DP8310/DP7311/DP8311 Octal Latched
Peripheral Drivers
Y
All outputs simultaneously sink rated current ‘‘DC’’ with
no thermal derating at maximum rated temperature
Parallel latching or buffering
General Description
The DP7310/8310, DP7311/8311 Octal Latched Peripheral
Drivers provide the function of latching eight bits of data
with open collector outputs, each driving up to 100 mA DC
with an operating voltage range of 30V. Both devices are
designed for low input currents, high input/output voltages,
and feature a power up clear (outputs off) function.
Y
Y
Y
Y
Separate active low enables for easy data bussing
Internal ‘‘glitch free’’ power up clear
10% V
tolerance
CC
Applications
Y
The DP7310/8310 are positive edge latching. Two active
low write/enable inputs are available for convenient data
bussing without external gating.
High current high voltage drivers
Y
Relay drivers
Y
Lamp drivers
The DP7311/8311 are positive edge latches. The active low
strobe input latches data or allows fall through operation
when held at logic ‘‘0’’. The latches are cleared (outputs off)
with a logic ‘‘0’’ on the clear pin.
Y
LED drivers
Y
TRIAC drivers
Y
Solenoid drivers
Y
Stepper motor drivers
Features
Y
Y
Level translators
High current, high voltage open collector outputs
Y
Fiber-optic LED drivers
Y
Low current, high voltage inputs
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL/F/5246–1
TL/F/5246–2
Top View
Top View
Order Number DP7310J, DP7311J,
DP8310N or DP8311N
See NS Package Number J20A or N20A
C
1995 National Semiconductor Corporation
TL/F/5246
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
Units
Supply Voltage (V
Temperature
)
CC
4.5
5.5
V
Supply Voltage
Input Voltage
Output Voltage
7.0V
35V
35V
b
a
125
DP7310/DP7311
DP8310/DP8311
Input Voltage
55
C
§
§
a
0
70
C
30
V
Maximum Power Dissipation* at 25 C
Cavity Package
DP8310/DP8311
Output Voltage
30
V
§
1821 mW
2005 mW
b
a
65 C to 150 C
Storage Temperature Range
§
§
Lead Temperature (Soldering, 4 sec.)
260 C
§
*Derate cavity package 12.1 mW/ C above 25 C; derate molded package
§
§
16.0 mW/ C above 25 C.
§
§
DC Electrical Characteristics DP7310/DP8310, DP7311/DP8311 (Notes 2 and 3)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘0’’ Output Voltage
2.0
V
V
IH
0.8
IL
Data outputs latched to
e
OL
logical ‘‘0’’, V
Min.
CC
e
e
DP7310/DP7311
DP8310/DP8311
I
I
75 mA
0.4
0.5
V
V
OL
100 mA
0.35
OL
I
Logical ‘‘1’’ Output Current
Data outputs latched to
e
OH
logical ‘‘1’’, V
CC
Min.
e
e
DP7310/DP7311
DP8310/DP8311
V
V
25V
30V
500
250
mA
mA
OH
OH
2.5
0.1
e
e
e
I
I
Logical ‘‘1’’ Input Current
V
V
2.7V, V
CC
Max
Max
25
mA
mA
IH
I
IH
IN
e
Input Current at Maximum Input
Voltage
30V, V
CC
1
250
e
e
CC
b
b
300
I
Logical ‘‘0’’ Input Current
Input Clamp Voltage
V
0.4V, V
Max
215
mA
IL
IN
e
IN
b
b
1.5
V
I
12 mA
0.8
V
clamp
I
Supply Current, Outputs On
Data outputs latched to a
logical ‘‘0’’. All Inputs are
CC0
e
at logical ‘‘1’’, V
CC
Max.
DP7310
DP8310
DP7311
DP8311
100
100
88
125
152
117
125
mA
mA
mA
mA
88
I
Supply Current, Outputs Off
Data outputs latched to a
logic ‘‘1’’. Other
CC1
conditions same as I
.
CC0
DP7310
DP8310
DP7311
DP8311
40
40
25
25
47
57
34
36
mA
mA
mA
mA
2
e
e b a
55 C to 125 C
AC Electrical Characteristics DP7310/DP8310: V
4.5V, T
§
§
CC
A
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
t
t
High to Low Propagation Delay
Write Enable Input to Output
(Figure 1)
pd0
40
120
ns
Low to High Propagation Delay
Write Enable Input to Output
(Figure 1)
pd1
70
20
25
150
ns
ns
ns
e
t
HOLD
Minimum Set-Up Time
0 ns
SETUP
45
60
Data in to Write Enable Input
(Figure 1)
t
t
,
Minimum Write Enable Pulse
Width
(Figure 1)
pWH
pWL
t
t
High to Low Output Transition Time
Low to High Output Transition Time
‘‘N’’ Package (Note 4)
(Figure 1)
(Figure 1)
16
38
5
35
70
15
ns
ns
pF
THL
TLH
C
IN
e
e
AC Electrical Characteristics DP7311/DP8311: V
5V, T
A
25 C
§
CC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
t
t
High to Low Propagation Delay
Data In to Output
(Figure 2)
pd0
30
70
60
ns
Low to High Propagation Delay
Data to Output
(Figure 2)
pd1
100
ns
ns
e
0 ns
Minimum Set-Up Time
Data in to Strobe Input
t
SETUP
HOLD
b
0
25
(Figure 2)
(Figure 2)
(Figure 2)
(Figure 2)
(Figure 2)
(Figure 2)
(Note 4)
t
t
t
t
t
Minimum Strobe Enable Pulse Width
Propagation Delay Clear to Data Output
Minimum Clear Input Pulse Width
High to Low Output Transition Time
Low to High Output Transition Time
Input CapacitanceÐAny Input
60
35
70
25
20
38
5
ns
ns
ns
ns
ns
pF
pWL
135
pdC
60
pWC
35
60
15
THL
TLH
C
IN
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
b
e
a
a
Note 2: Unless otherwise specified min/max limits apply across the 55 C to 125 C temperature range for the DP7310/DP7311 and across the 0 C to 70 C
§
5V.
§
§
§
e
for the DP8310/DP8311. All typical values are for T
25 C, V
§
A
CC
Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted.
e
e
25 C.
Note 4: Input capacitance is guaranteed by periodic testing. f
TEST
10 kHz at 300 mV, T
§
A
3
Logic Table
DP7310/DP8310
DP7311/DP8311
Data
Write
Write
Data
Input
DI
Data
Data
Clear
CLR
Strobe
Enable 1
Enable 2
Output
Input
DI
1–8
Output
STR
WE
WE
DO
1–8
DO
1-8
1
2
1–8
0
0
0
0
X
0
1
0
1
X
X
X
Q
1
1
1
0
1
0
0
X
X
0
1
X
Q
O
O
0
1
0
1
0
1
O
O
0
1
0
0
e
e
e
e
X
1
0
Don’t Care
Outputs Off
1
Q
Q
Q
1
0
Outputs On
Pre-existing Output
1
1
Q
e
O
Positive Edge Transition
Block Diagrams
DP7310/DP8310
TL/F/5246–3
DP7311/DP8311
TL/F/5246–4
4
Switching Time Waveforms
DP7310/DP8310
TL/F/5246–5
DP7311/DP8311
TL/F/5246–6
Switching Time Test Circuits
TL/F/5246–7
TL/F/5246–8
e
e
WE
*WE
0V When the Input
Pulse Generator Characteristics:
1
2
e
e
e
t 5 ns
f
Z
50X, t
O
r
FIGURE 1. DP7310/DP8310
FIGURE 2. DP7311/DP8311
5
Typical Applications DP8310/11 Buffering High Current Device (Notes 1 and 2)
PNP High Current Driver
NPN High Current Driver
TL/F/5246–10
TL/F/5246–9
VMOS High Current Driver
Circuit Used to Reduce Peak
Transient Lamp Current
b
V
V
L
B
e
e
R
R
R
L
B
B
V
L
#
#
J
b
6.3
1
e
&
100X
18X
95.4
1
J
TL/F/5246–11
TL/F/5246–12
Eight Output/Four Output Fiber Optic LED Driver
DP8311 100 mA Drivers DP8311 Parallel Outputs (200 mA) Drivers*
TL/F/5246–13
TL/F/5246–14
6
Typical Applications (Continued)
8-Bit Level Translator-Driver
Digital Controlled 256 Level
Power Supply from 1.2V to 30V
TL/F/5246–15
TL/F/5246–16
200 mA Drive for a 4 Phase Bifilar Stepper Motor
Reading the State of the Latched Peripherals
vel Input
must not
V of the
CC
S96
TL/F/5246–17
TL/F/5246–18
Note 1: Always use good V
bypass and ground techniques to suppress transients caused by peripheral loads.
CC
Note 2: Printed circuit board mounting is required if these devices are operated at maximum rated temperature and current (all outputs on DC).
7
8
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DP7310J or DP7311J
NS Package Number J20A
9
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number DP8310N or DP8311N
NS Package Number N20A
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