DS75161AN [NSC]
IEEE-488 GPIB Transceivers; IEEE-488 GPIB收发器
| 型号： | DS75161AN |
| 厂家： | 
National Semiconductor |
| 描述： | IEEE-488 GPIB Transceivers |
| 文件： | 总10页 (文件大小：213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
May 1999
DS75160A/DS75161A
IEEE-488 GPIB Transceivers
General Description
Features
n 8-channel bi-directional non-inverting transceivers
n Bi-directional control implemented with TRI-STATE®
output design
This family of high-speed-Schottky 8-channel bi-directional
transceivers is designed to interface TTL/MOS logic to the
IEEE Standard 488-1978 General Purpose Interface Bus
(GPIB). PNP inputs are used at all driver inputs for minimum
loading, and hysteresis is provided at all receiver inputs for
added noise margin. The IEEE-488 required bus termination
is provided internally with an active turn-off feature which dis-
connects the termination from the bus when VCC is removed.
n Meets IEEE Standard 488-1978
n High-speed Schottky design
n Low power consumption
n High impedance PNP inputs (drivers)
n 500 mV (typ) input hysteresis (receivers)
n On-chip bus terminators
n No bus loading when VCC is removed
n Pin selectable open collector mode on DS75160A driver
outputs
The General Purpose Interface Bus is comprised of 16 sig-
nal lines — 8 for data and 8 for interface management. The
data lines are always implemented with DS75160A, and the
management lines are either implemented with DS75161A in
a single-controller system.
n Accommodates multi-controller systems
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
DS005804-16
Order Number DS75161AN or DS75161AWM
See NS Package Number M20B or N20B
DS005804-1
Top View
Order Number DS75160AN or DS75160AWM
See NS Package Number M20B or N20A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation
DS005804
www.national.com
Absolute Maximum Ratings (Note 2)
Molded Package
1897 mW
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Min
4.75
0
Max
5.25
70
Units
V
VCC, Supply Voltage
TA, Ambient Temperature
IOL, Output Low Current
Bus
˚C
Supply Voltage, VCC
7.0V
5.5V
Input Voltage
48
16
mA
mA
Storage Temperature Range
Lead Temperature (Soldering, 4 sec.)
−65˚C to +150˚C
260˚C
Terminal
Note 1: Derate molded package 15.2 mW/˚C above 25˚C.
Maximum Power Dissipation (Note 1) at 25˚C
Electrical Characteristics (Notes 3, 4)
Symbol
Parameter
High-Level Input Voltage
Low-Level Input Voltage
Input Clamp Voltage
Conditions
Min
Typ
Max Units
VIH
2
V
VIL
0.8
V
V
=
VIK
II −18 mA
−0.8 −1.5
VHYS
VOH
Input Hysteresis
High-Level
Bus
400
2.7
2.5
500
3.5
3.4
mV
V
=
IOH −800 µA
Terminal
=
IOH −5.2 mA
Output Voltage
Low-Level
Bus (Note 4)
Terminal
=
VOL
IOL 16 mA
0.3
0.4
0.2
0.1
0.5
0.5
100
20
V
µA
µA
V
=
IOH 48 mA
Output Voltage
High-Level
Bus
=
VI 5.5V
IIH
Terminal and
TE, PE, DC,
SC Inputs
=
VI 2.7V
Input Current
Low-Level
=
IIL
VI 0.5V
−10 −100
Input Current
Terminator Bias
Voltage at Bus Port
Terminator
=
VBIAS
Driver
II(bus) 0 (No Load)
2.5
3.0
3.7
Disabled
=
ILOAD
VI(bus) −1.5V to 0.4V
−1.3
0
=
Bus Loading
Current
VI(bus) 0.4V to 2.5V
−3.2
2.5
=
Bus
Driver
VI(bus) 2.5V to 3.7V
mA
Disabled
−3.2
2.5
=
VI(bus) 3.7V to 5V
0
=
VI(bus) 5V to 5.5V
0.7
2.5
=
=
VCC 0V, VI(bus) 0V to 2.5V
40
µA
=
=
IOS
Short-Circuit
Terminal
VI 2V, VO 0V (Note 5)
−15
−35
−35
−75
mA
Output Current
Supply Current
Bus (Note 6)
DS75160A
−75 −150
=
=
=
ICC
Transmit, TE 2V, PE 2V, VI 0.8V
85
70
84
20
125
100
125
30
=
=
=
Receive, TE 0.8V, PE 2V, VI 0.8V
mA
pF
= = =
TE 0.8V, DC 0.8V, VI 0.8V
DS75161A
Bus
= =
VCC 5V or 0V, VI 0V to 2V,
CIN
Bus-Port
=
1 MHz
Capacitance
f
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device
should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 3: Unless otherwise specified, min/max limits apply across the 0˚C to +70˚C temperature range and the 4.75V to 5.25V power supply range. All typical values
=
=
5.0V.
are for T
25˚C and V
CC
A
Note 4: All currents into device pins are shown as positive; all currents out of device pins are shown as negative; all voltages are referenced to ground, unless oth-
erwise specified. All values shown as max or min are so classified on absolute value basis.
Note 5: Only one output at a time should be shorted.
Note 6: This characteristic does not apply to outputs on DS75161A that are open collector.
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2
Switching Characteristics (Note 7)
=
=
±
VCC 5.0V 5%, TA 0˚C to 70˚C
Symbol
Parameter
From
To
Conditions
DS75160A
DS75161A
DS75162A Units
Min Typ Max Min Typ Max Min Typ Max
=
tPLH
tPHL
tPLH
tPHL
tPZH
tPHZ
Propagation Delay Time,
Low to High Level Output
Propagation Delay Time,
High to Low Level Output
Propagation Delay Time,
Low to High Level Output
Propagation Delay Time,
High to Low Level Output
Output Enable Time
VL 2.3V
10 20
14 20
14 20
10 20
19 32
15 22
10 20
14 20
14 20
10 20
23 40
15 25
10 20
14 20
14 20
10 20
23 40
15 25
ns
ns
ns
ns
ns
ns
=
RL 38.3Ω
Terminal Bus
=
CL 30 pF
Figure 1
=
VL 5.0V
=
Terminal RL 240Ω
Bus
=
CL 30 pF
Figure 2
=
VI 3.0V
=
VL 0V
to High Level
=
RL 480Ω
Output Disable Time
TE, DC,
or SC
=
From High Level
CL 15 pF
Figure 1
=
tPZL
Output Enable Time
to Low Level
(Note 8)
(Note 9)
Bus
VI 0V
24 35
17 25
28 48
17 27
28 48
17 27
ns
ns
=
VL 2.3V
=
RL 38.3Ω
tPLZ
Output Disable Time
From Low Level
=
CL 15 pF
Figure 1
=
tPZH
Output Enable Time
to High Level
VI 3.0V
17 33
15 25
18 40
22 33
18 40
22 33
ns
ns
=
VL 0V
=
RL 3 kΩ
tPHZ
Output Disable Time
From High Level
TE, DC,
or SC
=
Terminal CL 15 pF
Figure 1
=
tPZL
Output Enable Time
to Low Level
(Note 8)
(Note 9)
VI 0V
25 39
15 27
28 52
20 35
28 52
20 35
ns
ns
=
VL 5V
=
RL 280Ω
tPLZ
Output Disable Time
From Low Level
=
CL 15 pF
Figure 1
=
tPZH
Output Pull-Up Enable
Time (DS75160A Only)
Output Pull-Up Disable
Time (DS75160A Only)
VI 3V
10 17
10 15
NA
NA
NA
NA
ns
ns
=
VL 0V
PE
Bus
=
RL 480Ω
tPHZ
(Note 8)
=
CL 15 pF
Figure 1
=
=
Note 7: Typical values are for V
5.0V and T
25˚C and are meant for reference only.
CC
A
Note 8: Refer to Functional Truth Tables for control input definition.
Note 9: Test configuration should be connected to only one transceiver at a time due to the high current stress caused by the V voltage source when the output con-
I
nected to that input becomes active.
3
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Switching Load Configurations
DS005804-8
=
logic high 3.0V
V
V
C
=
logic low 0V
C
*C includes jig and probe capacitance
L
DS005804-9
FIGURE 1.
=
logic high 3.0V
V
V
C
=
logic low 0V
C
*C includes jig and probe capacitance
L
FIGURE 2.
Connection Diagrams
Dual-In-Line Package
DS005804-2
Top View
This device is also an 8-channel bi-directional transceiver
which is specifically configured to implement the eight man-
agement signal lines of the IEEE-488 bus. This device,
paired with the DS75160A, forms the complete 16-line inter-
face between the IEEE-488 bus and a single controller in-
strumentation system. In compliance with the system organi-
zation of the management signal lines, the SRQ, NDAC, and
NRFD bus port outputs are open collector. In contrast to the
DS75160A, these open collector outputs are a fixed configu-
ration. The direction control is divided into three groups. The
DAV, NDAC, and NRFD transceiver directions are controlled
by the TE input. The ATN, SRQ, REN, and IFC transceiver
directions are controlled by the DC input. The EOI trans-
ceiver direction is a function of both the TE and DC inputs, as
well as the logic level present on the ATN channel. The port
connections to the bus lines have internal terminators identi-
cal to the DS75160A.
Functional Description
DS75160A
This device is an 8-channel bi-directional transceiver with
one common direction control input, denoted TE. When used
to implement the IEEE-488 bus, this device is connected to
the eight data bus lines, designated DIO1–DIO8. The port
connections to the bus lines have internal terminators, in ac-
cordance with the IEEE-488 Standard, that are deactivated
when the device is powered down. This feature guarantees
=
no bus loading when VCC 0V. The bus port outputs also
have a control mode that either enables or disables the ac-
tive upper stage of the totem-pole configuration. When this
control input, denoted PE, is in the high state, the bus out-
puts operate in the high-speed totem-pole mode. When PE
is in the low state, the bus outputs operate as open collector
outputs which are necessary for parallel polling.
DS75161A
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4
Functional Description (Continued)
Logic Diagrams
Table of Signal Line Abbreviations
DS75160A
Signal Line Mne-
Classi-
fication
monic
Definition
Device
DC
Direction Control
DS75161A
Control
PE
TE
SC
Pull-Up Enable
Talk Enable
DS75160A
All
Signals
System Controller
Data
B1–B8 Bus Side of Device
D1–D8 Terminal Side
of Device
I/O Ports
DS75160A
DS75161A
ATN
DAV
EOI
Attention
Data Valid
End or Identify
Interface Clear
Management IFC
Signals
NDAC Not Data Accepted
NRFD Not Ready for Data
REN Remote Enable
SRQ Service Request
DS005804-4
5
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Logic Diagrams (Continued)
DS75161A
DS005804-5
DS005804-7
Switching Waveforms
Transmit Propagation Delays
DS005804-10
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6
Switching Waveforms (Continued)
Receive Propagation Delays
DS005804-11
DS005804-12
DS005804-13
Terminal Enable/Disable Times
Bus Enable/Disable Times
=
=
t
f
*Input signal: f 1.0 MHz, 50% duty cycle, t
≤ 5 ns
r
Performance Characteristics
Bus Port Load Characteristics
DS005804-14
Refer to Electrical Characteristics table
7
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Functional Truth Tables
DS75160A
Control Input
Data Transceivers
Level
TE
H
PE
H
Direction
Bus Port Configuration
Totem-Pole Output
Open Collector Output
Input
T
T
R
H
L
L
X
DS75161A
Control Input Level
Transceiver Signal Direction
*
TE
H
H
L
DC
H
L
ATN
EOI
REN
IFC
R
SRQ
T
NRFD NDAC
DAV
T
R
T
R
T
R
T
R
T
R
R
T
T
R
R
T
T
T
R
T
H
L
R
T
R
L
T
R
R
H
L
X
H
T
R
R
T
X
H
L
L
X
X
H
L
=
=
=
=
=
H
L
X
T
R
High level input
Low level input
Don’t care
Transmit, i.e., signal outputted to bus
Receive, i.e., signal outputted to terminal
*
The ATN signal level is sensed for internal multiplex control of EOI transmission direction logic.
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8
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number DS75160AWM
NS Package Number M20B
9
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Molded Dual-In-Line Package (N)
Order Number DS75160AN or DS75161AN
NS Package Number N20A
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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Corporation
Americas
Tel: 1-800-272-9959
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