JM38510/10901BPA [NSC]

IC PULSE; RECTANGULAR, TIMER, CDIP8, CERDIP-8, Analog Waveform Generation Function;
JM38510/10901BPA
型号: JM38510/10901BPA
厂家: National Semiconductor    National Semiconductor
描述:

IC PULSE; RECTANGULAR, TIMER, CDIP8, CERDIP-8, Analog Waveform Generation Function

CD
文件: 总17页 (文件大小:475K)
中文:  中文翻译
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National Semiconductor is now part of  
Texas Instruments.  
Search http://www.ti.com/ for the latest technical  
information and details on our current products and services.  
February 2000  
LM555  
Timer  
General Description  
Features  
n Direct replacement for SE555/NE555  
n Timing from microseconds through hours  
The LM555 is a highly stable device for generating accurate  
time delays or oscillation. Additional terminals are provided  
for triggering or resetting if desired. In the time delay mode of  
operation, the time is precisely controlled by one external re-  
sistor and capacitor. For astable operation as an oscillator,  
the free running frequency and duty cycle are accurately  
controlled with two external resistors and one capacitor. The  
circuit may be triggered and reset on falling waveforms, and  
the output circuit can source or sink up to 200mA or drive  
TTL circuits.  
n Operates in both astable and monostable modes  
n Adjustable duty cycle  
n Output can source or sink 200 mA  
n Output and supply TTL compatible  
n Temperature stability better than 0.005% per ˚C  
n Normally on and normally off output  
n Available in 8-pin MSOP package  
Applications  
n Precision timing  
n Pulse generation  
n Sequential timing  
n Time delay generation  
n Pulse width modulation  
n Pulse position modulation  
n Linear ramp generator  
Schematic Diagram  
DS007851-1  
© 2000 National Semiconductor Corporation  
DS007851  
www.national.com  
Connection Diagram  
Dual-In-Line, Small Outline  
and Molded Mini Small Outline Packages  
DS007851-3  
Top View  
Ordering Information  
Package  
Part Number  
Package Marking  
LM555CM  
LM555CM  
Z55  
Media Transport  
Rails  
NSC Drawing  
8-Pin SOIC  
LM555CM  
LM555CMX  
LM555CMM  
LM555CMMX  
LM555CN  
M08A  
2.5k Units Tape and Reel  
1k Units Tape and Reel  
3.5k Units Tape and Reel  
Rails  
8-Pin MSOP  
8-Pin MDIP  
MUA08A  
N08E  
Z55  
LM555CN  
www.national.com  
2
Absolute Maximum Ratings (Note 2)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Soldering Information  
Dual-In-Line Package  
Soldering (10 Seconds)  
Small Outline Packages  
(SOIC and MSOP)  
260˚C  
Supply Voltage  
+18V  
Vapor Phase (60 Seconds)  
Infrared (15 Seconds)  
215˚C  
220˚C  
Power Dissipation (Note 3)  
LM555CM, LM555CN  
LM555CMM  
1180 mW  
613 mW  
See AN-450 “Surface Mounting Methods and Their Effect  
on Product Reliability” for other methods of soldering  
surface mount devices.  
Operating Temperature Ranges  
LM555C  
0˚C to +70˚C  
Storage Temperature Range  
−65˚C to +150˚C  
Electrical Characteristics (Notes 1, 2)  
(TA = 25˚C, VCC = +5V to +15V, unless othewise specified)  
Parameter  
Conditions  
Limits  
LM555C  
Typ  
Units  
Min  
Max  
Supply Voltage  
4.5  
16  
V
Supply Current  
VCC = 5V, RL  
=
3
6
VCC = 15V, RL  
=
10  
15  
mA  
(Low State) (Note 4)  
Timing Error, Monostable  
Initial Accuracy  
1
%
Drift with Temperature  
RA = 1k to 100k,  
50  
ppm/˚C  
C = 0.1µF, (Note 5)  
Accuracy over Temperature  
Drift with Supply  
1.5  
0.1  
%
%/V  
Timing Error, Astable  
Initial Accuracy  
2.25  
150  
%
Drift with Temperature  
RA, RB = 1k to 100k,  
ppm/˚C  
C = 0.1µF, (Note 5)  
Accuracy over Temperature  
Drift with Supply  
3.0  
0.30  
0.667  
5
%
%/V  
x VCC  
V
Threshold Voltage  
Trigger Voltage  
VCC = 15V  
VCC = 5V  
1.67  
0.5  
V
Trigger Current  
Reset Voltage  
0.9  
1
µA  
0.4  
0.5  
V
Reset Current  
0.1  
0.4  
0.25  
mA  
µA  
Threshold Current  
Control Voltage Level  
(Note 6)  
0.1  
VCC = 15V  
VCC = 5V  
9
2.6  
10  
3.33  
11  
4
V
Pin 7 Leakage Output High  
Pin 7 Sat (Note 7)  
Output Low  
1
100  
200  
nA  
VCC = 15V, I7 = 15mA  
VCC = 4.5V, I7 = 4.5mA  
180  
80  
mV  
mV  
Output Low  
3
www.national.com  
Electrical Characteristics (Notes 1, 2) (Continued)  
(TA = 25˚C, VCC = +5V to +15V, unless othewise specified)  
Parameter  
Conditions  
Limits  
LM555C  
Typ  
Units  
Min  
Max  
Output Voltage Drop (Low)  
VCC = 15V  
ISINK = 10mA  
0.1  
0.4  
2
0.25  
0.75  
2.5  
V
V
V
V
ISINK = 50mA  
ISINK = 100mA  
ISINK = 200mA  
VCC = 5V  
2.5  
ISINK = 8mA  
V
V
ISINK = 5mA  
0.25  
12.5  
13.3  
3.3  
0.35  
Output Voltage Drop (High)  
ISOURCE = 200mA, VCC = 15V  
ISOURCE = 100mA, VCC = 15V  
VCC = 5V  
V
12.75  
2.75  
V
V
Rise Time of Output  
Fall Time of Output  
100  
100  
ns  
ns  
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.  
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-  
tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-  
antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is  
given, however, the typical value is a good indication of device performance.  
Note 3: For operating at elevated temperatures the device must be derated above 25˚C based on a +150˚C maximum junction temperature and a thermal resistance  
of 106˚C/W (DIP), 170˚C/W (S0-8), and 204˚C/W (MSOP) junction to ambient.  
Note 4: Supply current when output high typically 1 mA less at V  
= 5V.  
CC  
Note 5: Tested at V  
= 5V and V  
= 15V.  
CC  
CC  
Note 6: This will determine the maximum value of R + R for 15V operation. The maximum total (R + R ) is 20M.  
A
B
A
B
Note 7: No protection against excessive pin 7 current is necessary providing the package dissipation rating will not be exceeded.  
Note 8: Refer to RETS555X drawing of military LM555H and LM555J versions for specifications.  
www.national.com  
4
Typical Performance Characteristics  
Minimuim Pulse Width  
Required for Triggering  
Supply Current vs.  
Supply Voltage  
DS007851-4  
DS007851-19  
DS007851-21  
DS007851-23  
High Output Voltage vs.  
Output Source Current  
Low Output Voltage vs.  
Output Sink Current  
DS007851-20  
Low Output Voltage vs.  
Output Sink Current  
Low Output Voltage vs.  
Output Sink Current  
DS007851-22  
5
www.national.com  
Typical Performance Characteristics (Continued)  
Output Propagation Delay vs.  
Voltage Level of Trigger Pulse  
Output Propagation Delay vs.  
Voltage Level of Trigger Pulse  
DS007851-24  
DS007851-25  
Discharge Transistor (Pin 7)  
Voltage vs. Sink Current  
Discharge Transistor (Pin 7)  
Voltage vs. Sink Current  
DS007851-26  
DS007851-27  
www.national.com  
6
Applications Information  
MONOSTABLE OPERATION  
NOTE: In monostable operation, the trigger should be driven  
high before the end of timing cycle.  
In this mode of operation, the timer functions as a one-shot  
(Figure 1). The external capacitor is initially held discharged  
by a transistor inside the timer. Upon application of a nega-  
tive trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is  
set which both releases the short circuit across the capacitor  
and drives the output high.  
DS007851-7  
FIGURE 3. Time Delay  
ASTABLE OPERATION  
If the circuit is connected as shown in Figure 4 (pins 2 and 6  
connected) it will trigger itself and free run as a multivibrator.  
The external capacitor charges through RA + RB and dis-  
charges through RB. Thus the duty cycle may be precisely  
set by the ratio of these two resistors.  
DS007851-5  
FIGURE 1. Monostable  
The voltage across the capacitor then increases exponen-  
tially for a period of t = 1.1 RA C, at the end of which time the  
voltage equals 2/3 VCC. The comparator then resets the  
flip-flop which in turn discharges the capacitor and drives the  
output to its low state. Figure 2 shows the waveforms gener-  
ated in this mode of operation. Since the charge and the  
threshold level of the comparator are both directly propor-  
tional to supply voltage, the timing internal is independent of  
supply.  
DS007851-8  
FIGURE 4. Astable  
DS007851-6  
In this mode of operation, the capacitor charges and dis-  
charges between 1/3 VCC and 2/3 VCC. As in the triggered  
mode, the charge and discharge times, and therefore the fre-  
quency are independent of the supply voltage.  
V
= 5V  
Top Trace: Input 5V/Div.  
CC  
TIME = 0.1 ms/DIV.  
= 9.1kΩ  
Middle Trace: Output 5V/Div.  
Bottom Trace: Capacitor Voltage 2V/Div.  
R
A
C = 0.01µF  
FIGURE 2. Monostable Waveforms  
During the timing cycle when the output is high, the further  
application of a trigger pulse will not effect the circuit so long  
as the trigger input is returned high at least 10µs before the  
end of the timing interval. However the circuit can be reset  
during this time by the application of a negative pulse to the  
reset terminal (pin 4). The output will then remain in the low  
state until a trigger pulse is again applied.  
When the reset function is not in use, it is recommended that  
it be connected to VCC to avoid any possibility of false trig-  
gering.  
Figure 3 is a nomograph for easy determination of R, C val-  
ues for various time delays.  
7
www.national.com  
Applications Information (Continued)  
Figure 5 shows the waveforms generated in this mode of  
operation.  
DS007851-11  
V
= 5V  
Top Trace: Input 4V/Div.  
TIME = 20µs/DIV. Middle Trace: Output 2V/Div.  
= 9.1kBottom Trace: Capacitor 2V/Div.  
CC  
R
A
C = 0.01µF  
DS007851-9  
FIGURE 7. Frequency Divider  
V
= 5V  
Top Trace: Output 5V/Div.  
CC  
TIME = 20µs/DIV.  
Bottom Trace: Capacitor Voltage 1V/Div.  
R
R
= 3.9kΩ  
= 3kΩ  
A
PULSE WIDTH MODULATOR  
B
C = 0.01µF  
When the timer is connected in the monostable mode and  
triggered with a continuous pulse train, the output pulse  
width can be modulated by a signal applied to pin 5. Figure  
8 shows the circuit, and in Figure 9 are some waveform  
examples.  
FIGURE 5. Astable Waveforms  
The charge time (output high) is given by:  
t1 = 0.693 (RA + RB) C  
And the discharge time (output low) by:  
t2 = 0.693 (RB) C  
Thus the total period is:  
T = t1 + t2 = 0.693 (RA +2RB) C  
The frequency of oscillation is:  
Figure 6 may be used for quick determination of these RC  
values.  
The duty cycle is:  
DS007851-12  
FIGURE 8. Pulse Width Modulator  
DS007851-13  
V
= 5V  
Top Trace: Modulation 1V/Div.  
TIME = 0.2 ms/DIV. Bottom Trace: Output Voltage 2V/Div.  
= 9.1kΩ  
CC  
DS007851-10  
FIGURE 6. Free Running Frequency  
R
A
C = 0.01µF  
FREQUENCY DIVIDER  
FIGURE 9. Pulse Width Modulator  
The monostable circuit of Figure 1 can be used as a fre-  
quency divider by adjusting the length of the timing cycle.  
Figure 7 shows the waveforms generated in a divide by three  
circuit.  
www.national.com  
8
Applications Information (Continued)  
PULSE POSITION MODULATOR  
This application uses the timer connected for astable opera-  
tion, as in Figure 10, with a modulating signal again applied  
to the control voltage terminal. The pulse position varies with  
the modulating signal, since the threshold voltage and hence  
the time delay is varied. Figure 11 shows the waveforms  
generated for a triangle wave modulation signal.  
DS007851-16  
FIGURE 12.  
Figure 13 shows waveforms generated by the linear ramp.  
The time interval is given by:  
DS007851-14  
VBE . 0.6V  
FIGURE 10. Pulse Position Modulator  
DS007851-17  
V
= 5V  
Top Trace: Input 3V/Div.  
CC  
TIME = 20µs/DIV. Middle Trace: Output 5V/Div.  
DS007851-15  
R
1
R
2
R
E
= 47kΩ  
= 100kΩ  
= 2.7 kΩ  
Bottom Trace: Capacitor Voltage 1V/Div.  
V
= 5V  
Top Trace: Modulation Input 1V/Div.  
Bottom Trace: Output 2V/Div.  
CC  
TIME = 0.1 ms/DIV.  
R
R
= 3.9kΩ  
= 3kΩ  
C = 0.01 µF  
A
B
FIGURE 13. Linear Ramp  
C = 0.01µF  
FIGURE 11. Pulse Position Modulator  
LINEAR RAMP  
When the pullup resistor, RA, in the monostable circuit is re-  
placed by a constant current source, a linear ramp is gener-  
ated. Figure 12 shows a circuit configuration that will perform  
this function.  
9
www.national.com  
Applications Information (Continued)  
50% DUTY CYCLE OSCILLATOR  
For a 50% duty cycle, the resistors RA and RB may be con-  
nected as in Figure 14. The time period for the output high is  
the same as previous, t1 = 0.693 RA C. For the output low it  
is t2  
=
Thus the frequency of oscillation is  
DS007851-18  
FIGURE 14. 50% Duty Cycle Oscillator  
Note that this circuit will not oscillate if RB is greater than 1/2  
RA because the junction of RA and RB cannot bring pin 2  
down to 1/3 VCC and trigger the lower comparator.  
ADDITIONAL INFORMATION  
Adequate power supply bypassing is necessary to protect  
associated circuitry. Minimum recommended is 0.1µF in par-  
allel with 1µF electrolytic.  
Lower comparator storage time can be as long as 10µs  
when pin 2 is driven fully to ground for triggering. This limits  
the monostable pulse width to 10µs minimum.  
Delay time reset to output is 0.47µs typical. Minimum reset  
pulse width must be 0.3µs, typical.  
Pin 7 current switches within 30ns of the output (pin 3) volt-  
age.  
www.national.com  
10  
Physical Dimensions inches (millimeters) unless otherwise noted  
Small Outline Package (M)  
NS Package Number M08A  
8-Lead (0.118” Wide) Molded Mini Small Outline Package  
NS Package Number MUA08A  
11  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
Molded Dual-In-Line Package (N)  
NS Package Number N08E  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  
National P/N LM555 - Timer  
Products > Analog - Other > General Purpose > Timers and Oscillators > LM555  
Product Folder  
Timer  
LM555  
LMC555 - CMOS version  
See Also:  
Generic P/N 555  
Contents  
General Description  
Features  
Applications  
Datasheet  
Package Availability, Models, Samples & Pricing  
Application Notes  
General Description  
The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional  
terminals are provided for triggering or resetting if desired. In the time delay mode of operation, the time  
is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the  
free running frequency and duty cycle are accurately controlled with two external resistors and one  
capacitor. The circuit may be triggered and reset on falling waveforms, and the output circuit can source  
or sink up to 200mA or drive TTL circuits.  
Features  
Direct replacement for SE555/NE555  
Timing from microseconds through hours  
Operates in both astable and monostable modes  
Adjustable duty cycle  
Output can source or sink 200 mA  
Output and supply TTL compatible  
Temperature stability better than 0.005% per °C  
Normally on and normally off output  
Available in 8-pin MSOP package  
file:///d|/chechi/LM555.html (1 of 4) [10/11/2001 2:33:19 PM]  
National P/N LM555 - Timer  
Applications  
Precision timing  
Pulse generation  
Sequential timing  
Time delay generation  
Pulse width modulation  
Pulse position modulation  
Linear ramp generator  
Datasheet  
Size  
(in Kbytes)  
Title  
Date  
Receive via Email  
Download  
View Online  
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View Online Download Receive via Email  
View Online Download Receive via Email  
LM555 Timer  
401 Kbytes 23-Aug-00  
91 Kbytes  
LM555 Mil-Aero Datasheet MNLM555-X  
LM555 Mil-Aero (JAN) Datasheet MJLM555-X 208 Kbytes  
Please use Adobe Acrobat to view PDF file(s).  
If you have trouble printing, see Printing Problems.  
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AB-7: Multivibrator/Timer CAD  
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AN-270: Software Design for a 38.4 kbaud Data Terminal  
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AN-694: Application Note 694 A DMOS 3A, 55V, H-Bridge: 359  
The LMD18200  
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Application Note 694 A DMOS 3A, 55V, H-Bridge: The  
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NSC

JM38510/11001BCA

军用级、四路、36V、1MHz 运算放大器 | J | 14 | -55 to 125
TI

JM38510/11001BDA

Quad 741 Op Amps
NSC

JM38510/11001BZ

QUAD OP-AMP, 6000uV OFFSET-MAX, 1MHz BAND WIDTH, CDSO14, CERAMIC, SOIC-14
TI

JM38510/11001BZA

Quad 741 Op Amps
NSC

JM38510/11001SCA

Quad 741 Op Amps
NSC

JM38510/11001SCA

航天级、四路、44V、1MHz 运算放大器 | J | 14 | -55 to 125
TI

JM38510/11001SDA

Quad 741 Op Amps
NSC

JM38510/11004BCA

IC QUAD OP-AMP, 5000 uV OFFSET-MAX, CDIP14, 0.250 X 0.750 INCH, HERMETIC SEALED, CERAMIC, DIP-14, Operational Amplifier
ADI

JM38510/11005BCA

QUADRUPLE OPERATIONAL AMPLIFIERS
TI