LM34930 [NSC]
Ultra Small 33V, 1A Constant On-Time Buck Switching Regulator with Intelligent Current Limit; 超小型33V ， 1A的恒定导通时间降压型开关稳压器与智能电流限制
| 型号： | LM34930 |
| 厂家： | 
National Semiconductor |
| 描述： | Ultra Small 33V, 1A Constant On-Time Buck Switching Regulator with Intelligent Current Limit |
| 文件： | 总18页 (文件大小：370K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
June 23, 2008
LM34930
Ultra Small 33V, 1A Constant On-Time Buck Switching
Regulator with Intelligent Current Limit
General Description
Features
The LM34930 constant On-Time Step Down Switching Reg-
ulator features all the functions needed to implement a low
cost, efficient, buck bias regulator capable of supplying in ex-
cess of 1A load current. This high voltage regulator contains
an N-Channel Buck Switch, and is available in a µSMD
bumped package. The constant on-time regulation principle
requires no loop compensation, results in fast load transient
response, and simplifies circuit implementation. The operat-
ing frequency remains constant with line and load. The valley
current limit results in a smooth transition from constant volt-
age to constant current mode when current limit is detected
without the use of current limit foldback. To reduce the pos-
sibility of saturating the inductor the valley current limit thresh-
old reduces as the input voltage increases, and the on-time
is reduced when current limit is detected. Additional features
include: Over-voltage indicator, Input over-voltage shutdown,
Vcc under-voltage lock-out, thermal shutdown, and maximum
duty cycle limiting.
Operating Input Voltage Range: 8V to 33V
■
■
■
■
■
■
■
Input over-voltage shutdown at 36V
Input absolute maximum rating of 44V
Integrated 1A N-Channel buck switch
Adjustable output voltage from 2.5V
Switching frequency adjustable to 2 MHz
Switching frequency remains nearly constant with load
current and input voltage
Ultra-fast transient response
■
■
■
■
■
■
■
No loop compensation required
Adjustable soft-start timing
Thermal shutdown
Precision 2% feedback reference
Input Over-Voltage indicator at 19V
Current limit scheme helps prevent inductor from
saturation in load fault conditions
Package
Micro SMD –12, 1.77 mm x 2.1 mm
■
Typical Application, Basic Step-Down Regulator
30060801
© 2008 National Semiconductor Corporation
300608
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Connection Diagrams
30060803
30060802
Top View
Bump Side
Ordering Information
Order Number
LM34930TL
Package Type
Micro SMD12
Micro SMD12
NSC Package Drawing
TLA12LDA
Supplied As
250 Units on Tape and Reel
3000 Units on Tape and Reel
LM34930TLX
TLA12LDA
Pin Descriptions
Pin No.
A1
Name
GND
nOV
Description
Application Information
Ground
Ground for all internal circuitry
A2
Input over-voltage indicator
Open drain output switches low when Vin exceeds the over-
voltage indicator threshold
A3
B1
FB
ISEN
RT
Output voltage feedback
Current sense
Internally connected to the regulation comparator. The
regulation level is 2.52V.
The re-circulating current flows out of this pin to the free-
wheeling diode.
B2
On-time control
Soft-Start
An external resistor from VIN to this pin sets the buck switch
on-time, and the switching frequency.
B3
SS
An internal current source charges an external capacitor to
provide the soft-start function.
C1, C2
VIN
Input supply voltage
Operating input range is 8V to 33V, with over-voltage
shutdown internally set at 36V. Absolute maximum transient
capability is 44V.
C3
VCC
SW
Output of the internal bias regulator
Switching node
Nominally regulated at 7V.
D1, D2
Internally connected to the buck switch source. Connect to the
external inductor, free wheeling diode, and bootstrap
capacitor.
D3
BST
Bootstrap capacitor connection of the
buckswitch gate driver
Connect a 0.022 µF capacitor from SW to this pin. The
capacitor is charged during the buck switch off-time via an
internal diode.
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Current out of ISEN
ESD Rating (Note 2)
Human Body Model
Storage Temperature Range
JunctionTemperature
(See text)
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
2kV
-65°C to +150°C
150°C
VIN to GND
44V
BST to GND
SW to GND (Steady State)
BST to SW
52V
-1.5V to 44V
14V
Operating Ratings (Note 1)
VIN Voltage
8V to 33V
−40°C to + 125°C
Junction Temperature
VCC to GND
All Other Inputs to GND
-0.3V to 8V
-0.3 to 7V
Electrical Characteristics Specifications with standard type are for TJ = 25°C only; limits in boldface type apply
over the Operating Junction Temperature (TJ) range of −40°C to + 125°C. Minimum and Maximum limits are guaranteed through
test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for
reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12V, RT = 50 kΩ.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Start-Up Regulator, VCC (Note 3)
VCCReg
VCC regulated voltage
6.6
7.0
1.3
7.4
V
V
VIN - VCC dropout voltage
ICC = 0 mA,
VCC = UVLOVCC + 250 mV
VIN = 8V
VCC output impedance
VCC current limit
155
15
Ω
mA
V
VCC = 0V
UVLOVCC VCC under-voltage lockout threshold VCC increasing
5.25
150
2
UVLOVCC hysteresis
UVLOVCC filter delay
IIN operating current
VCC decreasing
mV
µs
100 mV overdrive
Non-switching, FB = 3V
IQ
0.8
1.5
mA
Switch Characteristics
Rds(on)
Buck Switch Rds(on)
ITEST = 200 mA
0.33
3.7
0.7
4.5
Ω
V
UVLOGD Gate Drive UVLO
UVLOGD hysteresis
Softstart Pin
2.7
300
mV
VSS
ISS
Pull-up voltage
SS open
2.52
10
V
Internal current source
Shutdown Threshold
µA
mV
VSS-SH
Current Limit
ILIM
70
Threshold
VIN = 8V
0.95
0.90
1.15
1.1
98
1.35
1.30
A
VIN = 30V
Resistance from ISEN to SGND
mΩ
Over-Voltage Indicator
nOVTH
nOVHYS
nOVVOL
nOVLKG
On Timer
tON - 1
Threshold voltage at VIN
VIN increasing
17.5
19
1.95
100
0.1
20.0
200
V
V
Threshold hysteresis
Output low voltage
Off state leakage
InoV = 1 mA, VIN = 22V
VnoV = 7V
mV
µA
On-time
190
292
127
150
430
ns
ns
ns
VIN = 10V, RT = 50 kΩ
VIN = 33V, RT = 50 kΩ
VIN = 10V, RT = 50 kΩ
tON - 2
tON - 3
On-time
On-time (current limit)
Off Timer
tOFF
Minimum Off-time
90
ns
3
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Symbol
Parameter
Conditions
SS Pin = steady state
Min
Typ
Max
Units
Regulation Comparator (FB Pin)
VREF
FB regulation threshold
FB bias current
2.470
2.52
1
2.575
V
nA
Input Over-voltage Shutdown
VIN(OV)
Threshold voltage at VIN
VIN increasing
34.0
36
38.3
V
V
VIN(OV)-HYS Hysteresis
Thermal Shutdown
0.4
TSD
Thermal shutdown
Thermal shutdown hysteresis
Thermal Resistance
Junction to Ambient
0 LFPM Air Flow
TJ increasing
155
20
°C
°C
JEDEC 4 layer board (Note 4)
65
°C/W
θJA
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 3: VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
Note 4: JEDEC test board description can be found in JESD 51-7.
Note 5: For detailed information on soldering micro SMD packages, refer to the Application Note AN-1112.
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Typical Performance Characteristics
Efficiency at 1.5 MHz
Efficiency at 2 MHz
30060836
30060843
VCC vs VIN
VCC vs ICC
30060805
30060804
ON-TIME vs VIN and RT
Voltage at the RT Pin
30060806
30060807
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Shutdown Current into VIN
Operating Current into VIN
30060808
30060839
Current Limit Valley Threshold vs VIN
nOV Low Voltage vs Sink Current
30060810
30060809
Reference Voltage vs Temperature
Current Limit Threshold vs Temperature
30060841
30060840
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VCC Voltage vs Temperature
On-Time vs Temperature
30060842
30060844
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Typical Application Circuit and Block Diagram
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30060812
FIGURE 1. Start Up Sequence
Functional Description
Control Circuit Overview
The LM34930 Constant On-Time Step Down Switching Reg-
ulator features all the functions needed to implement a low
cost, efficient buck bias power converter capable of supplying
at least 1.0A to the load. This high voltage regulator contains
an N-Channel buck switch, is easy to implement, and is avail-
able in a 12 bump µSMD package. The regulator’s operation
is based on a constant on-time control principle where the on-
time is inversely proportional to the input voltage. This feature
results in the operating frequency remaining relatively con-
stant with load and input voltage variations. The constant on-
time feedback control principle requires no loop compensa-
tion resulting in very fast load transient response. The valley
current limit detection results in a smooth transition from con-
stant voltage to constant current when current limit is reached.
To aid in controlling excessive switch current due to a possible
saturating inductor the valley current limit threshold reduces
as the input voltage increases, and the on-time is reduced by
≊50% when current limit is detected.
The LM34930 buck regulator employs a control principle
based on a comparator and a one-shot on-timer, with the out-
put voltage feedback (FB) compared to an internal reference
(2.52V). If the FB voltage is below the reference the buck
switch is switched on for the one-shot timer period which is a
function of the input voltage and the programming resistor
(RT). Following the on-time the switch remains off until the FB
voltage falls below the reference, but never less than the min-
imum off-time forced by the off-time one-shot timer. When the
FB pin voltage falls below the reference and the off-time one-
shot period expires, the buckswitch is then turned on for
another on-time one-shot period.
When in regulation, the LM34930 operates in continuous con-
duction mode at heavy load currents and discontinuous con-
duction mode at light load currents. In continuous conduction
mode the inductor’s current is always greater than zero, and
the operating frequency remains relatively constant with load
and line variations. The minimum load current for continuous
conduction mode is one-half the inductor’s ripple current am-
plitude. The approximate operating frequency is calculated as
follows:
The LM34930 can be applied in numerous applications to ef-
ficiently step down higher voltages in non-isolated applica-
tions. Additional features include: Thermal shutdown, VCC
under-voltage lock-out, gate driver under-voltage lock-out,
maximum duty cycle limiting, input over-voltage shutdown,
and input over-voltage indicator.
(1)
9
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The buck switch duty cycle is approximately equal to:
The maximum continuous current into the RT pin must be less
than 2 mA. For high frequency applications, the maximum
switching frequency is limited at the maximum input voltage
by the minimum on-time one-shot period. At minimum input
voltage the maximum switching frequency is limited by the
minimum off-time one-shot period, which may prevent
achievement of the proper duty cycle.
(2)
In discontinuous conduction mode, the inductor’s current
reaches zero during the off-time because of the longer-than-
normal off-time. The operating frequency is lower than in
continuous conduction mode, and varies with load current.
Conversion efficiency is maintained at light loads since the
switching losses are reduced with the reduction in load and
frequency. The approximate discontinuous operating fre-
quency can be calculated as follows:
Current Limit
Current limit detection occurs during the off-time by monitor-
ing the recirculating diode current flowing out of the ISEN pin.
Referring to the Block Diagram, during the off-time the induc-
tor current flows through the load, into the GND pin, through
the internal sense resistor, out of ISEN and through D1 to the
inductor. If that current exceeds the current limit threshold the
current limit comparator delays the start of the next on-time
period. The next on-time starts when the current out of ISEN
reduces to the threshold and the voltage at FB is below 2.52V.
The operating frequency is typically lower in the current lim-
ited condition due to longer-than-normal off-times.
(3)
where RL = the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors (R1,
R2 in the Block Diagram). The regulated output voltage is
calculated as follows:
The valley current limit threshold is a function of the input
voltage (VIN) as shown in the graph “Current Limit Valley
Threshold vs. VIN”. This feature reduces the inductor current’s
peak value at high line and load. To further reduce the
inductor’s peak current, the next on-time after current limit
detection is reduced by ≊50% if the voltage at the FB com-
parator is below its threshold when the inductor current falls
below the current limit threshold (VOUT is low due to current
limiting).
VOUT = 2.52 x (R1 + R2) / R2
Output voltage regulation requires a minimum of 25 mVp-p
ripple voltage be supplied to the feedback pin (FB). In the
typical application circuit shown with the Block Diagram, rip-
ple is generated by the inductor’s ripple current passing
through R3 in series with the output capacitor. The output rip-
ple is passed to the FB pin by C6, avoiding attenuation by
resistors R1 and R2.
Figure 2 illustrates the inductor current waveform during nor-
mal operation and in current limit. During the first “Normal
Operation” interval the load current is IO1, the average of the
inductor current waveform. As the load resistance is reduced,
the inductor current increases until the lower peak of the in-
ductor ripple current exceeds the current limit threshold. Dur-
ing the “Current Limited” portion of Figure 2, each on-time is
reduced by ≊50%, resulting in lower ripple amplitude for the
inductor’s current. During this time the LM34930 is in a con-
stant current mode with an average load current equal to the
current limit threshold plus half the ripple current (IOCL), and
the output voltage is below the normal regulated value. Nor-
mal operation resumes when the load current is reduced to
IO2, allowing VOUT and the on-time to return to their normal
values. Note that in the second period of “Normal Operation”,
even though the inductor’s peak current exceeds the current
limit threshold during part of each cycle, the circuit is not in
current limit since the inductor current falls below the current
limit threshold during each off time.
On-Time Timer
The on-time for the LM34930 is determined by the RT resistor
and the input voltage (VIN), calculated from:
(4)
The inverse relationship with VIN results in a nearly constant
frequency as VIN is varied. To set a specific continuous con-
duction mode switching frequency (FS), the RT resistor is
determined from the following:
(5)
The on-time must be chosen greater than 90 ns for proper
operation. Equations 1, 4 and 5 are valid only when the reg-
ulator is not in current limit. When the LM34930 operates in
current limit, the on-time is reduced by ≊50%. This feature
reduces the peak inductor current which may be excessively
high if the load current and the input voltage are simultane-
ously high. This feature operates on a cycle-by-cycle basis
until the load current is reduced and the output voltage re-
sumes its normal regulated value.
The peak current allowed through the buck switch, and the
ISEN pin, is 2A, and the maximum allowed average current
is 1.5A.
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30060818
FIGURE 2. Inductor Current - Normal and Current Limit Operation
circuit works in conjunction with an external bootstrap capac-
itor and an internal high voltage diode. A 0.022 µF capacitor
(C4) connected between BST and SW provides the voltage
to the driver during the on-time. During each off-time, the SW
pin is at approximately -1V, and C4 is recharged from VCC
through the internal diode. The minimum off-time ensures a
sufficient time each cycle to recharge the bootstrap capacitor.
Startup Regulator, VCC
The startup bias regulator is integral to the LM34930. The in-
put pin (VIN) can be connected directly to the main power
source, and has transient capability to 44V. The VCC output
is regulated at 7.0V, and is current limited to approximately
15 mA. Upon power up, the regulator sources current into the
external capacitor at VCC. When the voltage on the VCC pin
reaches the under-voltage lock-out (UVLO) threshold, the
buck switch is enabled and the Soft-start pin is released to
allow the Soft-start capacitor to charge. The minimum input
voltage is determined by the regulator’s dropout voltage, the
VCC UVLO falling threshold, and the switching frequency.
When VCC falls below the falling threshold the VCC UVLO
activates to shut off the buck switch.
Soft-Start, Remote Shutdown
The soft-start feature allows the converter to gradually reach
a steady state operating point, thereby reducing start-up
stresses and current surges. Upon turn-on, when VCC reach-
es its under-voltage threshold, an internal 10 µA current
source charges the external capacitor at the SS pin to 2.52V
(t2 in Figure 1). The ramping voltage at SS ramps the non-
inverting input of the regulation comparator, and the output
voltage, in a controlled manner.
Over-Voltage Indicator
The nOV pin, an open drain logic output, switches low when
the voltage at VIN exceeds 19V. The over-voltage indicator
comparator provides 1.95V hysteresis to reject noise and rip-
ple on the VIN pin. A pull-up resistor is required at the nOV
output pin to a voltage that does not exceed 7 volts. The pull-
up voltage can exceed the voltage at VIN. When nOV is low,
the current into the pin must not exceed 10 mA.
An internal switch grounds the SS pin if VCC is below its under-
voltage lockout threshold, or if the input voltage at VIN is
above the Over-Voltage Shutdown threshold. The SS pin can
be used to shutdown the LM34930 by grounding the pin as
shown in Figure 3. Releasing the pin allows normal operation
to resume.
Input Over-Voltage Shutdown
If the input voltage at VIN increases above 36V an internal
comparator disables the buck switch, and grounds the soft-
start pin. The over-voltage shutdown comparator provides
400 mV hysteresis to reject noise and ripple on the VIN pin.
Normal operation resumes when the voltage at VIN is re-
duced below the lower threshold.
30060819
FIGURE 3. Shutdown Implementation
N - Channel Buck Switch and Driver
The LM34930 integrates an N-Channel buck switch and as-
sociated floating high voltage gate driver. The gate driver
11
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L1: The main parameter controlled by the inductor is the in-
ductor current ripple amplitude (IOR). The minimum load cur-
rent is used to determine the maximum allowable ripple in
order to maintain continuous conduction mode (the lower
peak does not reach 0 mA). This is not a requirement of the
LM34930, but serves as a guideline for selecting L1. For this
example, the maximum ripple current should be less than:
Thermal Shutdown
The LM34930 should be operated such that the junction tem-
perature does not exceed 125°C. If the junction temperature
increases above that, an internal Thermal Shutdown circuit
activates typically at 155°C. In thermal shutdown the con-
troller enters a low power non-switching state by disabling the
buck switch. This feature helps prevent catastrophic failures
from accidental device overheating. When the junction tem-
perature reduces below 135°C (typical hysteresis = 20°C)
normal operation resumes.
IOR(MAX) = 2 x IOUT(min) = 400 mAp-p
(6)
For applications where the minimum load current is zero, a
good starting point for allowable ripple is 20% of the maximum
load current. In this case substitute 20% of IOUT(max) for IOUT
(min) in equation 6. The ripple amplitude calculated in Equation
6 is then used in the following equation:
Applications Information
EXTERNAL COMPONENTS
The procedure for calculating the external components is il-
lustrated with the following design example. Referring to the
Block Diagram, the circuit is to be configured for the following
specifications:
(7)
A standard value 10 µH inductor is chosen. The maximum
ripple amplitude, which occurs at maximum VIN, calculates to
379 mAp-p, and the peak current is 1190 mA at maximum
load current. Ensure the selected inductor is rated for this
peak current.
- VOUT = 5V
- VIN = 8V to 30V
- Minimum load current for continuous conduction mode (IOUT
(min)) = 200 mA
C2, R3 and C6: C2 should typically be no smaller than 3.3
µF, although that is dependent on the frequency and the de-
sired output characteristics. C2 should be a low ESR good
quality ceramic capacitor. Experimentation is usually neces-
sary to determine the minimum value for C2, as the nature of
the load may require a larger value. A load which creates sig-
nificant transients requires a larger value for C2 than a non-
varying load. Ripple voltage is created at VOUT as the
inductor’s ripple current passes through R3 into C2. That rip-
ple voltage is AC coupled directly to the FB pin by C6 without
the attenuation of R1 and R2, allowing the minimum ripple at
VOUT to be set at 25 mVp-p. The minimum inductor ripple cur-
rent occurs at minimum VIN, and is calculated by re-arranging
equation 7 to the following:
- Maximum load current (IOUT(max)) = 1000 mA
- Switching Frequency (FS) = 1.5 MHz
- Soft-start time = 5 ms
R1 and R2: These resistors set the output voltage. The ratio
of the feedback resistors is calculated from:
R1/R2 = (VOUT/2.52V) - 1
For this example, R1/R2 = 0.98. R1 and R2 should be chosen
from standard value resistors in the range of 1.0 kΩ – 10 kΩ
which satisfy the above ratio. For this example, 2.32 kΩ is
chosen for R1 and 2.37 kΩ is chosen for R2.
RT: This resistor sets the on-time, and (by default) the switch-
ing frequency. First check that the desired frequency does not
require an on-time or off-time shorter than the minimum al-
lowed (90 ns each). The minimum on-time occurs at the
maximum VIN:
(8)
The minimum value for R3 is then equal to 25 mV/125 mA =
0.2Ω. The next larger standard value resistor should be used
for R3 to allow for tolerances. The minimum value for C6 is
equal to:
The minimum off-time occurs at the minimum VIN. For this
example
(9)
The next larger standard value capacitor should be used for
C6.
C1 and C7: The purpose of C1 is to supply most of the switch
current during the on-time, and limit the voltage ripple at VIN,
since it is assumed the voltage source feeding VIN has some
amount of source impedance. At maximum load current,
when the buck switch turns on, the current into VIN suddenly
increases to the lower peak of the inductor’s ripple current,
then ramps up to the upper peak, then drops to zero at turn-
off. The average current during the on-time is the average
load current. For a worst case calculation, C1 must supply this
average load current during the maximum on-time, without
letting the voltage at the VIN pin drop below a minimum op-
erating level of 7.5V. The minimum value for C1 is calculated
from:
This off-time is acceptable since it is significantly greater than
the 90 ns minimum off-time. The RT resistor is calculated from
equation 5 using the minimum input voltage:
A standard value 60.4 kΩ resistor is selected, resulting in a
nominal frequency of 1.50 MHz. The minimum on-time cal-
culates to 152 ns at Vin = 30V, which is acceptably longer
than the minimum allowed 90 ns. The maximum on-time cal-
culates to 416 ns at Vin = 8V.
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D1: A Schottky diode is recommended. Ultra-fast recovery
diodes are not recommended as the high speed transitions at
the SW pin may affect the regulator’s operation due to the
diode’s reverse recovery transients. The diode must be rated
for the maximum input voltage, the maximum load current,
and the peak current which occurs when the current limit and
maximum ripple current are reached simultaneously. The
diode’s average power dissipation is calculated from:
where tON is the maximum on-time, and ΔV is the allowable
ripple voltage at VIN (0.5V at VIN = 8V). The purpose of C7 is
to minimize transients and ringing due to long lead inductance
leading to the VIN pin. A low ESR 0.1 µF ceramic chip ca-
pacitor is recommended, and C7 must be located close to the
VIN and GND pins.
PD1 = VF x IOUT x (1-D)
where VF is the diode’s forward voltage drop, and D is the on-
time duty cycle.
C3: The capacitor at the VCC pin provides noise filtering and
stability for the VCC regulator. C3 should be no smaller than
0.1 µF, and should be a good quality, low ESR ceramic ca-
pacitor. The value of C3, and the VCC current limit, determine
a portion of the turn-on-time (t1 in Figure 1).
FINAL CIRCUIT
The final circuit is shown in Figure 4, and its performance is
shown in Figure 5 and Figure 6. The current limit measured
approximately 1.28A at Vin = 8V, and 1.18A at Vin = 30V. The
output voltage ripple amplitude measured 32 mVp-p at Vin =
8V, and 87 mVp-p at Vin = 30V.
C4: The recommended value for C4 is 0.022 µF. A high quality
ceramic capacitor with low ESR is recommended as C4 sup-
plies a surge current to charge the buck switch gate at each
turn-on. A low ESR also helps ensure a complete recharge
during each off-time.
C5: The capacitor at the SS pin determines the soft-start time,
i.e. the time for the output voltage to reach its final value (t2
in Figure 1). For soft-start time of 5 ms, the capacitor value is
determined from the following:
30060828
FIGURE 4. Example Circuit
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30060836
FIGURE 5. Efficiency vs. Load Current and VIN (Circuit of Figure 4)
30060837
FIGURE 6. Frequency vs. VIN (Circuit of Figure 4)
ALTERNATE OUTPUT RIPPLE CONFIGURATIONS
For applications which require lower levels of ripple at VOUT
Calculate the product
,
or for those which can accept higher levels of ripple while us-
ing one less capacitor, the following two alternatives are
available.
a) Minimum ripple configuration: If the application requires
a lower value of ripple at VOUT (<25 mVp-p), the circuit of Fig-
ure 7 can be used. R3 is removed, and the resulting output
ripple voltage is determined by the inductor’s ripple current
and the characteristics of C2 (value and ESR). RA and CA
are chosen to generate a sawtooth waveform at their junction,
and that voltage is AC-coupled to the FB pin via CB. To de-
termine the values for RA, CA and CB, use the following
procedure:
where tON is the maximum on-time (at minimum input volt-
age), and ΔV is the desired ripple amplitude at the RA/CA
junction (typically 40-50 mV). RA and CA are then chosen
from standard value components to satisfy the above product.
Typically CA is 3000 pF to 10,000 pF, and RA is 10 kΩ to 300
kΩ. CB is then chosen to be large in comparison to CA, typi-
cally 0.1 µF. The values of R1 and R2 should each be towards
the upper end of the 1 kΩ to 10 kΩ range.
- Calculate the voltage
VA = VOUT - (VSW x (1 - (VOUT/VIN(min))))
where VSW is the absolute value of the voltage at the SW pin
during the off-time (typically 0.6V to 1V). VA is the DC voltage
at the RA/CA junction, and is used in the next equation.
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14
30060835
30060832
FIGURE 9. Alternate Minimum Output Ripple
Configuration
FIGURE 7. Minimum Output Ripple Using Ripple Injection
b) Slightly higher ripple – In the basic configuration in Figure
8 C6 is removed and R3 is increased since the ripple ampli-
tude from VOUT to FB is attenuated by R1 and R2. The ripple
at VOUT is created by the inductor’s ripple current passing
through R3, and coupled to the FB pin through the feedback
resistors (R1, R2). Since the LM34930 requires a minimum of
25 mVp-p ripple at the FB pin, the ripple required at VOUT is
25 mV divided by the attenuation of the feedback resistors.
The minimum ripple current (IOR(min)) is calculated by re-ar-
ranging Equation 7 using tON(max) and VIN(min). The minimum
value for R3 is calculated from:
Minimum Load Current
The LM34930 requires a minimum load current of 1 mA. If the
load current falls below that level, the bootstrap capacitor (C4)
may discharge during the long off-time, and the circuit will ei-
ther shutdown, or cycle on and off at a low frequency. If the
load current is expected to drop below 1 mA in the application,
R1 and R2 should be chosen with low enough values that they
provide additional loading to maintain the minimum load re-
quirement.
PC BOARD LAYOUT
Refer to application note AN-1112 for PC board guidelines for
the Micro SMD package.
The LM34930 regulation, over-voltage, and current limit com-
parators are very fast, and respond to short duration noise
pulses. Layout considerations are therefore critical for opti-
mum performance. The layout must be as neat and compact
as possible, and all of the components must be as close as
possible to their associated pins. The two major current loops
conduct currents which switch very fast, and therefore those
loops should be as small as possible to minimize conducted
and radiated EMI. The first loop is formed by C1, through the
VIN to SW pins, L1, C2, and back to C1.The second current
loop is formed by D1, L1, C2 and the GND and ISEN pins.
The ground connection from the LM34930’s GND pin to C1
should be as short and direct as possible.
The next larger standard value resistor should be used for R3.
The power dissipation within the LM34930 can be approxi-
mated by determining the total conversion loss (PIN - POUT),
and then subtracting the power losses in the free-wheeling
diode and the inductor. The power loss in the diode is ap-
proximately:
30060833
FIGURE 8. Basic Ripple Configuration
c) Alternate minimum ripple configuration: The low ripple
alternative circuit in Figure 9 is the same as that in Figure 8,
except the output voltage is taken from the junction of R3 and
C2. The ripple at VOUT no longer includes the ripple across
R3. It is determined by the inductor’s ripple current and the
characteristics of C2. However, R3 slightly degrades the load
regulation by effectively increasing the output resistance of
the regulator. This circuit may be suitable if the load current
is fairly constant. R3 is calculated as described in Alternate b
above, and must be rated to carry the maximum load current.
PD1 = Iout x VF x (1-D)
where Iout is the load current, VF is the diode’s forward volt-
age drop, and D is the on-time duty cycle. The power loss in
the inductor is approximately:
PL1 = Iout2 x RLDC x 1.1
where RLDC is the inductor’s DC resistance, and the 1.1 factor
is an approximation for the AC losses. If it is expected that the
internal dissipation of the LM34930 will produce excessive
junction temperatures during normal operation, good use of
the PC board’s ground plane can help to dissipate heat. Ad-
ditionally the use of wide PC board traces, where possible,
can help conduct heat away from the IC pins. Judicious po-
sitioning of the PC board within the end product, along with
the use of any available air flow (forced or natural convection)
can help reduce the junction temperature.
15
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Physical Dimensions inches (millimeters) unless otherwise noted
Note: X1 = 1.768 mm, ±0.030 mm
X2 = 2.073 mm, ±0.030 mm
X3 = 0.60 mm, ±0.075 mm
12 Bump micro SMD Package
NS Package Number TLA12LDA
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16
Notes
17
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