LM3940WG3.3-SCD [NSC]

3.3V FIXED POSITIVE LDO REGULATOR, 1V DROPOUT, CDSO16, CERAMIC, SOIC-16;
LM3940WG3.3-SCD
型号: LM3940WG3.3-SCD
厂家: National Semiconductor    National Semiconductor
描述:

3.3V FIXED POSITIVE LDO REGULATOR, 1V DROPOUT, CDSO16, CERAMIC, SOIC-16

CD
文件: 总12页 (文件大小:399K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
National Semiconductor is now part of  
Texas Instruments.  
Search http://www.ti.com/ for the latest technical  
information and details on our current products and services.  
January 2003  
LM3940  
1A Low Dropout Regulator for 5V to 3.3V Conversion  
General Description  
The LM3940 is a 1A low dropout regulator designed to  
provide 3.3V from a 5V supply.  
Features  
n Output voltage specified over temperature  
n Excellent load regulation  
n Guaranteed 1A output current  
n Requires only one external component  
n Built-in protection against excess temperature  
n Short circuit protected  
The LM3940 is ideally suited for systems which contain both  
5V and 3.3V logic, with prime power provided from a 5V bus.  
Because the LM3940 is a true low dropout regulator, it can  
hold its 3.3V output in regulation with input voltages as low  
as 4.5V.  
The T0-220 package of the LM3940 means that in most  
applications the full 1A of load current can be delivered  
without using an additional heatsink.  
Applications  
n Laptop/Desktop Computers  
n Logic Systems  
The surface mount TO-263 package uses minimum board  
space, and gives excellent power dissipation capability when  
soldered to a copper plane on the PC board.  
Typical Application  
01208001  
*
Required if regulator is located more than 1" from the power supply filter capacitor or if battery power is used.  
**  
See Application Hints.  
Connection Diagram/Ordering Information  
01208010  
01208002  
3-Lead TO-220 Package  
(Front View)  
3-Lead SOT-223  
(Front View)  
Order Part Number LM3940IMP-3.3  
Package Marked L52B  
Order Part Number LM3940IT-3.3  
NSC Drawing Number TO3B  
NSC Drawing Number MP04A  
01208003  
3-Lead TO-263 Package  
(Front View)  
Order Part Number LM3940IS-3.3  
NSC Drawing Number TS3B  
© 2003 National Semiconductor Corporation  
DS012080  
www.national.com  
Connection Diagram/Ordering  
Information (Continued)  
8-Lead LLP  
01208030  
Pin 2 and pin 7 are fused to center DAP  
Pin 5 and 6 need to be tied together on PCB board  
01208027  
16-Lead Ceramic Dual-in-Line Package  
(Top View)  
Order Part Number LM3940J-3.3-QML  
5962-9688401QEA  
(Top View)  
Order Part Number LM3940LD-3.3  
NSC Drawing Number LDC08A  
NSC Drawing Number J16A  
01208028  
16-Lead Ceramic Surface-Mount Package  
(Top View)  
Order Part Number LM3940WG-3.3-QML  
5962-9688401QXA  
NSC Drawing Number WG16A  
www.national.com  
2
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Lead Temperature (Soldering, 5 seconds)  
Power Dissipation (Note 2)  
Input Supply Voltage  
260˚C  
Internally Limited  
7.5V  
ESD Rating (Note 3)  
2 kV  
Storage Temperature Range  
−65˚C to +150˚C  
Operating Junction Temperature Range −40˚C to +125˚C  
Electrical Characteristics  
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Un-  
less otherwise specified: VIN = 5V, IL = 1A, COUT = 33 µF.  
Symbol  
Parameter  
Output Voltage  
Conditions  
5 mA IL 1A  
Typical  
LM3940 (Note 4)  
Units  
V
min  
3.20  
3.13  
max  
3.40  
3.47  
40  
VO  
3.3  
Line Regulation  
Load Regulation  
Output Impedance  
IL = 5 mA  
mV  
20  
35  
4.5V VO 5.5V  
50 mA IL 1A  
50  
80  
ZO  
IL (DC) = 100 mA  
IL (AC) = 20 mA (rms)  
f = 120 Hz  
35  
10  
mΩ  
IQ  
Quiescent Current  
4.5V VIN 5.5V  
IL = 5 mA  
15  
20  
mA  
VIN = 5V  
110  
150  
0.5  
110  
1.7  
200  
250  
IL = 1A  
en  
Output Noise Voltage  
BW = 10 Hz–100 kHz  
IL = 5 mA  
µV (rms)  
VO − VIN  
Dropout Voltage  
(Note 5)  
IL = 1A  
0.8  
1.0  
V
mV  
A
IL = 100 mA  
RL = 0  
150  
200  
IL(SC)  
Short Circuit Current  
1.2  
Thermal Performance  
Thermal Resistance  
3-Lead TO-220  
4
˚C/W  
Junction-to-Case  
3-Lead TO-263  
4
˚C/W  
˚C/W  
˚C/W  
˚C/W  
Thermal Resistance  
Junction-to-Ambient  
3-Lead TO-220  
60  
80  
35  
3-Lead TO-263  
8-Lead LLP (Note 2)  
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the  
device outside of its rated operating conditions.  
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, T , the junction-to-ambient thermal resistance, θ , and the  
J
JA  
ambient temperature, T . Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.  
A
The value of θ (for devices in still air with no heatsink) is 60˚C/W for the TO-220 package, 80˚C/W for the TO-263 package, and 174˚C/W for the SOT-223 package.  
JA  
The effective value of θ can be reduced by using a heatsink (see Application Hints for specific information on heatsinking). The value of θ for the LLP package  
JA  
JA  
is specifically dependant on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for  
the LLP package, refer to Application Note AN-1187. It is recommended that 6 vias be placed under the center pad to improve thermal performance.  
Note 3: ESD rating is based on the human body model: 100 pF discharged through 1.5 k.  
Note 4: All limits guaranteed for T = 25˚C are 100% tested and are used to calculate Outgoing Quality Levels. All limits at temperature extremes are guaranteed  
J
via correlation using standard Statistical Quality Control (SQC) methods.  
Note 5: Dropout voltage is defined as the input-output differential voltage where the regulator output drops to a value that is 100 mV below the value that is  
measured at V = 5V.  
IN  
3
www.national.com  
Typical Performance Characteristics  
Dropout Voltage  
Dropout Voltage vs. Temperature  
01208013  
01208014  
Output Voltage vs. Temperature  
Quiescent Current vs. Temperature  
01208015  
01208016  
Quiescent Current vs. VIN  
Quiescent Current vs. Load  
01208017  
01208018  
www.national.com  
4
Typical Performance Characteristics (Continued)  
Line Transient Response  
Load Transient Response  
01208020  
01208019  
Ripple Rejection  
Low Voltage Behavior  
01208022  
01208021  
Output Impedance  
Peak Output Current  
01208024  
01208023  
5
www.national.com  
HEATSINKING  
Application Hints  
A heatsink may be required depending on the maximum  
power dissipation and maximum ambient temperature of the  
application. Under all possible operating conditions, the junc-  
tion temperature must be within the range specified under  
Absolute Maximum Ratings.  
EXTERNAL CAPACITORS  
The output capacitor is critical to maintaining regulator sta-  
bility, and must meet the required conditions for both ESR  
(Equivalent Series Resistance) and minimum amount of ca-  
pacitance.  
To determine if a heatsink is required, the power dissipated  
by the regulator, PD, must be calculated.  
MINIMUM CAPACITANCE:  
The figure below shows the voltages and currents which are  
present in the circuit, as well as the formula for calculating  
the power dissipated in the regulator:  
The minimum output capacitance required to maintain sta-  
bility is 33 µF (this value may be increased without limit).  
Larger values of output capacitance will give improved tran-  
sient response.  
ESR LIMITS:  
The ESR of the output capacitor will cause loop instability if  
it is too high or too low. The acceptable range of ESR plotted  
versus load current is shown in the graph below. It is essen-  
tial that the output capacitor meet these requirements,  
or oscillations can result.  
01208006  
I
= I + I  
L G  
IN  
P
= (V − V  
) I + (V ) I  
OUT L IN G  
D
IN  
FIGURE 2. Power Dissipation Diagram  
The next parameter which must be calculated is the maxi-  
mum allowable temperature rise, TR (max). This is calcu-  
lated by using the formula:  
TR (max) = TJ (max) − TA (max)  
Where: TJ (max) is the maximum allowable junction tem-  
perature, which is 125˚C for commercial  
grade parts.  
01208005  
TA (max) is the maximum ambient temperature  
which will be encountered in the  
application.  
FIGURE 1. ESR Limits  
It is important to note that for most capacitors, ESR is  
specified only at room temperature. However, the designer  
must ensure that the ESR will stay inside the limits shown  
over the entire operating temperature range for the design.  
Using the calculated values for TR(max) and PD, the maxi-  
mum allowable value for the junction-to-ambient thermal  
resistance, θ(JA), can now be found:  
θ(JA) = TR (max)/PD  
For aluminum electrolytic capacitors, ESR will increase by  
about 30X as the temperature is reduced from 25˚C to  
−40˚C. This type of capacitor is not well-suited for low tem-  
perature operation.  
IMPORTANT: If the maximum allowable value for θ(JA) is  
found to be 60˚C/W for the TO-220 package, 80˚C/W for  
the TO-263 package, or 174˚C/W for the SOT-223 pack-  
age, no heatsink is needed since the package alone will  
dissipate enough heat to satisfy these requirements.  
Solid tantalum capacitors have a more stable ESR over  
temperature, but are more expensive than aluminum elec-  
trolytics. A cost-effective approach sometimes used is to  
parallel an aluminum electrolytic with a solid Tantalum, with  
the total capacitance split about 75/25% with the Aluminum  
being the larger value.  
If the calculated value for θ(JA)falls below these limits, a  
heatsink is required.  
HEATSINKING TO-220 PACKAGE PARTS  
The TO-220 can be attached to a typical heatsink, or se-  
cured to a copper plane on a PC board. If a copper plane is  
to be used, the values of θ(JA) will be the same as shown in  
the next section for the TO-263.  
If two capacitors are paralleled, the effective ESR is the  
parallel of the two individual values. The “flatter” ESR of the  
Tantalum will keep the effective ESR from rising as quickly at  
low temperatures.  
www.national.com  
6
Application Hints (Continued)  
If a manufactured heatsink is to be selected, the value of  
heatsink-to-ambient thermal resistance, θ(H−A), must first be  
calculated:  
θ(H−A) = θ(JA) θ(C−H) θ(J−C)  
Where: θ(J−C) is defined as the thermal resistance from the  
junction to the surface of the case. A value of  
4˚C/W can be assumed for θ(J−C) for this  
calculation.  
θ(C−H) is defined as the thermal resistance between  
the case and the surface of the heatsink. The  
value of θ(C−H) will vary from about 1.5˚C/W to  
about 2.5˚C/W (depending on method of at-  
tachment, insulator, etc.). If the exact value is  
unknown, 2˚C/W should be assumed for  
01208008  
FIGURE 4. Maximum Power Dissipation vs. TAMB for  
the TO-263 Package  
θ(C−H)  
.
When a value for θ(H−A) is found using the equation shown,  
a heatsink must be selected that has a value that is less than  
or equal to this number.  
Figure 5 and Figure 6 show the information for the SOT-223  
package. Figure 6 assumes a θ(JA) of 74˚C/W for 1 ounce  
copper and 51˚C/W for 2 ounce copper and a maximum  
junction temperature of 125˚C.  
θ(H−A) is specified numerically by the heatsink manufacturer  
in the catalog, or shown in a curve that plots temperature rise  
vs. power dissipation for the heatsink.  
HEATSINKING TO-263 AND SOT-223 PACKAGE PARTS  
Both the TO-263 (“S”) and SOT-223 (“MP”) packages use a  
copper plane on the PCB and the PCB itself as a heatsink.  
To optimize the heat sinking ability of the plane and PCB,  
solder the tab of the package to the plane.  
Figure 3 shows for the TO-263 the measured values of θ(JA)  
for different copper area sizes using a typical PCB with 1  
ounce copper and no solder mask over the copper area used  
for heatsinking.  
01208011  
FIGURE 5. θ(JA) vs. Copper (2 ounce) Area for the  
SOT-223 Package  
01208007  
FIGURE 3. θ(JA) vs. Copper (1 ounce) Area for the  
TO-263 Package  
As shown in the figure, increasing the copper area beyond 1  
square inch produces very little improvement. It should also  
be observed that the minimum value of θ(JA) for the TO-263  
package mounted to a PCB is 32˚C/W.  
01208012  
FIGURE 6. Maximum Power Dissipation vs. TAMB for  
the SOT-223 Package  
As a design aid, Figure 4 shows the maximum allowable  
power dissipation compared to ambient temperature for the  
TO-263 device (assuming θ(JA) is 35˚C/W and the maximum  
junction temperature is 125˚C).  
Please see AN1028 for power enhancement techniques to  
be used with the SOT-223 package.  
7
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
3-Lead SOT-223 Package  
Order Part Number LM3940IMP-3.3  
NSC Package Number MP04A  
3-Lead TO-220 Package  
Order Part Number LM3940IT-3.3  
NSC Package Number TO3B  
www.national.com  
8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
3-Lead TO-263 Package  
Order Part Number LM3940IS-3.3  
NSC Package Number TS3B  
16-Lead Ceramic Dual-in-Line Package  
Order Part Number LM3940J-3.3-QML  
5962-9688401QEA  
NSC Drawing Number J16A  
9
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
16-Lead Ceramic Surface-Mount Package  
Order Part Number LM3940WG-3.3-QML  
5962-9688401QXA  
NSC Package Number WG16A  
8-Lead LLP  
Order Part Number LM3940LD-3.3  
NSC Package Number LDC08A  
www.national.com  
10  
Notes  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
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Fax: +49 (0) 180-530 85 86  
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www.national.com  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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