LM4755T_技术文档

February 1999

LM4755

Stereo 11W Audio Power Amplifier with Mute

@

n P_Oat 10% THD 1 kHz into 8Ω bridged TO-263 pkg.

General Description

=

at V_CC12V 5W(typ)

The LM4755 is a stereo audio amplifier capable of delivering

11W per channel of continuous average output power to a

4Ω load or 7W per channel into 8Ω using a single 24V supply

at 10% THD+N. The internal mute circuit and pre-set gain re-

sistors provide for a very economical design solution.

Features

n Drives 4Ω and 8Ω loads

n Integrated mute function

n Internal Gain Resistors

n Minimal external components needed

n Single supply operation

n Internal current limiting and thermal protection

n Compact 9-lead TO-220 package

Output power specifications at both 20V and 24V supplies

and low external component count offer high value to con-

sumer electronic manufacturers for stereo TV and compact

stereo applications. The LM4755 is specifically designed for

single supply operation.

Key Specifications

Applications

n Stereos TVs

n Compact stereos

n Mini component stereos

n Output power at 10% THD with 1 kHz into 4Ω at V_CC

24V 11W(typ)

=

n Output power at 10% THD with 1 kHz into 8Ω at V_CC

24V 7W(typ)

n Closed loop gain 34 dB(typ)

@

n P_Oat 10% THD 1 kHz into 4Ω single-ended TO-263

=

pkg. at V_CC12V 2.5W(typ)

Typical Application

Connection Diagrams

Plastic Package

DS100059-2

Package Description

Top View

Order Number LM4755T

Package Number TA09A

DS100059-36

Top View

DS100059-1

Order Number LM4755TS

Package Number TS9A

FIGURE 1. Typical Audio Amplifier Application Circuit

DS100059

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Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

T Package (10 seconds)

Storage Temperature

250˚C

−40˚C to 150˚C

Operating Ratings

Supply Voltage

40V

Temperature Range

T_MIN≤ T_A≤ T_MAX

Supply Voltage

θ_JC

±

Input Voltage

0.7V

−40˚C ≤ T_A≤ +85˚C

9V to 32V

2˚C/W

Output Current

Internally Limited

62.5W

Power Dissipation (Note 3)

ESD Susceptability (Note 4)

Junction Temperature

Soldering Information

2 kV

θ_JA

76˚C/W

150˚C

Electrical Characteristics

The following specifications apply to each channel with V_CC= 24V, T_A= 25˚C unless otherwise specified.

LM4755

Units

(Limits)

Symbol

I_TOTAL

Parameter

Conditions

Typical

(Note 5)

Limit

Total Quiescent Power

Supply Current

Mute Off

Mute On

10

15

7

mA(max)

mA(min)

mA

7

P_O

Output Power (Continuous

Average per Channel)

f = 1 kHz, THD+N = 10%, R_L= 8Ω

f = 1 kHz, THD+N = 10%, R_L= 4Ω

V_S= 20V, R_L= 8Ω

W

11

4

10

W(min)

W

V_S= 20V, R_L= 4Ω

7

W

f = 1 kHz, THD+N = 10%, R_L= 4Ω

V_S= 12V, TO-263 Pkg.

2.5

W

THD

Total Harmonic Distortion

Output Swing

f = 1 kHz, P_O= 1 W/ch, R_L= 8Ω

P_O= 10W, R_L= 8Ω

P_O= 10W, R_L= 4Ω

See Apps. Circuit

0.08

15

%

V

V_OSW

14

V

X_TALK

PSRR

V_ODV

Channel Separation

55

dB

f = 1 kHz, V_O= 4 Vrms

See Apps. Circuit

Power Supply Rejection Ratio

50

dB

f = 120 Hz, V_O= 1 mVrms

V_IN= 0V

Differential DC Output Offset

Voltage

0.09

0.4

V(max)

SR

Slew Rate

2

V/µs

kΩ

R_IN

Input Impedance

Power Bandwidth

83

65

34

PBW

A_VCL

3 dB BW at P_O= 2.5W, R_L= 8Ω

R_L= 8Ω

kHz

Closed Loop Gain

(Internally Set)

33

35

dB(min)

dB(max)

mVrms

e_IN

Noise

IHF-A Weighting Filter, R_L= 8Ω

0.2

Output Referred

I_O

Output Short Circuit Limit

Mute Low Input Voltage

V_IN= 0.5V, R_L= 2Ω

2

A(min)

V(max)

Mute Pin

V_IL

Not in Mute Mode

0.8

V_IH

A_M

Mute High Input Voltage

Mute Attenuation

In Mute Mode

V_MUTE= 5.0V

2.0

80

2.5

V(min)

dB

Note 1: All voltages are measured with respect to the GND pin (5), unless otherwse specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-

tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-

antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is

given, however, the typical value is a good indication of device performance.

Note 3: For operating at case temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a thermal resistance of

θ

= 2˚C/W (junction to case). Refer to the section Determining the Maximum Power Dissipation in the Application Information section for more information.

JC

Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.

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2

Electrical Characteristics (Continued)

Note 5: Typicals are measured at 25˚C and represent the parametric norm.

Note 6: Limits are guaranteed that all parts are tested in production to meet the stated values.

>

Note 7: The TO-263 Package is not recommended for V

16V due to impractical heatsinking limitations.

S

Equivalent Schematic

3

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Test Circuit

DS100059-4

FIGURE 2. Test Circuit

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4

System Application Circuit

DS100059-5

FIGURE 3. Circuit for External Components Description

External Components Description

Components

Function Description

Provides power supply filtering and bypassing.

1, 2

3, 4

5, 6

7

C_S

R_SN

C_SN

C_b

Works with C_SNto stabilize the output stage from high frequency oscillations.

Works with R_SNto stabilize the output stage from high frequency oscillations.

Provides filtering for the internally generated half-supply bias generator.

8, 9

C_i

Input AC coupling capacitor which blocks DC voltage at the amplifier’s input terminals. Also creates a

high pass filter with fc=1/(2 • π • Rin • Cin).

10, 11

C_o

Output AC coupling capacitor which blocks DC voltage at the amplifier’s output terminal. Creates a high

pass filter with fc=1/(2 • π • Rout • Cout).

12, 13

14

R_i

Voltage control - limits the voltage level allowed to the amplifier’s input terminals.

Works with C_mto provide mute function timing.

R_m

C_m

15

Works with R_mto provide mute function timing.

5

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Typical Performance Characteristics(Note 5)

THD+N vs Output Power

DS100059-12

DS100059-6

DS100059-15

DS100059-9

DS100059-13

DS100059-7

DS100059-16

DS100059-10

DS100059-14

DS100059-8

DS100059-17

DS100059-11

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Typical Performance Characteristics(Note 5) (Continued)

THD+N vs Output Power

DS100059-38

DS100059-41

DS100059-44

DS100059-47

DS100059-39

DS100059-42

DS100059-45

DS100059-48

DS100059-40

DS100059-43

DS100059-46

DS100059-49

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Typical Performance Characteristics(Note 5) (Continued)

Output Power vs Supply Voltage

Frequency Response

DS100059-18

DS100059-19

DS100059-20

THD+N vs Frequency

Frequency Response

DS100059-21

DS100059-22

DS100059-23

Channel Separation

PSRR vs Frequency

Supply Current vs Supply Voltage

DS100059-26

DS100059-24

DS100059-25

Power Derating Curve

Power Dissipation vs Output Power

DS100059-27

DS100059-28

DS100059-29

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Typical Performance Characteristics(Note 5) (Continued)

Power Dissipation vs Output Power

DS100059-60

DS100059-61

earlier in the External Components section these capaci-

Application Information

tors create high-pass filters with their corresponding input/

output impedances. The Typical Application Circuit shown

in Figure 1 shows input and output capacitors of 0.1 µF and

1,000 µF respectively. At the input, with an 83 kΩ typical in-

put resistance, the result is a high pass 3 dB point occurring

at 19 Hz. There is another high pass filter at 39.8 Hz created

with the output load resistance of 4Ω. Careful selection of

these components is necessary to ensure that the desired

frequency response is obtained. The Frequency Response

curves in the Typical Performance Characteristics section

show how different output coupling capacitors affect the low

frequency roll-off.

The LM4755 contains circuitry to pull down the bias line in-

ternally, effectively shutting down the input stage. An exter-

nal R-C should be used to adjust the timing of the pull-down.

If the bias line is pulled down too quickly, currents induced in

the internal bias resistors will cause a momentary DC volt-

age to appear across the inputs of each amplifier’s internal

differential pair, resulting in an output DC shift towards Vsup-

ply. An R-C timing circuit should be used to limit the pull-

down time such that output “pops” and signal feedthroughs

will be minimized. The pull-down timing is a function of a

number of factors, including the internal mute circuitry, the

voltage used to activate the mute, the bias capacitor, the

half-supply voltage, and internal resistances used in the half-

supply generator. Table 1 shows a list of recommended val-

ues for the external R-C.

OPERATING IN BRIDGE-MODE

Though designed for use as a single-ended amplifier, the

LM4755 can be used to drive a load differentially (bridge-

mode). Due to the low pin count of the package, only the

non-inverting inputs are available. An inverted signal must

be provided to one of the inputs. This can easily be done with

the use of an inexpensive op-amp configured as a standard

inverting amplifier. An LF353 is a good low-cost choice. Care

must be taken, however, for a bridge-mode amplifier must

theoretically dissipate four times the power of a single-ended

type. The load seen by each amplifier is effectively half that

of the actual load being used, thus an amplifier designed to

drive a 4Ω load in single-ended mode should drive an 8Ω

load when operating in bridge-mode.

TABLE 1. Recommended Values for Mute Circuit

V_MUTE

5V

V_CC

12V

15V

20V

24V

28V

30V

Rm

Cm

18 kΩ

12 kΩ

8.2 kΩ

10 µF

5V

CAPACITOR SELECTION AND FREQUENCY

RESPONSE

With the LM4755, as in all single supply amplifiers, AC cou-

pling capacitors are used to isolate the DC voltage present at

the inputs (pins 3, 7) and outputs (pins 1, 8). As mentioned

9

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Application Information (Continued)

DS100059-30

FIGURE 4. Bridge-Mode Application

DS100059-31

DS100059-37

FIGURE 5. THD+N vs P_OUTfor Bridge-Mode Application

PREVENTING OSCILLATIONS

require an external signal, the inputs should be terminated to

ground with a resistance of 50 kΩ or less on the AC side of

the input coupling capacitors.

With the integration of the feedback and bias resistors on-

chip, the LM4755 fits into a very compact package. However,

due to the close proximity of the non-inverting input pins to

the corresponding output pins, the inputs should be AC ter-

minated at all times. If the inputs are left floating, the ampli-

fier will have a positive feedback path through high imped-

ance coupling, resulting in a high frequency oscillation. In

most applications, this termination is typically provided by

the previous stage’s source impedance. If the application will

UNDERVOLTAGE SHUTDOWN

If the power supply voltage drops below the minimum oper-

ating supply voltage, the internal under-voltage detection cir-

cuitry pulls down the half-supply bias line, shutting down the

preamp section of the LM4755. Due to the wide operating

supply range of the LM4755, the threshold is set to just un-

der 9V. There may be certain applications where a higher

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10

P_DMAX= maximum power dissipation of the IC

T_J(˚C) = junction temperature of the IC

Application Information (Continued)

threshold voltage is desired. One example is a design requir-

ing a high operating supply voltage, with large supply and

bias capacitors, and there is little or no other circuitry con-

nected to the main power supply rail. In this circuit, when the

power is disconnected, the supply and bias capacitors will

discharge at a slower rate, possibly resulting in audible out-

put distortion as the decaying voltage begins to clip the out-

put signal. An external circuit may be used to sense for the

desired threshold, and pull the bias line (pin 6) to ground to

disable the input preamp. Figure 6 shows an example of

such a circuit. When the voltage across the zener diode

drops below its threshold, current flow into the base of Q1 is

interrupted. Q2 then turns on, discharging the bias capacitor.

This discharge rate is governed by several factors, including

the bias capacitor value, the bias voltage, and the resistor at

the emitter of Q2. An equation for approximating the value of

the emitter discharge resistor, R, is given below:

T_A(˚C) = ambient temperature

θ_JC(˚C/W) = junction-to-case thermal resistance of the IC

θ_CS(˚C/W) = case-to-heatsink thermal resistance (typically

0.2 to 0.5 ˚C/W)

θ_SA(˚C/W) = thermal resistance of heatsink

When determining the proper heatsink, the above equation

should be re-written as:

θ_SA≤ [(T_J–T_A) / P_DMAX] - θ_JC–θ_CS

TO-263 HEATSINKING

Surface mount applications will be limited by the thermal dis-

sipation properties of printed circuit board area. The TO-263

package is not recommended for surface mount applications

>

with V_S

16V due to limited printed circuit board area.

There are TO-263 package enhancements, such as clip-on

heatsinks and heatsinks with adhesives, that can be used to

improve performance.

R = (0.7v) / (Cb • (V_CC/2) / 0.1s)

Note that this is only a linearized approximation based on a

discharge time of 0.1s. The circuit should be evaluated and

adjusted for each application.

Standard FR-4 single-sided copper clad will have an ap-

proximate Thermal resistance (θ_SA) ranging from:

As mentioned earlier in the Built-in Mute Circuit section,

when using an external circuit to pull down the bias line, the

rate of discharge will have an effect on the turn-off induced

distortions. Please refer to the Built-in Mute Circuit section

for more information.

1.5 x 1.5 in. sq.

2 x 2 in. sq.

20–27˚C/W (T_A=28˚C, Sine wave

testing, 1 oz. Copper)

16–23˚C/W

The above values for θ_SAvary widely due to dimensional

proportions (i.e. variations in width and length will vary θ_SA).

For audio applications, where peak power levels are short in

duration, this part will perform satisfactory with less

heatsinking/copper clad area. As with any high power design

proper bench testing should be undertaken to assure the de-

sign can dissipate the required power. Proper bench testing

requires attention to worst case ambient temperature and air

flow. At high power dissipation levels the part will show a ten-

dency to increase saturation voltages, thus limiting the un-

distorted power levels.

DETERMINING MAXIMUM POWER DISSIPATION

For a single-ended class AB power amplifier, the theoretical

maximum power dissipation point is a function of the supply

voltage, V_S, and the load resistance, R_Land is given by the

following equation:

(single channel)

P_DMAX(W) = [V_S/ (2 • π²• R_L)]

2

DS100059-32

The above equation is for a single channel class-AB power

amplifier. For dual amplifiers such as the LM4755, the equa-

tion for calculating the total maximum power dissipated is:

FIGURE 6. External Undervoltage Pull-Down

(dual channel)

P_DMAX(W) = 2 • [V_S/ (2 • π²• R_L)]

THERMAL CONSIDERATIONS

Heat Sinking

2

or

Proper heatsinking is necessary to ensure that the amplifier

will function correctly under all operating conditions. A heat-

sink that is too small will cause the die to heat excessively

and will result in a degraded output signal as the thermal pro-

tection circuitry begins to operate.

V_S/ (π²• R_L)

2

(Bridged Outputs)

P_DMAX(W) = 4[V_S/ (2π²• R_L)]

2

HEATSINK DESIGN EXAMPLE:

The choice of a heatsink for a given application is dictated by

several factors: the maximum power the IC needs to dissi-

pate, the worst-case ambient temperature of the circuit, the

junction-to-case thermal resistance, and the maximum junc-

tion temperature of the IC. The heat flow approximation

equation used in determining the correct heatsink maximum

thermal resistance is given below:

Determine the system parameters:

V_S= 24V

R_L= 4Ω

Operating Supply Voltage

Minimum Load Impedance

Worst Case Ambient Temperature

T_A= 55˚C

Device parameters from the datasheet:

T_J–T_A= P_DMAX• (θ_JC+ θ_CS+ θ_SA

)

T_J= 150˚C Maximum Junction Temperature

where:

11

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P_DMAX≈ 3.7W

Application Information (Continued)

Calculating P_DMAX

:

2

θ_JC= 2˚C/W

Junction-to-Case Thermal Resistance

2

=

P_DMAXV_CC/(π R_L) (12V) /(π (4Ω)) 3.65W

Calculating Heatsink Thermal Resistance:

Calculations:

<

θ_SA[(T_J− T_A) / P_DMAX] − θ_JC− θ_CS

2 • P_DMAX= 2 • [V_S/ 2 • π²• R_L)] = (24V)²/ (2 • π²• 4Ω)

= 14.6W

2

=

<

θ_SA100˚C/3.7W − 2.0˚C/W − 0.2˚C/W 24.8˚C/W

Therefore the recommendation is to use 2.0 x 2.0 square

inch of single-sided copper clad.

θ

_SA≤ [(T_J-T_A) / P_DMAX] - θ_JC–θ_CS= [ (150˚C - 55˚C) / 14.6W]

- 2˚C/W–0.2˚C/W = 4.3˚C/W

Example 3: (Bridged Output)

Conclusion: Choose a heatsink with θ_SA≤ 4.3˚C/W.

=

T_A50˚C

Given:

=

T_J150˚C

TO-263 HEATSINK DESIGN EXAMPLES:

=

R_L8Ω

Example 1: (Stereo Single-Ended Output)

=

V_S12V

=

T_A30˚C

Given:

=

θ_JC2˚C/W

=

T_J150˚C

Calculating P_DMAX

:

=

R_L4Ω

2

=

P_DMAX4[V_CC/(2π R_L)] 4(12V) /(2π (8Ω)) 3.65W

=

V_S12V

Calculating Heatsink Thermal Resistance:

=

θ_JC2˚C/W

P_DMAXfrom P_Dvs P_OGraph:

P_DMAX≈ 3.7W

<

θ_SA[(T_J− T_A) / P_DMAX] − θ_JC− θ_CS

=

<

θ_SA100˚C / 3.7W − 2.0˚C/W − 0.2˚C/W 24.8˚C/W

Therefore the recommendation is to use 2.0 x 2.0 square

inch of single-sided copper clad.

Calculating P_DMAX

:

2

=

P_DMAXV_CC/(π R_L) (12V) /π (4Ω)) 3.65W

Calculating Heatsink Thermal Resistance:

LAYOUT AND GROUND RETURNS

<

θ_SAT_J− T_A/ P_DMAX− θ_JC− θ_CS

Proper PC board layout is essential for good circuit perfor-

mance. When laying out a PC board for an audio power am-

plifier, particular attention must be paid to the routing of the

output signal ground returns relative to the input signal and

bias capacitor grounds. To prevent any ground loops, the

ground returns for the output signals should be routed sepa-

rately and brought together at the supply ground. The input

signal grounds and the bias capacitor ground line should

also be routed separately. The 0.1 µF high frequency supply

bypass capacitor should be placed as close as possible to

the IC.

=

<

θ_SA120˚C/3.7W − 2.0˚C/W − 0.2˚C/W 30.2˚C/W

Therefore the recommendation is to use 1.5 x 1.5 square

inch of single-sided copper clad.

Example 2: (Stereo Single-Ended Output)

=

T_A50˚C

Given:

=

T_J150˚C

=

R_L4Ω

=

V_S12V

=

θ_JC2˚C/W

P_DMAXfrom P_Dvs P_OGraph:

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12

Application Information (Continued)

PC BOARD LAYOUT-COMPOSITE

DS100059-33

13

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Application Information (Continued)

PC BOARD LAYOUT-SILK SCREEN

DS100059-34

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Application Information (Continued)

PC BOARD LAYOUT-SOLDER SIDE

DS100059-35

15

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16

Physical Dimensions inches (millimeters) unless otherwise noted

Order Number LM4755T

NS Package Number TA9A

17

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Order Number LM4755TS

NS Package Number TS9A

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-

VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-

CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys-

tems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, and whose fail-

ure to perform when properly used in accordance

with instructions for use provided in the labeling, can

be reasonably expected to result in a significant injury

to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

National Semiconductor

Corporation

Americas

Tel: 1-800-272-9959

Fax: 1-800-737-7018

Email: support@nsc.com

National Semiconductor

Europe

National Semiconductor

Asia Pacific Customer

Response Group

Tel: 65-2544466

Fax: 65-2504466

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Japan Ltd.

Tel: 81-3-5639-7560

Fax: 81-3-5639-7507

Fax: +49 (0) 1 80-530 85 86

Email: europe.support@nsc.com

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Email: sea.support@nsc.com

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.


型号：	LM4755T
厂家：	National Semiconductor
描述：	Stereo 11W Audio Power Amplifier with Mute 立体声11W音频功率放大器静音放大器功率放大器
文件：	总18页 (文件大小：717K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM4755T [NSC]

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