LM4830 [NSC]

Two-Way Audio Amplification System with Volume Control; 双向音频放大系统的音量控制
LM4830
型号: LM4830
厂家: National Semiconductor    National Semiconductor
描述:

Two-Way Audio Amplification System with Volume Control
双向音频放大系统的音量控制

文件: 总14页 (文件大小:461K)
中文:  中文翻译
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January 1999  
LM4830  
Two-Way Audio Amplification System  
with Volume Control  
General Description  
Key Specifications  
n THD at 1W cont. avg PO into 8: 1% (max)  
The LM4830 is an integrated solution for two-way audio am-  
plification. It contains a bridge-connected audio power ampli-  
fier capable of delivering 1W of continuous average power to  
an 8load with less than 1% THD from a 5V power supply.  
n Instantaneous peak output power: 1.4W  
n Shutdown current: 0.5 µA (typ)  
n Supply voltage range: 2.7V V  
5.5V  
DD  
It also has the capability of driving 100 mW into  
a
single-ended 32impedance for headset operation. There  
is a 30 dB attenuator in front of a bridged power amplifier  
with 6 dB of gain. The attenuation is controlled through 4 bits  
of parallel digital control; 15 steps of 2 dB each.  
Features  
n 4-bit digital control for 30 dB of volume attenuation  
n Two selectable microphone inputs  
n High performance microphone preamp  
n Extra buffer for driving long cables  
n No bootstrap capacitors or snubber circuits are  
necessary  
The device also contains a microphone preamp with two se-  
lectable inputs. Mic2 is selected when HS is high and A1 is in  
single-ended mode. Mic1 is selected when HS is low and A1  
is in bridged mode. This configuration is optimum for switch-  
ing between an internal system speaker and external head-  
set with microphone. The device also incorporates a buffer  
used for driving capacitive loads.  
n Small Outline (SO) packaging  
n Thermal shutdown protection circuitry  
The LM4830 also provides a low-current consumption shut-  
down mode making it optimally suited for low-power portable  
systems. In addition, the device has an internal thermal shut-  
down protection mechanism.  
Applications  
n Hands-free phone systems  
n Mobile phone accessories  
n Desktop conference phones  
n Portable computers  
n Teleconference computer applications  
Connection Diagram  
Dual-In-Line and  
Small Outline Packages  
DS012677-2  
Top View  
Order Number LM4830M  
See NS Package Number M24B for SO  
Order Number LM4830N  
See NS Package Number N24A for DIP  
© 1999 National Semiconductor Corporation  
DS012677  
www.national.com  
Typical Application  
DS012677-1  
FIGURE 1. Typical Application Circuit  
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2
Absolute Maximum Ratings (Note 2)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
Infrared (15 sec.)  
220˚C  
See AN-450 “Surface Mounting and their Effects on  
Product Reliability” for other methods of soldering surface  
mount devices.  
Supply Voltage  
6.0V  
−65˚C to +150˚C  
−0.3V to VDD + 0.3V  
Internally Limited  
2000V  
Operating Ratings  
Temperature Range  
Storage Temperature  
Input Voltage  
TMIN TA TMAX  
Supply Voltage  
−40˚C TA 85˚C  
2.7V VDD 5.5V  
32˚C/W  
Power Dissipation (Note 3)  
ESD Susceptibility (Note 4)  
ESD Susceptibility (Note 5)  
Junction Temperature  
Soldering Information  
Small Outline Package  
Vapor Phase (60 sec.)  
θJC (typ) — M24B  
θJA (typ) — M24B  
θJC (typ) — N24A  
θJA (typ) — N24A  
250V  
79˚C/W  
150˚C  
21˚C/W  
61˚C/W  
215˚C  
Electrical Characteristics (Notes 1, 2)  
=
=
The following specifications apply for VDD 5V, unless otherwise specified. Limits apply for TA 25˚C.  
Symbol Parameter Conditions LM4830  
Units  
(Limits)  
Typical  
Limit  
(Note 6)  
(Note 7)  
POWER AMPLIFIER, A1  
=
=
=  
IDD  
Quiescent Power Supply Current  
VO 0V, IO 0A, RL  
5.8  
mA (min)  
mA (max)  
mA  
11.0  
11.4  
7.9  
20.0  
=
Bridged RL 8Ω  
=
=
HS 5V, SD 0V, VO1 On Only  
mA  
=
=
ISD  
VOS  
eIN  
Shutdown Current  
Output Offset Voltage  
Input Noise  
HS 5V, SD 5V, IC Off  
0.5  
2.0  
µA (max)  
mV (max)  
=
VIN 0V  
0.7  
50.0  
=
IHF-A Weighting Filter, RS 25Ω  
=
Bridged Output, VO1–VO2, RL 8Ω  
30  
16  
µV  
µV  
=
Single-Ended Output, VO1, RL 32Ω  
=
=
=
PO  
Output Power, Bridged  
THD 1% (max); f 1 kHz, RL 8Ω  
1.15  
1.4  
2
1.0  
W (min)  
W
=
=
=
THD+N 10%; f 1 kHz, RL 8Ω  
=
=
=
THD+N 10%; f 1 kHz, RL 4Ω  
W
=
@
1 kHz, Attenuation 0 dB  
THD  
Total Harmonic Distortion  
f
=
=
PO 1.5W, RL 4Ω  
0.2  
0.2  
%
%
=
=
PO 1W, RL 8Ω  
=
=
VO1 On Only, VO 60 mV, RL 32Ω  
0.06  
%
±
±
±
Attenuation Step Size Error  
Absolute Attenuation  
0 dB to −30 dB  
0.5  
0.5  
1.0  
dB  
dB  
dB  
kΩ  
@
Attenuation 0 dB  
@
Attenuation −30 dB  
RIN  
Power Amp Input Resistance  
40  
DIGITAL INPUTS  
VIH  
VIL  
High Input Voltage  
Low Input Voltage  
CMOS Compatible Only  
CMOS Compatible Only  
4.5  
0.5  
V
V
PREAMP, A2  
RIN  
Mic1 and Mic2 Input Resistance  
21.5  
2.0  
kΩ  
mV  
=
VOS  
eIN  
Output Offset Voltage  
Input Noise  
VIN 0V  
=
IHF-A Weighting Filter, RS 25Ω  
1.3  
10.0  
µV (max)  
%
=
=
=
THD  
Total Harmonic Distortion  
AVCL 100, VIN 10 mVrms, f 1 kHz  
0.06  
0.02  
=
=
=
=
AVCL −1, PO 50 mW, f 1 kHz, RL  
32Ω  
(Refer to Figure 2 )  
3
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Electrical Characteristics (Notes 1, 2) (Continued)  
=
=
The following specifications apply for VDD 5V, unless otherwise specified. Limits apply for TA 25˚C.  
Symbol  
Parameter  
Conditions  
LM4830  
Units  
(Limits)  
Typical  
Limit  
(Note 6)  
(Note 7)  
PREAMP, A2  
=
=
Xtalk  
Crosstalk  
AVCL 100, Power Amp: PO 1W,  
−72  
60  
dB  
dB  
=
=
8, f 1 kHz  
R
L
= =  
VDDAC 0.5 VPP, f 1 kHz  
PSRR  
Power Supply Rejection Ratio  
MICROPHONE BUFFER, A3  
RIN  
Buffer Input Resistance  
Output Offset Voltage  
Input Noise  
17  
2.0  
5.8  
0.5  
−76  
kΩ  
mV  
µV  
%
=
VOS  
eIN  
VIN 0V  
=
IHF-A Weighting Filter, RS 25Ω  
= = =  
PO 50 mW, f 1 kHz, RL 32Ω  
THD  
Xtalk  
Total Harmonic Distortion  
Crosstalk  
=
=
=
Power Amp: PO 1W, RL 8, f 1 kHz  
dB  
Note 1: All voltages are measured with respect to the ground pins (Pins 2, 15, and 24), unless otherwise specified.  
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-  
tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar-  
antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is  
given, however, the typical value is a good indication of device performance.  
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T  
JMAX  
, θ , and the ambient temperature, T . The maximum  
JA  
A
=
=
allowable power dissipation is P  
(T  
− T )/θ or the number given in the Absolute Maximum Ratings, whichever is lower. For the LM4830M, T  
JA JMAX  
DMAX  
JMAX  
A
+150˚C, and the typical junction-to-ambient thermal resistance, when board mounted, is 79˚C/W.  
Note 4: Human body model, 100 pF discharged through a 1.5 kresistor.  
Note 5: Machine model, 200 pF–240 pF discharged through all pins.  
Note 6: Typicals are measured at 25˚C and represent the parametric norm.  
Note 7: Limits are guarantees that all parts are tested in production to meet the stated values.  
Timing Diagram  
DS012677-3  
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4
Computer Application Circuit  
DS012677-4  
FIGURE 2.  
5
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Typical Performance Characteristics (Power Amp-Bridged)  
Output Power vs  
Supply Voltage  
Wideband Noise Floor  
Frequency Response  
vs Attenuation Level  
DS012677-6  
DS012677-5  
DS012677-7  
Output Power vs  
Supply Voltage  
Output Power vs  
Supply Voltage  
Output Power vs  
Supply Voltage  
DS012677-8  
DS012677-9  
DS012677-10  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
DS012677-11  
DS012677-12  
DS012677-13  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
DS012677-14  
DS012677-15  
DS012677-16  
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6
Typical Performance Characteristics (Power Amp-Bridged) (Continued)  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Frequency  
THD + N vs Output Power  
THD + N vs Output Power  
THD + N vs Frequency  
DS012677-17  
DS012677-20  
DS012677-23  
DS012677-26  
DS012677-18  
DS012677-21  
DS012677-24  
DS012677-27  
DS012677-19  
DS012677-22  
DS012677-25  
DS012677-28  
THD + N vs Output Power  
THD + N vs Output Power  
7
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Typical Performance Characteristics (Power Amp-Bridged) (Continued)  
THD + N vs Output Power  
Power Amp Crosstalk  
to Preamp and Buffer  
Power Amp Crosstalk  
to Preamp  
DS012677-29  
DS012677-30  
DS012677-31  
Wideband Noise Floor  
Wideband Noise Floor  
Buffer  
Frequency Response  
DS012677-32  
DS012677-33  
DS012677-34  
Output Attenuation  
in Shutdown Mode  
Power Dissipation vs  
Output Power  
Power Derating Curve  
DS012677-37  
DS012677-36  
DS012677-35  
Supply Current vs  
Supply Voltage  
Supply Current vs  
Temperature  
Power Supply  
Rejection Ratio  
DS012677-38  
DS012677-39  
DS012677-40  
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8
Even with the large internal power dissipation created by the  
bridged amplifier, the LM4830 does not require heatsinking  
over a large range of ambient temperatures. Using Equation  
2, assuming a 5V power supply and a 8load, the maximum  
power dissipation point is 633 mW.  
Application Information  
POWER AMPLIFIER HANDSFREE MODE  
As shown in Figure 1, amplifier A1 can be used in one of two  
modes, bridged output or single-ended output. This IC was  
intended to be used in systems requiring both internal  
speaker drive and external mono-headphone drive capabil-  
ity. Headphones generally have a much higher impedance  
than that of speakers since headphones don’t require as  
much output power. This also allows headphones to be  
driven single-endedly. Shown in Figure 1, the output can be  
automatically switched from bridged speaker drive to  
single-ended headphone drive using a control pin in the  
headphone jack that is tied to the Headset (HS) pin, pin 3.  
When the voltage at the HS pin input changes from 0V to 5V,  
VO2 of the bridged amplifier output is put into high imped-  
ance. This allows the permanently connected internal  
speaker of the system to be disabled when a headphone is  
plugged into the headphone jack. Output VO1 then drives the  
headphone single-endedly through the output coupling cap,  
CC. CC should be chosen to allow the full audio bandwidth to  
=
PDMAX (TJMAX − TA)/θJA  
(3)  
=
For the LM4830 surface mount package, θJA 79˚C/W and  
=
TJMAX 150˚C. Depending on the ambient temperature, TA,  
of the system surroundings, Equation 3 can be used to find  
the maximum internal power dissipation supported by the IC  
packaging. If the result of Equation 2 is greater than that of  
Equation 3, then either the supply voltage must be de-  
creased, the load impedance increased, or the ambient tem-  
perature reduced. For the typical application of a 5V power  
supply, with a bridged 8load, the maximum ambient tem-  
perature possible without violating the maximum junction  
temperature is approximately 100˚C provided that device op-  
eration is around the maximum power dissipation point. The  
average power dissipation caused by typical music material  
played at a reasonable level is generally lower than the  
maximum power dissipation point. Refer to the Typical Per-  
formance Characteristics curves for power dissipation in-  
formation for lower output powers.  
be amplified. Since CC and R create a high-pass filter, CC  
L
must be big enough to allow frequencies down to 20 Hz to be  
amplified. The following equation should be used for proper  
component selection.  
POWER SUPPLY BYPASSING  
As with any power amplifier, proper supply bypassing is criti-  
cal for low noise performance and high power supply rejec-  
tion. The capacitor location on both the half-supply bypass  
and power supply pins should be as close to the device as  
possible. The effect of a larger half-supply bypass capacitor  
is improved low frequency PSRR due to increased  
half-supply stability. Typical applications employ a 5V regula-  
tor with 10 µF and a 0.1 µF bypass capacitors which aid in  
supply stability, but do not eliminate the need for bypassing  
the supply nodes of the LM4830. The selection of bypass ca-  
pacitors, especially Cb, is thus dependent upon desired low  
frequency PSRR, system cost, and size constraints.  
=
CC 1/(2π(20 Hz)(R L)) where 16Ω ≤ RL 600(1)  
As usual, the output drive limitations are the maximum sup-  
ply voltage swing, current drive capability, and power dissi-  
pation. In bridged-output drive mode, the power amplifier will  
drive 4or 8with normal music signals over time. How-  
ever, trying to put a sinewave through the amplifier at the  
worst case power dissipation point could cause the amplifier  
to go into thermal shutdown.  
In single-ended drive mode, the amplifier is intended to drive  
32headphones. It will drive lower impedances with the  
limitations of voltage swing and current drive capability. The  
result of driving lower impedance loads single-endedly is  
lower achievable output power.  
GROUNDING  
In order to achieve the best possible performance, there are  
certain grounding techniques that should be followed. All in-  
put reference grounds should be tied with their respective  
source grounds and brought back to the power supply  
ground separately from the output load ground returns.  
Those input grounds should also be tied in with the  
half-supply bypass ground, pin 16. As an example, the AC in-  
put ground reference for the power amplifier, A1, is VIN+, pin  
7. This ground should be tied as close as possible to the By-  
pass ground (pin 16), as shown in Figure 1. In order to tie in  
the signal source ground, the audio jack ground on VIN−  
should also be tied to the Bypass ground.  
Headset and Shutdown Pin Table  
HS Pin  
Low  
SD Pin  
Low  
IC Operation  
All Outputs On  
1/2 A1 On  
Microphone  
MIC1 On  
High  
Low  
MIC2 On  
(VO1 On Only)  
Whole IC Off  
X
High  
NA  
X — “Don’t Care” NA — Not Applicable  
POWER DISSIPATION  
As stated above, the ground returns for the output loads  
should be brought back to the supply ground individually.  
This will keep large signal currents on those ground lines  
from interfering with the stable AC input ground references.  
Power dissipation is a major concern when using any power  
amplifier and must be thoroughly understood to ensure a  
successful design. Equation 2 states the maximum power  
dissipation point for a bridged amplifier operating at a given  
supply voltage and driving a specified output load.  
In addition, the signal ground reference for the preamp, A2,  
(the ground end of capacitor CI) should be tied together with  
the mic inputs’ signal ground reference from the microphone.  
=
PDMAX 4(VDD  
)
2/(2π2 RL)  
(2)  
Although the LM4830 has three amplifiers in the package,  
the bridged amplifier produces the majority of the power dis-  
sipation because it supplies the largest amount of output  
power. If each of the amplifiers in the LM4830 were of the  
same power level, each of their power dissipations would  
need to be taken into account. However, this is not the case  
and the bridged power amplifier is the only major power dis-  
sipation contributor.  
LAYOUT ISSUES  
As stated in the Grounding section, placement of ground re-  
turn lines is imperative in maintaining the highest level of  
system performance. It is not only important to route the cor-  
rect ground return lines together, but also equally important  
to be aware of where those ground return lines are routed in  
conjunction with each other. As an example, the output load  
9
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SELECTION OF EXTERNAL CAPACITORS  
Application Information (Continued)  
The IC’s low frequency power supply rejection can be im-  
proved by using a larger bypass capacitor, Cb. By increasing  
this capacitor value, the THD performance at low frequen-  
cies will also be improved. For cost sensitive designs, 0.1 µF  
is recommended, however, for best performance at least 1  
µF should be used.  
ground return lines should not be tied together with AC input  
reference ground return lines. In addition, the layout of these  
ground lines should be physically located as far as reason-  
ably possible from each other so that large signal coupling  
cannot occur. To further exemplify this point, the outputs and  
output load returns for the power amplifier, which have volts  
of signal on them, should be physically isolated from the sen-  
sitive inputs and AC input ground returns associated with the  
preamp. It is easy for large signals to couple into the sensi-  
tive low voltage microphone preamp inputs.  
The selection of the microphone input coupling capacitors  
should be based on desired low frequency coupling. Since  
the input resistance for those inputs is around 20 k, the  
coupling cap should be 0.47 µF for 17 Hz coupling or 0.047  
µF for 170 Hz coupling.  
Similarly, the selection of the power amplifier input coupling  
capacitors should be based on an input resistance of 40 k,  
so for flatband 20 Hz reproduction, 0.47 µF caps or larger  
should be used.  
TABLE 1. 4-Bit Attenuation Control  
LD  
Input Bits  
msb: lsb  
D3–D0  
0000  
Attenuation  
Level (dB)  
Bridge  
Pin  
Amplifier  
Gain (dB)  
VOICE-BAND DESIGN  
The preamp on this IC is intended to be used for microphone  
amplification. Depending upon the frequency response of  
the microphone, the preamplifier’s response can be config-  
ured to fit the microphone. Simple capacitors can be used to  
bandwidth limit the frequency response of the preamplifier  
and improve the system’s performance. Once the gain of the  
preamp is chosen, the values for the resistors and capacitors  
can be selected based upon desired cutoff frequencies using  
the equations below.  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0 dB  
6 dB  
0001  
−2 dB  
−4 dB  
4 dB  
2 dB  
0010  
0011  
−6 dB  
0 dB  
0100  
−8 dB  
−2 dB  
−4 dB  
−6 dB  
−8 dB  
−10 dB  
−12 dB  
−14 dB  
−16 dB  
−18 dB  
−20 dB  
−22 dB  
−24 dB  
0101  
−10 dB  
−12 dB  
−14 dB  
−16 dB  
−18 dB  
−20 dB  
−22 dB  
−24 dB  
−26 dB  
−28 dB  
−30 dB  
0110  
0111  
=
AVCL 1 + Rf/R  
(4)  
(5)  
(6)  
i
=
1000  
flp 1/(2π RfCf )  
=
fhp 1/(2π RiCi )  
1001  
As an example, lets assume that the desired closed-loop  
gain is 40 dB and the desired voice-band is 300 Hz to 3 kHz.  
1010  
1011  
=
=
Using Equation 4, we choose Rf 100 kand Ri 1 k.  
1100  
The desired value in dB is equal to 20 log (AVCL). Then, solv-  
=
=
=
1101  
ing for Cf and Ci using flp 3 kHz, fhp 300 Hz, Rf 100  
=
=
k, and Ri 1 kwe get the following: Cf 530 pF and C  
1110  
=
i
0.53 µF.  
1111  
XXXX  
NC  
NC  
COMPUTER APPLICATION CIRCUIT  
0 — Logic Low (0V)  
1 — Logic High (5V)  
X — Don’t Care  
The LM4830 can also be used to drive both an internal sys-  
tem speaker and stereo headphones simultaneously, as  
shown in Figure 2. The internally configured unity-gain buffer  
requires the preamp to also be set up in an inverting  
unity-gain fashion to maintain proper signal phase between  
channels for the stereo headphone amplifier. The unity-gain  
configured circuit also requires that the AC input signal dy-  
namic range be properly conditioned for the 2.5 VPK signal  
swing.  
NC — No Change  
DIGITAL ATTENUATION CONTROL  
The Load (LD) pin, pin 9, has two modes of operation. When  
this input pin is a logic high, 5V, the power amp’s attenuation  
control is in “transparent mode” where the voltages on bits  
D0–D3 will cause the appropriate attenuation level to be  
latched and decoded within the IC. For normal attenuation,  
pin 9 should be at 5V. When the LD input pin is a logic low,  
0V, the power amp’s attenuation control is “locked-out” so  
that any change in the input bits will not cause a subsequent  
change in the amp’s attenuation level.  
Please refer to the Typical Performance Characteristics  
curves for THD+N vs P and frequency of the MIC preamp  
O
and buffer.  
SHUTDOWN FUNCTION  
In order to reduce current consumption while not in use, the  
LM4830 contains a shutdown pin to externally turn off the  
IC’s bias circuitry. This shutdown feature turns the IC off  
when a logic high is placed on the shutdown pin. The trigger  
The attenuation level is preset to −16 dB when the IC is first  
powered up, assuming that LD is a logic low until the IC is  
fully biased up.  
To provide the best click and pop performance when chang-  
ing attenuation levels, each step should be utilized. If a  
mute-type function is desired, it is recommended that each  
of the attenuation steps be “ramped through” quicker than  
the normal attenuation ramp.  
point between  
a logic low and logic high is typically  
half-supply. Quiescent current consumption will depend  
upon the value of this voltage. It is best for this voltage to be  
forced to VDDto obtain the guaranteed shutdown current.  
The shutdown feature reduces quiescent supply current con-  
sumption from a typical 11 mA to under 2 µA for the whole IC.  
To ensure that attenuation steps are flawless when data is  
transitioning with load, refer to the timing diagram for proper  
setup and hold times.  
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10  
external pull-up resistor. When the switch is closed, the shut-  
down pin is connected to ground and enables the amplifier. If  
the switch is open, the external pull-up resistor disables the  
LM4830 by bringing the shutdown pin up to VDD. This  
scheme guarantees that the shutdown pin will not float, pre-  
venting unwanted state changes.  
Application Information (Continued)  
This feature is especially useful when the IC is used in por-  
table battery operated systems where energy conservation  
is imperative.  
In many applications, a microcontroller or microprocessor  
output interfaces to the LM4830 shutdown pin, providing a  
quick, smooth transition into shutdown. Another solution is to  
use a single-pole, single-throw switch in conjunction with an  
Additionally, when the IC comes out of shutdown the IC’s  
volume attenuation setting will remain unchanged.  
11  
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12  
Physical Dimensions inches (millimeters) unless otherwise noted  
24-Lead (0.300" Wide) Molded Small Outline Package, JEDEC  
Order Number LM4830M  
NS Package Number M24B  
24-Lead (0.600" Wide) Molded Dual-In-Line Package  
Order Number LM4830N  
NS Package Number N24A  
13  
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-  
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-  
CONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or sys-  
tems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, and whose fail-  
ure to perform when properly used in accordance  
with instructions for use provided in the labeling, can  
be reasonably expected to result in a significant injury  
to the user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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