LM4869_技术文档

August 2002

LM4869

1.9W Differential Input, BTL Output Stereo Audio

Amplifier with Selectable Gain and Shutdown

j

General Description

Micropower shutdown current

0.1µA (typ)

62dB (typ)

j

@

PSRR ( 1kHz, V_DD= 5V, (Fig.1))

The LM4869 features differential stereo inputs, BTL (bridge-

tied load) outputs, and four externally selectable fixed gains.

Operating on a single 5V supply, the LM4869 delivers 1.2W

and 1.9W (typ) of output power to an 8Ω and 4Ω BTL load

(Note 1), respectively, with less than 1% THD+N. The

LM4869’s gain is selected using two digital inputs. The nomi-

nal gain values are 6dB, 10dB, 15.6dB, and 21.6dB.

Features

n Fully differential input and output

n Internal gain set: 6dB, 10dB, 15.6dB, and 21.6dB

n Improved ’click and pop’ suppression

n Thermal shutdown protection circuit

n Ultra low current micropower shutdown mode

n 2.0V to 5.5V operation

The LM4869 is designed for notebook and other handheld

portable applications. It delivers high quality output power

from a surface-mount package and requires few external

components.

n Available in space-saving exposed-DAP TSSOP

package

Other features include an active-low micropower shutdown

mode input and thermal shutdown protection.

Applications

n Notebook computers

n PDAs

Key Specifications

j

BTL output Power

n Portable electronic devices

R_L= 4Ω, V_DD= 5.0V, and THD+N = 1%

BTL output Power

1.9W (typ)

1.2W (typ)

j

R_L= 8Ω, V_DD= 5.0V, and THD+N = 1%

Connection Diagram

Top View

20042802

Order Number LM4869MH

See NS Package Number MXA20A for Exposed-DAP TSSOP

Boomer^®is a registered trademark of National Semiconductor Corporation.

DS200428

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Typical Application

20042801

FIGURE 1. Typical Audio Amplifier Application Circuit

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2

Absolute Maximum Ratings (Notes 2,

3)

Infrared (15 sec.)

220˚C

See AN-450 “Surface Mounting and their Effects on

Product Reliability” for other methods of soldering surface

mount devices.

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Thermal Resistance

θ_JC(typ) MXA20A

θ_JA(typ) MXA20A

2˚C/W

47˚C/W (Note 7)

27˚C/W (Note 8)

Supply Voltage

6.0V

-65˚C to + 150˚C

−0.3V to V_DD+ 0.3V

Internally Limited

2000V

Storage Temperature

Input Voltage

Power Dissipation (Note 4)

ESD Susceptibility (Note 5)

ESD Susceptibility (Note 6)

Junction Temperature

Soldering Information

Small Outline Package

Vapor Phase (60 sec.)

Operating Ratings

Temperature Range

T_MIN≤ T_A≤T_MAX

Supply Voltage

200V

150˚C

−40˚C ≤ TA ≤ 85˚C

2.0 V ≤ V_DD≤ 5.5V

215˚C

Electrical Characteristics for LM4869 (Notes 2, 9)

The following specifications applies to the LM4869 when used in the circuit shown in Figure 1 and operating with V_DD= 5V and

A_V= 6dB, unless otherwise specified. Limits apply for T_A= 25˚C.

LM4869

Units

(Limits)

Limit

(Note 10)

(Note 11)

Symbol

Parameter

Conditions

Typical

(Note 9)

V_DD

Supply Voltage

2

V (min)

V (max)

mA (max)

µA (max)

mV (max)

dB

5.5

12.0

1.0

50

∞

I_DD

Quiescent Power Supply Current

Shutdown Current

V_IN= 0V, I_O= 0A, R_L

V_shutdown= GND

=

9.0

I_SD

0.1

7

V_OS

PSRR

Output Offset Voltage

Output Supply Rejection Ratio

V_DD= 5V, V_RIPPLE= 200mV_P-P

sinewave, C_BYPASS= 0.47µF,

R_L= 8Ω

62

P_O

Output Power (Note 12)

THD+N = 1% (max), f = 1kHz (Note13)

R_L= 4Ω

R_L= 8Ω

1.9

1.2

W

1.0

W (min)

THD+N = 10% (max), f = 1kHz

(Note13)

R_L= 4Ω

R_L= 8Ω

2.6

1.5

W

THD+N

S/N

Total Harmonic Distortion + Noise

Signal-to-Noise Ratio

20Hz ≤ f ≤ 20kHz

R_L= 4Ω, P_O= 2W

R_L= 8Ω, P_O= 1W

0.3

97

%

f = 1kHz, C_BYPASS= 0.47µF,

P_O= 1.1W, R_L= 8Ω

Pins 5, 7, 9, and 17

R_L= 8Ω

dB

R_IN

Input Resistance

Gain Accuracy

25

20

kΩ (min)

∆A_V

Logic Low Applied to Pin 2

Logic Low Applied to Pin 3

Logic Low Applied to Pin 2

Logic High Applied to Pin 3

Logic High Applied to Pin 2

Logic Low Applied to Pin 3

Logic High Applied to Pin 2

Logic High Applied to Pin 3

5.70

dB (min)

dB (max)

dB (min)

dB (max)

dB (min)

dB (max)

dB (min)

dB (max)

6

6.30

9.65

10

10.35

15.25

15.95

21.25

21.95

15.6

21.6

3

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Electrical Characteristics for LM4869 (Notes 2, 9) (Continued)

The following specifications applies to the LM4869 when used in the circuit shown in Figure 1 and operating with V_DD= 5V and

A_V= 6dB, unless otherwise specified. Limits apply for T_A= 25˚C.

LM4869

Units

(Limits)

Limit

(Note 10)

(Note 11)

Symbol

Parameter

Conditions

Typical

(Note 9)

∆A_{V CH-CH}Channel-to-Channel Gain Mismatch

R_L= 8Ω

Logic Low Applied to Pin 2

Logic Low Applied to Pin 3

Logic Low Applied to Pin 2

Logic High Applied to Pin 3

Logic High Applied to Pin 2

Logic Low Applied to Pin 3

Logic High Applied to Pin 2

Logic High Applied to Pin 3

0.12

0.3

dB (max)

0.12

0.3

0.12

2

Note 1: An LM4869MH that has been properly mounted to a circuit board with a copper heatsink area of at least 2in will deliver 1.9W into 4Ω.

Note 2: All voltages are measured with respect to the GND pin unless other wise specified.

Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions that

guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit

is given, however, the typical value is a good indication of device performance.

Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θ , and the ambient temperature, T . The maximum

JA

A

allowable power dissipation is P

= (T

- T /θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4869, see power derating

DMAX

JMAX A JA

currents for more information.

Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.

Note 6: Machine Model, 220pF-240pF discharged through all pins.

2

Note 7: The given θ is for an LM4869 packaged in an MXA20A with the exposed-DAP soldered to an exposed 4in area of 1oz printed circuit board copper. When

JA

2

driving 4Ω loads from a 5V supply, the LM4869MH must be mounted to the circuit board and its exposed-DAP soldered to an exposed 2in area of 1oz PCB copper.

2

Note 8: The given θ is for an LM4869 packaged in an MXA20A with the exposed DAP soldered to an exposed 8in area of 1oz printed circuit board (PCB) copper

JA

2

and two 8in inner layer ground planes in a four-layer PCB.

Note 9: Typicals are measured at 25˚C and represent the parametric norm.

Note 10: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 11: Datasheet minimum and maximum specification limits are guaranteed by design, test, or statistical analysis.

Note 12: Output power is measured at the amplifier’s package pins.

2

Note 13: When driving 4Ω loads and operating on a 5V supply, the LM4869MH must be mounted to a circuit board that has a minimum of 2.5in of exposed,

uninterrupted copper area connected to the LLP package’s exposed DAP.

External Components Description

( Refer to Figure 1.)

Components

Functional Description

1.

C_i

The input coupling capacitor blocks DC voltage at the amplifier’s inverting input terminals. C_i, along with the

LM4869’s fixed input resistance R_i(25kΩ, typ), creates a highpass filter with f_C= 1/(2πR_iC_i). Both inverting

and noninverting inputs require a C_i. Refer to the Application Information section, SELECTING EXTERNAL

COMPONENTS, for an explanation of determining the value of C_i.

2.

3.

C_S

C_B

The supply bypass capacitor. Refer to the POWER SUPPLY BYPASSING section for information about

properly placing, and selecting the value of, this capacitor.

The capacitor, C_B, filters the half-supply voltage present on the BYPASS pin. Refer to the Application

Information section, SELECTING EXTERNAL COMPONENTS, for information concerning proper placement

and selecting C_B’s value.

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4

Typical Performance Characteristics

MH Specific Characteristics

THD vs Frequency

20042898

V_DD= 5V, R_L= 4Ω, P_OUT= 1000mW,

at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

20042897

V_DD= 5V, R_L= 8Ω, P_OUT= 400mW,

at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

THD vs Frequency

THD vs Output Power

20042899

V_DD= 5V, R_L= 8Ω, P_OUT= 400mW,

at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

200428A0

V_DD= 5V, R_L= 4Ω, f_IN= 20Hz,

at (from top to bottom at 100mW):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 6dB, A_V= 10dB

A_V= 10dB, A_V= 6dB

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

THD vs Output Power

200428A1

V_DD= 5V, R_L= 4Ω, f_IN= 1kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

200428A2

V_DD= 5V, R_L= 4Ω, f_IN= 20kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

THD vs Output Power

200428A3

V_DD= 5V, R_L= 8Ω, f_IN= 20Hz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

200428A4

V_DD= 5V, R_L= 8Ω, f_IN= 1kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

THD vs Output Power

Output Power vs Supply Voltage

200428C3

200428A5

V_DD= 5V, R_L= 8Ω, f_IN= 20kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

R_L= 4Ω, f_IN= 1kHz,

at (from top to bottom at 4V):

THD+N = 10%, THD+N = 1%

A_V= 10dB, A_V= 6dB

Output Power vs Supply Voltage

PSRR vs Frequency

200428C4

R_L= 8Ω, f_IN= 1kHz,

at (from top to bottom at 4V):

THD+N = 10%, THD+N = 1%

200428A8

V_DD= 5V, R_L= 4Ω, R_SOURCE= 10Ω

V_RIPPLE= 200mV_P-P, at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

PSRR vs Frequency

THD vs Frequency

200428A9

V_DD= 5V, R_L= 8Ω, R_SOURCE= 10Ω

V_RIPPLE= 200mV_P-P, at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

200428B0

V_DD= 3V, R_L= 4Ω, P_OUT= 150mW,

at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

THD vs Frequency

THD vs Output Power

200428B1

V_DD= 3V, R_L= 8Ω, P_OUT= 150mW,

at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

200428B3

V_DD= 3V, R_L= 4Ω, f_IN= 1kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 6dB,

A_V= 10dB, A_V= 6dB

A_V= 15.6dB, A_V= 10dB

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8

Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

THD vs Output Power

200428B2

V_DD= 3V, R_L= 4Ω, f_IN= 20Hz,

at (from top to bottom at 100mW):

A_V= 21.6dB, A_V= 15.6dB,

200428B4

V_DD= 3V, R_L= 4Ω, f_IN= 20kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

A_V= 6dB, A_V= 10dB

THD vs Output Power

200428B5

V_DD= 3V, R_L= 8Ω, f_IN= 20Hz,

at (from top to bottom at 100mW):

A_V= 21.6dB, A_V= 6dB,

200428B6

V_DD= 3V, R_L= 8Ω, f_IN= 1kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 6dB, A_V= 10dB

A_V= 15.6dB, A_V= 10dB

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

THD vs Output Power

PSRR vs Frequency

200428B8

200428B7

V_DD= 3V, R_L= 8Ω, f_IN= 20kHz,

at (from top to bottom at 200mW):

A_V= 21.6dB, A_V= 15.6dB,

V_DD= 3V, R_L= 4Ω, R_SOURCE= 10Ω,

V_RIPPLE= 200mV_P-P, at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

Output Power vs

Load Resistance

PSRR vs Frequency

200428C0

f_IN= 1kHz, at (from top to bottom at 20Ω):

V_DD= 5V, THD = 10%; V_DD= 5V, THD = 1%;

V_DD= 3V, THD = 10%; V_DD= 3V, THD = 1%

200428B9

V_DD= 3V, R_L= 8Ω, R_SOURCE= 10Ω,

V_RIPPLE= 200mV_P-P, at (from top to bottom at 1kHz):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

Channel-to-Channel gain Mismatch

vs Power Supply Voltage

Channel-to-Channel gain Mismatch

vs Power Supply Voltage

200428C1

R_L= 4Ω, f_IN= 1kHz,

at (from top to bottom at 4V):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

200428C2

R_L= 8Ω, f_IN= 1kHz,

at (from top to bottom at 4V):

A_V= 21.6dB, A_V= 15.6dB,

A_V= 10dB, A_V= 6dB

Dropout Voltage

vs Power Supply Voltage

200428C5

R_L= 8Ω, f_IN= 1kHz, both channels driven and loaded

at (from top to bottom at 4V):

200428C6

R_L= 4Ω, f_IN= 1kHz, both channels driven and loaded

at (from top to bottom at 4V):

positive signal swing, negative signal swing

11

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

Amplifier Power Dissipation

vs Amplifier Load Dissipation

Amplifier Power Dissipation

vs Amplifier Load Dissipation

200428C8

200428C7

V_DD= 5V, f_IN= 1kHz, at (from top to bottom at 1W):

R_L= 4Ω, R_L= 8Ω, single channel driven and loaded

V_DD= 3V, f_IN= 1kHz, at (from top to bottom at 0.3W):

R_L= 4Ω, R_L= 8Ω, single channel driven and loaded

Cross Talk vs Frequency

200428C9

V_DD= 5V, R_L= 8Ω, A_V= 6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

200428D0

V_DD= 5V, R_L= 8Ω, A_V= 10dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

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12

Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

Cross Talk vs Frequency

200428D1

V_DD= 5V, R_L= 8Ω, A_V= 15.6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

200428D2

V_DD= 5V, R_L= 8Ω, A_V= 21.6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

Cross Talk vs Frequency

200428D3

V_DD= 3V, R_L= 8Ω, A_V= 6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

200428D4

V_DD= 3V, R_L= 8Ω, A_V= 10dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

13

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Typical Performance Characteristics

MH Specific Characteristics ^(Continued)

Cross Talk vs Frequency

200428D5

V_DD= 3V, R_L= 8Ω, A_V= 15.6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

200428D6

V_DD= 3V, R_L= 8Ω, A_V= 21.6dB,

A = Left channel driven, right channel measured;

B = Right channel driven, left channel measured

Power Dissipation Derating Curves

200428E4

V_DD= 5V, R_L= 8Ω, f_IN= 1kHz,

(from top to bottom at 40˚C): 3in x 3in four-layer PCB

with bottom and two inner layers connected to the package’s DAP,

1.5in x 1.5in two-layer PCB with bottom and top layer

planes connected to the package’s DAP

as load impedance decreases. Therefore, to maintain the

Application Information

highest load dissipation and widest output voltage swing,

PCB traces that connect the output pins to a load must be as

wide as possible.

PCB LAYOUT AND SUPPLY REGULATION

CONSIDERATIONS FOR DRIVING 3W AND 4W LOADS

Poor power supply regulation also adversely affects maxi-

mum output power. A poorly regulated supply’s output volt-

age decreases with increasing load current. Reduced supply

voltage causes decreased headroom, output signal clipping,

and reduced output power. Even with tightly regulated sup-

plies, trace resistance creates the same effects as poor

supply regulation. Therefore, making the power supply

traces as wide as possible helps maintain full output voltage

swing.

Power dissipated by a load is a function of the voltage swing

across the load and the load’s impedance. As load imped-

ance decreases, load dissipation becomes increasingly de-

pendent on the interconnect (PCB trace and wire) resistance

between the amplifier output pins and the load’s connec-

tions. Residual trace resistance causes a voltage drop,

which results in power dissipated in the trace and not in the

load as desired. For example, 0.1Ω trace resistance reduces

the output power dissipated by a 4Ω load from 2.1W to 2.0W.

This problem of decreased load dissipation is exacerbated

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14

Application Information (Continued)

BRIDGE CONFIGURATION EXPLANATION

For the exposed DAP TSSOP package, θ_JA= 41˚C/W.

T_JAMAX= 150˚C for the LM4869. For a given ambient tem-

perature T_A, Equation (4) can be used to find the maximum

internal power dissipation supported by the IC packaging. If

the result of Equation (3) is greater than that of Equation (4),

decrease the supply voltage, increase the load impedance,

or reduce the ambient temperature. For a typical application

with a 5V power supply and an 8Ω load, the maximum

ambient temperature that does not violate the maximum

junction temperature is approximately 68˚C. This further as-

sumes that a device is a surface mount part operating

around the maximum power dissipation point. Since internal

power dissipation is a function of output power, higher am-

bient temperatures are allowed as output power decreases.

Refer to the Typical Performance Characteristics curves for

power dissipation information at lower output power levels.

As shown in Figure 1, each of the LM4869’s stereo channels

consists of two operational amplifiers. The LM4869 can be

used to drive a speaker connected between the two outputs

of each channel’s amplifiers.

Figure 1 shows that the output of Amp1 serves as the input

to Amp2, which results in both amplifiers producing signals

identical in magnitude, but 180˚ out of phase. Taking advan-

tage of this phase difference, a load is placed between

OUT+ and OUT- and driven differentially (commonly referred

to as ’bridge mode’). This results in a differential gain of

A_VD= 2(R_F/R_I)

(1)

Bridge mode is different from single-ended amplifiers that

drive loads connected between a single amplifier’s output

and ground. For a given supply voltage, bridge mode has a

distinct advantage over the single-ended configuration: its

differential output doubles the voltage swing across the load.

This results in four times the output power when compared

to a single-ended amplifier under the same conditions. This

increase in attainable output assumes that the amplifier is

not current limited or the output signal is not clipped. To

ensure minimum output signal clipping when selecting one

of the amplifier’s four closed-loop gains, refer to the Audio

Power Amplifier Design section.

BTL GAIN SELECTION

The LM4869 features four fixed, internally set, BTL voltage

gains: 6dB, 10dB, 15.6dB, and 21.6dB. Select one of the

four gains by applying a logic level signal to the GAIN0

(MSB) and GAIN1 (LSB) digital inputs.

The closed-loop gain of the first amplifier is adjustable, hav-

ing four different gains, whereas two internal 20kΩ resistors

set the second amplifier’s gain at -1. Table 1 below, shows

the state of the two logic inputs required to select one of the

four gain values.

GAIN 0

GAIN 1

Selected Gain (dB)

Another advantage of the differential bridge output is no net

DC voltage across the load. This results from biasing OUT+

and OUT- at half-supply. This eliminates the coupling capaci-

tor that single supply, single-ended amplifiers require. Elimi-

nating an output coupling capacitor in a single-ended con-

figuration forces a single supply amplifier’s half-supply bias

voltage across the load. The current flow created by the

half-supply bias voltage increases internal IC power dissipa-

tion and may permanently damage loads such as speakers.

0

1

0

1

0

1

6

10

15.6

21.6

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. The capacitors connected to the bypass and power

supply pins should be placed as close to the LM4869 as

possible. The capacitor connected between the bypass pin

and ground improves the internal bias voltage’s stability,

producing improved PSRR. The improvements to PSRR

increase as the bypass pin capacitor value increases.

POWER DISSIPATION

Power dissipation is a major concern when designing a

successful bridged or single-ended amplifier. Equation (2)

states the maximum power dissipation point for a single-

ended amplifier operating at a given supply voltage and

driving a specified output load.

Typical applications employ a 5V regulator with 10µF and a

0.1µF filter capacitors that aid in supply stability. Their pres-

ence, however, does not eliminate the need for bypassing

the LM4869’s supply pins. The selection of bypass capacitor

values, especially C_B, depends on desired PSRR require-

ments, click and pop performance (as explained in theSe-

lecting External Components section), system cost, and

size constraints.

P_DMAX= (V_DD)²/(2π²R_L) Single-Ended

(2)

However, a direct consequence of the increased power de-

livered to the load by a bridge amplifier is an increase in the

internal power dissipation point for a bridge amplifier oper-

ating at the same given conditions.

P_DMAX= 4 (V_DD)²/(2π²R_L) Bridge Mode

(3)

*

MICRO-POWER SHUTDOWN

The LM4869 features an active-low micro-power shutdown

mode. The voltage applied to the SHUTDOWN pin controls

the LM4869’s shutdown function. Activate micro-power shut-

down by applying 0V to the SHUTDOWN pin. The logic

threshold is typically 0.4V for a logic low and 1.5V for a logic

high. When active, the LM4869’s micro-power shutdown

feature turns off the amplifier’s bias circuitry, disables the

internal V_DD/2 generator, and forces the amplifier outputs

into a high impedance state. The result is greatly reduced

power supply current. The low 0.1µA typical shutdown cur-

rent is achieved by applying a voltage to the SHUTDOWN

The LM4869 has four operational amplifiers in one package

and the maximum internal power dissipation is four times

that of a single-ended amplifier. From Equation (3), assum-

ing a 5V power supply and an 8Ω load, the maximum power

dissipation point is 2W. The maximum power dissipation

point obtained from Equation (3) must not exceed the power

dissipation predicted by Equation (4):

P_DMAX= (T_JMAX− T_A)/θ_JA

(4)

15

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magnitude of the transient is proportional to the value of, and

more importantly, the mismatch between, the capacitors

connected to a given pair of inverting and non-inverting

inputs. The better the match, the less the transient magni-

tude.

Application Information (Continued)

pin that is as near to GND as possible. A voltage that is

greater than GND may increase the shutdown current.

There are a few methods to control the micro-power shut-

down. These include using a single-pole, single-throw switch

(SPST), a microprocessor, or a microcontroller. When using

a switch, connect a 100kΩ pull-down resistor between the

SHUTDOWN pin and GND and the SPST switch between

the SHUTDOWN pin and V_DD. Select normal amplifier op-

eration by closing the switch. Opening the switch applies

GND to the SHUTDOWN pin, activating micro-power shut-

down. The switch and resistor guarantee that the SHUT-

DOWN pin will not float. This prevents unwanted state

changes. In a system with a microprocessor or a microcon-

troller, use a digital output to apply the active-state voltage to

the SHUTDOWN pin. Driving the SHUTDOWN pin with ac-

tive circuitry eliminates the pull-down resistor.

Higher value capacitors need more time to reach a quiescent

DC voltage (usually V_DD/2) when charged with a fixed cur-

rent. This fixed current is supplied through amplifiers input

pins. Thus, selecting an input capacitor value that is no

higher than necessary to meet the desired -3dB frequency

will reduce turn-on time and help ensure that transients are

minimized.

The LM4869’s nominal input resistance (R_i) is 25kΩ (20kΩ,

minimum) and the input capacitor, C_i, form high pass filter

with a -3dB low frequency limit defined by equation (5).

f_-3dB= 1/2π(25kΩ)C_i

(5)

Table 1. LOGIC LEVEL TRUTH TABLE FOR

SHUTDOWN OPERATION

As an example when using a speaker with a low frequency

limit of 150Hz, C_I, is 0.047µF. The 0.47µF C_Ishown in Figure

1 allows the LM4869 to drive high efficiency, full range

speaker whose response extends below 30Hz.

SHUTDOWN

OPERATIONAL

MODE

High

Full Power, stereo

BTL amplifiers

Micro-power

Shutdown

Bypass Capacitor Value Selection

Besides optimizing the input capacitor value, careful consid-

eration should be paid to value of C_B, the capacitor con-

nected between the BYPASS pin and ground. Since C_B

determines how fast the LM4869 settles to its quiescent

operating state, its value is critical when minimizing turn-on

Low

transients. The slower the LM4869’s outputs ramp to their

SELECTING PROPER EXTERNAL COMPONENTS

1

quiescent DC voltage (nominally

⁄2 V_DD), the smaller the

Optimizing the LM4869’s performance requires properly se-

lecting external components. Though the LM4869 operates

well when using external components with wide tolerances,

best performance is achieved by optimizing component val-

ues. The LM4869 is unity-gain stable, giving a designer

maximum design flexibility. The gain should be set to no

more than a given application requires. This allows the am-

plifier to achieve minimum THD+N and maximum signal-to-

noise ratio. These parameters are compromised as the

closed-loop gain increases. However, low gain demands

input signals with greater voltage swings to achieve maxi-

mum output power. Fortunately, many signal sources such

as audio CODECs have outputs of 1V_RMS(2.83V_P-P).

Please refer to the Audio Power Amplifier Design section for

more information on selecting the proper gain.

turn-on transient. Choosing C_Bequal to 0.47µF along with a

small value of C_i(in the range of 0.047µF to 0.47µF), pro-

duces a transient-free turn-on and shutdown function. As

discussed above, choosing C_ino larger than necessary for

the desired bandwidth helps minimize turn-on transients.

OPTIMIZING OUTPUT TRANSIENT REDUCTION (CLICK

AND POP PERFORMANCE)

The LM4869 contains circuitry to minimize turn-on and shut-

down transients or ’clicks and pop’. For this discussion,

turn-on refers to either applying the power supply voltage or

when the shutdown mode is deactivated. While the power

supply voltage is ramping to its final value, the LM4869’s

internal amplifiers are configured as unity gain buffers. An

internal current source changes the voltage of the BYPASS

pin in a controlled, linear manner. Ideally, the amplifier inputs

and outputs track the voltage applied to the BYPASS pin.

The gain of the internal amplifiers remains unity until the

voltage on the bypass pin reaches 1/2 V_DD. As soon as the

voltage on the BYPASS pin is stable, the device becomes

fully operational. Although the bypass pin current can not be

modified, changing the size of C_Balters the device’s turn-on

time and the magnitude of output transients. Increasing the

value of C_Breduces the magnitude of turn-on transients.

However, this presents a tradeoff: as the size of C_Bin-

creases, the turn-on time increases. There is a linear rela-

tionships between the size of C_B+ 2(C_I) and the turn-on

time. The table shows some typical turn-on times for various

values of C_B:

Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires high value

input coupling capacitors (C_I, C₂and C₃, C₄) in Figure 1. A

high value capacitor can be expensive and may compromise

space efficiency in portable designs. In many cases, how-

ever, the speakers used in portable systems, whether inter-

nal or external, have little ability to reproduce signals with

frequencies below 150Hz. Applications using speakers with

this limited frequency response reap little improvement by

using large input capacitor.

Besides effecting system cost and size, CI - C4 can also

affect on the LM4869’s turn-on and turn-off transient (’click

and pop’) performance. When the supply voltage is first

applied, a transient may be created as the charge on the

input capacitor changes from zero to a quiescent state. The

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16

After satisfying the LM4869’s power dissipation require-

ments, the minimum differential gain is found using Equation

(8).

Application Information (Continued)

Ton

C_B

C_i= 0.47µF

110ms

C_i= 0.33µF

80ms

0.01µF

0.1µF

120ms

90ms

(8)

0.22µF

0.47µF

1.0µF

140ms

100ms

140ms

210ms

170ms

Thus, a minimum gain of 2.83 allows the LM4869’s to reach

full output swing and maintain low noise and THD+N perfor-

mance. For this example, let A_VD= 3. In the example design,

the gain will be set to 10dB (A_VD= 3.2) by applying a logic

low to GAIN 0 and a logic high to GAIN 1.

240ms

In order eliminate ’clicks and pops’, all capacitors must be

discharged before turn-on. Rapidly switching V_DDmay not

allow the capacitors to fully discharge, which may cause

’clicks and pops’.

The last step in this design example is setting the amplifier’s

-3dB frequency bandwidth. To achieve the desired 0.25dB

pass band magnitude variation limit, the low frequency re-

sponse must extend to at least one-fifth the lower bandwidth

limit and the high frequency response must extend to at least

five times the upper bandwidth limit. This extended bandwith

produces a gain variation of -0.17dB at the bandwith’s limits,

well within the 0.25dB desired limit. The results are an

AUDIO POWER AMPLIFIER DESIGN

Audio Amplifier Design: Driving 1W into an 8Ω Load

The following are the desired operational parameters:

Power Output:

Load Impedance:

Input Level:

1 W_RMS

8Ω

1 V_RMS

f_L= 100Hz/5 = 20Hz

(9)

Input Impedance:

Bandwidth:

20 kΩ

and an

100 Hz−20 kHz 0.25 dB

f_H= 20kHz x 5 = 100kHz

(10)

The design begins by specifying the minimum supply voltage

necessary to obtain the desired output power. One way to

find the minimum supply voltage is to use the Output Power

vs Supply Voltage curve in the Typical Performance Char-

acteristics section. Another way, using Equation (6), is to

calculate the peak output voltage necessary to achieve the

desired output power for a given load impedance. To ac-

count for the amplifier’s dropout voltage, two additional volt-

ages, based on the Dropout Voltage vs Supply Voltage in the

Typical Performance Characteristics curves, must be

added to the result obtained by Equation (6). The result is

Equation (7).

As mentioned in the External Components section, the inter-

nal input resistor and C_icreate a high pass filter that sets the

amplifier’s lower bandpass frequency limit. Find the coupling

capacitor’s value using Equation (11).

f_-3dB= 1/2π(20kΩ)C_I

(11)

The result is (using the minimum R_INresistor value to ensure

correct magnitude response at 20Hz)

*

1/(2π 20kΩ 20Hz) = 0.398µF

(12)

Use a 0.39µF capacitor, the closest standard value. The

product of the desired high frequency cutoff (100kHz in this

example) and the differential gain, A_VD, determines the up-

(6)

per passband response limit. With A_VD= 3.2 and f_H

=

V_DD≥ (V_OUTPEAK+ (V_OD

+ V_OD_BOT))

(7)

TOP

100kHz, the closed-loop gain bandwidth product (GBWP) is

320kHz. This is less than the LM4869’s 3.5MHz GBWP. With

this margin, the amplifier can be used in designs that require

more differential gain while avoiding performance-restricting

bandwidth limitations.

The Output Power vs Supply Voltage graph for an 8Ω load

indicates a minimum supply voltage of 4.6V. This is easily

met by the commonly used 5V supply voltage. The additional

voltage creates the benefit of headroom, allowing the

LM4869 to produce peak output power in excess of 1W

without clipping or other audible distortion. The choice of

supply voltage must also not create a situation that violates

of maximum power dissipation as explained above in the

Power Dissipation section.

17

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RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT

Figures 2 through 6 show the recommended four-layer PC board layout that is optimized for the 20-pin MH-packaged LM4869

and associated external components. This circuit is designed for use with an external 5V supply and 3Ω (or higher) speakers (or

load resistors).

This circuit board is easy to use. Apply 5V and ground to the board’s V_DDand GND terminals, respectively. Connect speakers (or

load resistors) between the board’s -OUTA and +OUTA and -OUTB and +OUTB pads. Apply balanced differential stereo input

signals to the input pins labeled ’-INA,’ ’+INA,’ ’-INB,’ and ’+INB.’

200428D7

200428D9

FIGURE 2. Recommended MH PC Board Layout:

FIGURE 4. Recommended MH PC Board Layout:

Upper Inner-Layer Layout

Component-Side Silkscreen

200428D8

200428E0

FIGURE 3. Recommended MH PC Board Layout:

Component-Side Layout

FIGURE 5. Recommended MH PC Board Layout:

Lower Inner-Layer Layout

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18

200428E1

FIGURE 6. Recommended MH PC Board Layout:

Bottom-Side Layout

19

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Physical Dimensions inches (millimeters) unless otherwise noted

Exposed-DAP TSSOP Package

Order Number LM4869MH

NS Package Number MXA20A for Exposed-DAP TSSOP

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

National Semiconductor

Corporation

Americas

National Semiconductor

Europe

National Semiconductor

Asia Pacific Customer

Response Group

Tel: 65-2544466

Fax: 65-2504466

National Semiconductor

Japan Ltd.

Tel: 81-3-5639-7560

Fax: 81-3-5639-7507

Fax: +49 (0) 180-530 85 86

Email: support@nsc.com

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +44 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

Email: ap.support@nsc.com

www.national.com

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.


型号：	LM4869
厂家：	National Semiconductor
描述：	1.9W Differential Input, BTL Output Stereo Audio Amplifier with Selectable Gain and Shutdown 1.9W差分输入， BTL输出立体声音频放大器，具有可选增益和关机音频放大器
文件：	总20页 (文件大小：833K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LM4869 [NSC]

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