LM4901MM [NSC]

1.6 Watt Audio Power Amplifier with Selectable Shutdown Logic Level; 1.6瓦音频功率放大器可选关断逻辑电平
LM4901MM
型号: LM4901MM
厂家: National Semiconductor    National Semiconductor
描述:

1.6 Watt Audio Power Amplifier with Selectable Shutdown Logic Level
1.6瓦音频功率放大器可选关断逻辑电平

放大器 功率放大器
文件: 总24页 (文件大小:1178K)
中文:  中文翻译
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December 2002  
LM4901  
1.6 Watt Audio Power Amplifier with Selectable  
Shutdown Logic Level  
General Description  
Key Specifications  
The LM4901 is an audio power amplifier primarily designed  
for demanding applications in mobile phones and other por-  
table communication device applications. It is capable of  
delivering 1 watt of continuous average power to an 8BTL  
load and 1.6 watts of continuous avearge power to a 4BTL  
load with less than 1% distortion (THD+N) from a 5VDC  
power supply.  
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j
j
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Improved PSRR at 217Hz & 1KHz  
Power Output at 5.0V, 1% THD, 4Ω  
Power Output at 5.0V, 1% THD, 8Ω  
Power Output at 3.0V, 1% THD, 4Ω  
Power Output at 3.0V, 1% THD, 8Ω  
Shutdown Current  
62dB  
1.6W (typ)  
1.07W (typ)  
525mW (typ)  
390mW (typ)  
0.1µA (typ)  
Boomer audio power amplifiers were designed specifically to  
provide high quality output power with a minimal amount of  
external components. The LM4901 does not require output  
coupling capacitors or bootstrap capacitors, and therefore is  
ideally suited for mobile phone and other low voltage appli-  
cations where minimal power consumption is a primary re-  
quirement.  
Features  
n Available in space-saving packages: LLP, micro SMD,  
and MSOP  
n Ultra low current shutdown mode  
n BTL output can drive capacitive loads  
n Improved pop & click circuitry eliminates noise during  
turn-on and turn-off transitions  
n 2.0 - 5.5V operation  
n No output coupling capacitors, snubber networks or  
bootstrap capacitors required  
n Unity-gain stable  
n External gain configuration capability  
n User selectable shutdown High or Low logic Level  
The LM4901 features a low-power consumption shutdown  
mode. To facilitate this, Shutdown may be enabled by either  
logic high or low depending on mode selection. Driving the  
shutdown mode pin either high or low enables the shutdown  
pin to be driven in a likewise manner to enable shutdown.  
The LM4901 contains advanced pop & click circuitry which  
eliminates noise which would otherwise occur during turn-on  
and turn-off transitions.  
The LM4901 is unity-gain stable and can be configured by  
external gain-setting resistors.  
Applications  
n Mobile Phones  
n PDAs  
n Portable electronic devices  
Typical Application  
20019801  
FIGURE 1. Typical Audio Amplifier Application Circuit  
Boomer® is a registered trademark of National Semiconductor Corporation.  
© 2002 National Semiconductor Corporation  
DS200198  
www.national.com  
Connection Diagrams  
9 Bump micro SMD  
Mini Small Outline (MSOP) Package  
20019823  
20019836  
Top View  
Top View  
Order Number LM4901IBL, LM4901IBLX  
See NS Package Number BLA09AAC  
Order Number LM4901MM  
See NS Package Number MUB10A  
LLP Package  
micro SMD Marking  
20019870  
Top View  
X - Date Code  
T - Die Traceability  
G - Boomer Family  
Q - LM4901IBL  
200198B3  
Top View  
Order Number LM4901LD  
See NS Package Number LDA10B  
MSOP Marking  
LLP Marking  
20019871  
Top View  
200198B4  
Top View  
G - Boomer Family  
C1 - LM4901MM  
Z - Plant Code  
XY - Date Code  
TT - Die Traceability  
Bottom Line - Part Number  
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2
Absolute Maximum Ratings (Note 2)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
θJA (MSOP)  
θJA (LLP)  
190˚C/W  
63˚C/W (Note 14)  
12˚C/W (Note 14)  
θJC (LLP)  
Soldering Information  
Supply Voltage (Note 11)  
Storage Temperature  
Input Voltage  
6.0V  
−65˚C to +150˚C  
−0.3V to VDD +0.3V  
Internally Limited  
2000V  
See AN-1112 "microSMD Wafers Level Chip Scale  
Package."  
See AN-1187 "Leadless  
Power Dissipation (Notes 3, 13)  
ESD Susceptibility (Note 4)  
ESD Susceptibility (Note 5)  
Junction Temperature  
Thermal Resistance  
Leadframe Package (LLP)."  
200V  
Operating Ratings  
Temperature Range  
150˚C  
TMIN TA TMAX  
−40˚C TA 85˚C  
2.0V VDD 5.5V  
θJA (micro SMD) (Note 12)  
θJC (MSOP)  
180˚C/W  
56˚C/W  
Supply Voltage  
Electrical Characteristics VDD = 5V (Notes 1, 2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.  
LM4901  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Note 6)  
(Notes 7, 9)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VSD Mode (Note 8)  
VSD MODE = VDD  
3
7
mA (max)  
mA (max)  
µA (max)  
V (min)  
V (max)  
V (min)  
V (max)  
mV (max)  
k(max)  
k(min)  
W (min)  
W
IDD  
Quiescent Power Supply Current  
4
10  
2.0  
ISD  
Shutdown Current  
0.1  
1.5  
1.3  
1.5  
1.3  
7
VSDIH  
VSDIL  
VSDIH  
VSDIL  
VOS  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Output Offset Voltage  
VSD MODE = VDD  
VSD MODE = GND  
VSD MODE = GND  
50  
9.7  
7.0  
0.9  
ROUT  
Resistor Output to GND (Note 10)  
8.5  
Output Power (8)  
THD = 1% (max); f = 1 kHz  
1.07  
1.6  
Po  
(4) (Notes 14, 15) THD = 1% (max); f = 1 kHz  
TWU  
Wake-up time  
100  
0.2  
mS (max)  
%
THD+N  
Total Harmonic Distortion+Noise  
Power Supply Rejection Ratio  
Po = 0.5 Wrms; f = 1kHz  
Vripple = 200mV sine p-p  
Input terminated with 10Ω  
60 (f =  
PSRR  
217Hz)  
55  
dB (min)  
64 (f = 1kHz)  
Electrical Characteristics VDD = 3V (Notes 1, 2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.  
LM4901  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Note 6)  
(Notes 7, 9)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VSD Mode (Note 8)  
VSD MODE = VDD  
2
7
9
mA (max)  
mA (max)  
µA (max)  
V (min)  
IDD  
Quiescent Power Supply Current  
3
ISD  
Shutdown Current  
0.1  
1.1  
0.9  
1.3  
1.0  
7
2.0  
VSDIH  
VSDIL  
VSDIH  
VSDIL  
VOS  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Output Offset Voltage  
VSD MODE = VDD  
V (max)  
V (min)  
VSD MODE = GND  
VSD MODE = GND  
V (max)  
mV (max)  
50  
3
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Electrical Characteristics VDD = 3V (Notes 1, 2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA  
25˚C. (Continued)  
=
LM4901  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Typical  
Limit  
(Notes 7, 9)  
9.7  
(Note 6)  
ROUT  
k(max)  
k(min)  
mW  
Resistor Output to GND (Note 10)  
8.5  
7.0  
Output Power (8)  
(4)  
THD = 1% (max); f = 1 kHz  
THD = 1% (max); f = 1 kHz  
390  
525  
75  
Po  
mW  
TWU  
Wake-up time  
mS (max)  
%
THD+N  
Total Harmonic Distortion+Noise  
Po = 0.25 Wrms; f = 1kHz  
Vripple = 200mV sine p-p  
Input terminated with 10Ω  
0.1  
62 (f =  
PSRR  
Power Supply Rejection Ratio  
217Hz)  
55  
dB (min)  
68 (f = 1kHz)  
Electrical Characteristics VDD = 2.6V (Notes 1, 2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA = 25˚C.  
LM4901  
Units  
(Limits)  
Symbol  
Parameter  
Conditions  
Typical  
(Note 6)  
2.0  
Limit  
(Notes 7, 9)  
VIN = 0V, Io = 0A, No Load  
VIN = 0V, Io = 0A, 8Load  
VSD = VSD Mode (Note 8)  
VSD MODE = VDD  
mA (max)  
mA (max)  
µA (max)  
V (min)  
IDD  
Quiescent Power Supply Current  
3.0  
ISD  
Shutdown Current  
0.1  
VSDIH  
VSDIL  
VSDIH  
VSDIL  
VOS  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Shutdown Voltage Input High  
Shutdown Voltage Input Low  
Output Offset Voltage  
1.0  
VSD MODE = VDD  
0.9  
V (max)  
V (min)  
VSD MODE = GND  
1.2  
VSD MODE = GND  
1.0  
V (max)  
mV (max)  
k(max)  
k(min)  
5
50  
9.7  
7.0  
ROUT  
Resistor Output to GND (Note 10)  
8.5  
Po  
Output Power ( 8)  
( 4)  
THD = 1% (max); f = 1 kHz  
THD = 1% (max); f = 1 kHz  
275  
340  
70  
mW  
TWU  
Wake-up time  
mS (max)  
%
THD+N  
Total Harmonic Distortion+Noise  
Po = 0.15 Wrms; f = 1kHz  
Vripple = 200mV sine p-p  
Input terminated with 10Ω  
0.1  
51 (f =  
PSRR  
Power Supply Rejection Ratio  
217Hz)  
dB (min)  
51 (f = 1kHz)  
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified.  
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which  
guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit  
is given, however, the typical value is a good indication of device performance.  
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by T  
, θ , and the ambient temperature T . The maximum  
A
JMAX JA  
allowable power dissipation is P  
= (T  
–T )/θ or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4901, see power derating  
DMAX  
JMAX A JA  
curves for additional information.  
Note 4: Human body model, 100 pF discharged through a 1.5 kresistor.  
Note 5: Machine Model, 220 pF–240 pF discharged through all pins.  
Note 6: Typicals are measured at 25˚C and represent the parametric norm.  
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).  
Note 8: For micro SMD only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I by a maximum of 2µA.  
SD  
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.  
Note 10: R  
is measured from the output pin to ground. This value represents the parallel combination of the 10koutput resistors and the two 20kresistors.  
ROUT  
Note 11: If the product is in Shutdown mode and V exceeds 6V (to a max of 8V V ), then most of the excess current will flow through the ESD protection circuits.  
DD  
DD  
If the source impedance limits the current to a max of 10mA, then the device will be protected. If the device is enabled when V is greater than 5.5V and less than  
DD  
6.5V, no damage will occur, although operation life will be reduced. Operation above 6.5V with no current limit will result in permanent damage.  
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4
Electrical Characteristics VDD = 2.6V (Notes 1, 2)  
The following specifications apply for the circuit shown in Figure 1, unless otherwise specified. Limits apply for TA  
25˚C. (Continued)  
=
Note 12: All bumps have the same thermal resistance and contribute equally when used to lower thermal resistance. The LM4901IBL demo board (views featured  
in the Application Information section) has two inner layers, one for V and one for GND. The planes each measure 611mils x 661mils (15.52mm x 16.79mm)  
DD  
and aid in spreading heat due to power dissipation within the IC.  
Note 13: Maximum power dissipation in the device (P  
) occurs at an output power level significantly below full output power. P  
can be calculated using  
DMAX  
DMAX  
Equation 1 shown in the Application Information section. It may also be obtained from the power dissipation graphs.  
Note 14: The Exposed-DAP of the LDA10B package should be electrically connected to GND or an electrically isolated copper area. the LM4901LD demo board  
(views featured in the Application Information section) has the Exposed-DAP connected to GND with a PCB area of 86.7mils x 585mils (2.02mm x 14.86mm) on  
the copper top layer and 550mils x 710mils (13.97mm x 18.03mm) on the copper bottom layer.  
Note 15: The thermal performance of the LLP package (LM4901LD) when used with the exposed-DAP connected to a thermal plane is sufficient for driving 4Ω  
loads. The LM4901LD demo board (views featured in the Application Information section) can drive 4loads at the maximum power dissipation point (1.267W)  
without thermal shutdown circuitry being activated. The other available packages (MSOP & micro SMD) do not have the thermal performance necessary for driving  
4loads with a 5V supply and are not recommended for this application.  
External Components Description  
(Figure 1)  
Components  
Functional Description  
1.  
Ri  
Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a  
high pass filter with Ci at fC= 1/(2π RiCi).  
2.  
Ci  
Input coupling capacitor which blocks the DC voltage at the amplifiers input terminals. Also creates a  
highpass filter with Ri at fc = 1/(2π RiCi). Refer to the section, Proper Selection of External Components,  
for an explanation of how to determine the value of Ci.  
3.  
4.  
Rf  
Feedback resistance which sets the closed-loop gain in conjunction with Ri.  
CS  
Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing  
section for information concerning proper placement and selection of the supply bypass capacitor.  
Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of External  
Components, for information concerning proper placement and selection of CB.  
5.  
CB  
Typical Performance Characteristics  
THD+N vs Frequency  
THD+N vs Frequency  
at VDD = 5V, 8RL, and PWR = 500mW  
at VDD = 3V, 8RL, and PWR = 250mW  
20019830  
20019831  
5
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Typical Performance Characteristics (Continued)  
THD+N vs Frequency  
THD+N vs Frequency  
at VDD = 2.6V, 8RL, and PWR = 150mW  
at VDD = 2.6V, 4RL, and PWR = 150mW  
20019832  
20019833  
THD+N vs Power Out  
THD+N vs Power Out  
at VDD = 5V, 8RL, 1kHz  
at VDD = 3V, 8RL, 1kHz  
20019834  
20019883  
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6
Typical Performance Characteristics (Continued)  
THD+N vs Power Out  
THD+N vs Power Out  
at VDD = 2.6V, 8RL, 1kHz  
at VDD = 2.6V, 4RL, 1kHz  
20019884  
20019885  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
at VDD = 5V, 8RL  
at VDD = 5V, 8RL  
20019886  
20019887  
Input terminated with 10Ω  
Input Floating  
7
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Typical Performance Characteristics (Continued)  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
at VDD = 3V, 8RL  
at VDD = 3V, 8RL  
20019888  
20019889  
Input terminated with 10Ω  
Input Floating  
Power Supply Rejection Ratio (PSRR) vs Frequency  
Power Supply Rejection Ratio (PSRR) vs Frequency  
at VDD = 2.6V, 8RL  
at VDD = 2.6V, 8RL  
20019890  
20019891  
Input terminated with 10Ω  
Input Floating  
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8
Typical Performance Characteristics (Continued)  
Open Loop Frequency Response, 5V  
Open Loop Frequency Response, 3V  
20019892  
20019893  
Noise Floor, 5V, 8Ω  
80kHz Bandwidth, Input to GND  
Open Loop Frequency Response, 2.6V  
20019894  
20019895  
Power Derating Curves  
Power Dissipation vs  
Output Power, VDD=5V  
20019869  
200198B5  
9
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Typical Performance Characteristics (Continued)  
Power Dissipation vs  
Output Power, VDD=3V  
Power Dissipation vs  
Output Power, VDD=2.6V  
200198B6  
200198B7  
Shutdown Hysteresis Voltage  
5V, SD Mode = VDD (High)  
Shutdown Hysteresis Voltage  
5V, SD Mode = GND (Low)  
200198A0  
200198A1  
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10  
Typical Performance Characteristics (Continued)  
Shutdown Hysteresis Voltage  
3V, SD Mode = VDD (High)  
Shutdown Hysteresis Voltage  
3V, SD Mode = GND (Low)  
200198A2  
200198A3  
Shutdown Hysteresis Voltage  
2.6V, SD Mode = VDD (High)  
Shutdown Hysteresis Voltage  
2.6V, SD Mode = GND (Low)  
200198A4  
200198A5  
11  
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Typical Performance Characteristics (Continued)  
Output Power vs.  
Output Power vs  
Supply Voltage, 4Ω  
Supply Voltage, 8Ω  
200198B8  
200198A6  
Output Power vs  
Output Power vs  
Supply Voltage, 16Ω  
Supply Voltage, 32Ω  
200198A7  
200198A8  
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12  
Typical Performance Characteristics (Continued)  
Frequency Response vs  
Input Capacitor Size  
20019854  
13  
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especially effective when connected to VDD, GND, and the  
output pins. Refer to the application information on the  
LM4901 reference design board for an example of good heat  
sinking. If TJMAX still exceeds 150˚C, then additional  
changes must be made. These changes can include re-  
duced supply voltage, higher load impedance, or reduced  
ambient temperature. Internal power dissipation is a function  
of output power. Refer to the Typical Performance Charac-  
teristics curves for power dissipation information for differ-  
ent output powers and output loading.  
Application Information  
BRIDGE CONFIGURATION EXPLANATION  
As shown in Figure 1, the LM4901 has two internal opera-  
tional amplifiers. The first amplifier’s gain is externally con-  
figurable, while the second amplifier is internally fixed in a  
unity-gain, inverting configuration. The closed-loop gain of  
the first amplifier is set by selecting the ratio of Rf to Ri while  
the second amplifier’s gain is fixed by the two internal 20kΩ  
resistors. Figure 1 shows that the output of amplifier one  
serves as the input to amplifier two which results in both  
amplifiers producing signals identical in magnitude, but out  
of phase by 180˚. Consequently, the differential gain for the  
IC is  
POWER SUPPLY BYPASSING  
As with any amplifier, proper supply bypassing is critical for  
low noise performance and high power supply rejection. The  
capacitor location on both the bypass and power supply pins  
should be as close to the device as possible. Typical appli-  
cations employ a 5V regulator with 10 µF tantalum or elec-  
trolytic capacitor and a ceramic bypass capacitor which aid  
in supply stability. This does not eliminate the need for  
bypassing the supply nodes of the LM4901. The selection of  
a bypass capacitor, especially CB, is dependent upon PSRR  
requirements, click and pop performance (as explained in  
the section, Proper Selection of External Components),  
system cost, and size constraints.  
AVD= 2 *(Rf/Ri)  
By driving the load differentially through outputs Vo1 and  
Vo2, an amplifier configuration commonly referred to as  
“bridged mode” is established. Bridged mode operation is  
different from the classical single-ended amplifier configura-  
tion where one side of the load is connected to ground.  
A bridge amplifier design has a few distinct advantages over  
the single-ended configuration, as it provides differential  
drive to the load, thus doubling output swing for a specified  
supply voltage. Four times the output power is possible as  
compared to a single-ended amplifier under the same con-  
ditions. This increase in attainable output power assumes  
that the amplifier is not current limited or clipped. In order to  
choose an amplifier’s closed-loop gain without causing ex-  
cessive clipping, please refer to the Audio Power Amplifier  
Design section.  
SHUTDOWN FUNCTION  
In order to reduce power consumption while not in use, the  
LM4901 contains shutdown circuitry that is used to turn off  
the amplifier’s bias circuitry. In addition, the LM4901 con-  
tains a Shutdown Mode pin, allowing the designer to desig-  
nate whether the part will be driven into shutdown with a high  
level logic signal or a low level logic signal. This allows the  
designer maximum flexibility in device use, as the Shutdown  
Mode pin may simply be tied permanently to either VDD or  
GND to set the LM4901 as either a "shutdown-high" device  
or a "shutdown-low" device, respectively. The device may  
then be placed into shutdown mode by toggling the Shut-  
down pin to the same state as the Shutdown Mode pin. For  
simplicity’s sake, this is called "shutdown same", as the  
LM4901 enters shutdown mode whenever the two pins are  
in the same logic state. The trigger point for either shutdown  
high or shutdown low is shown as a typical value in the  
Supply Current vs Shutdown Voltage graphs in the Typical  
Performance Characteristics section. It is best to switch  
between ground and supply for maximum performance.  
While the device may be disabled with shutdown voltages in  
between ground and supply, the idle current may be greater  
than the typical value of 0.1µA. In either case, the shutdown  
pin should be tied to a definite voltage to avoid unwanted  
state changes.  
A bridge configuration, such as the one used in LM4901,  
also creates a second advantage over single-ended amplifi-  
ers. Since the differential outputs, Vo1 and Vo2, are biased  
at half-supply, no net DC voltage exists across the load. This  
eliminates the need for an output coupling capacitor which is  
required in a single supply, single-ended amplifier configura-  
tion. Without an output coupling capacitor, the half-supply  
bias across the load would result in both increased internal  
IC power dissipation and also possible loudspeaker damage.  
POWER DISSIPATION  
Power dissipation is a major concern when designing a  
successful amplifier, whether the amplifier is bridged or  
single-ended. A direct consequence of the increased power  
delivered to the load by a bridge amplifier is an increase in  
internal power dissipation. Since the LM4901 has two opera-  
tional amplifiers in one package, the maximum internal  
power dissipation is 4 times that of a single-ended amplifier.  
The maximum power dissipation for a given application can  
be derived from the power dissipation graphs or from Equa-  
tion 1.  
In many applications, a microcontroller or microprocessor  
output is used to control the shutdown circuitry, which pro-  
vides a quick, smooth transition to shutdown. Another solu-  
tion is to use a single-throw switch in conjunction with an  
external pull-up resistor (or pull-down, depending on shut-  
down high or low application). This scheme guarantees that  
the shutdown pin will not float, thus preventing unwanted  
state changes.  
PDMAX = 4*(VDD)2/(2π2RL)  
(1)  
It is critical that the maximum junction temperature TJMAX of  
150˚C is not exceeded. TJMAX can be determined from the  
power derating curves by using PDMAX and the PC board foil  
area. By adding copper foil, the thermal resistance of the  
PROPER SELECTION OF EXTERNAL COMPONENTS  
Proper selection of external components in applications us-  
ing integrated power amplifiers is critical to optimize device  
and system performance. While the LM4901 is tolerant of  
application can be reduced from the free air value of θJA  
,
resulting in higher PDMAX values without thermal shutdown  
protection circuitry being activated. Additional copper foil can  
be added to any of the leads connected to the LM4901. It is  
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14  
Application Information (Continued)  
external component combinations, consideration to compo-  
Load Impedance  
Input Level  
8Ω  
1 Vrms  
Input Impedance  
Bandwidth  
20 kΩ  
nent values must be used to maximize overall system qual-  
ity.  
100 Hz–20 kHz 0.25 dB  
The LM4901 is unity-gain stable which gives the designer  
maximum system flexibility. The LM4901 should be used in  
low gain configurations to minimize THD+N values, and  
maximize the signal to noise ratio. Low gain configurations  
require large input signals to obtain a given output power.  
Input signals equal to or greater than 1 Vrms are available  
from sources such as audio codecs. Please refer to the  
section, Audio Power Amplifier Design, for a more com-  
plete explanation of proper gain selection.  
A designer must first determine the minimum supply rail to  
obtain the specified output power. By extrapolating from the  
Output Power vs Supply Voltage graphs in the Typical Per-  
formance Characteristics section, the supply rail can be  
easily found.  
5V is a standard voltage in most applications, it is chosen for  
the supply rail. Extra supply voltage creates headroom that  
allows the LM4901 to reproduce peaks in excess of 1W  
without producing audible distortion. At this time, the de-  
signer must make sure that the power supply choice along  
with the output impedance does not violate the conditions  
explained in the Power Dissipation section.  
Besides gain, one of the major considerations is the closed-  
loop bandwidth of the amplifier. To a large extent, the band-  
width is dictated by the choice of external components  
shown in Figure 1. The input coupling capacitor, Ci, forms a  
first order high pass filter which limits low frequency re-  
sponse. This value should be chosen based on needed  
frequency response for a few distinct reasons.  
Once the power dissipation equations have been addressed,  
the required differential gain can be determined from Equa-  
tion 2.  
Selection Of Input Capacitor Size  
Large input capacitors are both expensive and space hungry  
for portable designs. Clearly, a certain sized capacitor is  
needed to couple in low frequencies without severe attenu-  
ation. But in many cases the speakers used in portable  
systems, whether internal or external, have little ability to  
reproduce signals below 100 Hz to 150 Hz. Thus, using a  
large input capacitor may not increase actual system perfor-  
mance.  
(2)  
Rf/Ri = AVD/2  
From Equation 2, the minimum AVD is 2.83; use AVD = 3.  
In addition to system cost and size, click and pop perfor-  
mance is effected by the size of the input coupling capacitor,  
Ci. A larger input coupling capacitor requires more charge to  
reach its quiescent DC voltage (nominally 1/2 VDD). This  
charge comes from the output via the feedback and is apt to  
create pops upon device enable. Thus, by minimizing the  
capacitor size based on necessary low frequency response,  
turn-on pops can be minimized.  
Since the desired input impedance was 20 k, and with a  
AVD impedance of 2, a ratio of 1.5:1 of Rf to Ri results in an  
allocation of Ri = 20 kand Rf = 30 k. The final design step  
is to address the bandwidth requirements which must be  
stated as a pair of −3 dB frequency points. Five times away  
from a −3 dB point is 0.17 dB down from passband response  
which is better than the required 0.25 dB specified.  
Besides minimizing the input capacitor size, careful consid-  
eration should be paid to the bypass capacitor value. Bypass  
capacitor, CB, is the most critical component to minimize  
turn-on pops since it determines how fast the LM4901 turns  
on. The slower the LM4901’s outputs ramp to their quiescent  
DC voltage (nominally 1/2 VDD), the smaller the turn-on pop.  
Choosing CB equal to 1.0 µF along with a small value of Ci  
(in the range of 0.1 µF to 0.39 µF), should produce a virtually  
clickless and popless shutdown function. While the device  
will function properly, (no oscillations or motorboating), with  
CB equal to 0.1 µF, the device will be much more susceptible  
to turn-on clicks and pops. Thus, a value of CB equal to  
1.0 µF is recommended in all but the most cost sensitive  
designs.  
fL = 100 Hz/5 = 20 Hz  
fH = 20 kHz * 5 = 100 kHz  
As stated in the External Components section, Ri in con-  
junction with Ci create a highpass filter.  
Ci 1/(2π*20 k*20 Hz) = 0.397 µF; use 0.39 µF  
The high frequency pole is determined by the product of the  
desired frequency pole, fH, and the differential gain, AVD  
.
With a AVD = 3 and fH = 100 kHz, the resulting GBWP =  
300kHz which is much smaller than the LM4901 GBWP of  
2.5MHz. This figure displays that if a designer has a need to  
design an amplifier with a higher differential gain, the  
LM4901 can still be used without running into bandwidth  
limitations.  
AUDIO POWER AMPLIFIER DESIGN  
A 1W/8Audio Amplifier  
Given:  
Power Output  
1 Wrms  
15  
www.national.com  
Application Information (Continued)  
20019824  
FIGURE 2. HIGHER GAIN AUDIO AMPLIFIER  
The LM4901 is unity-gain stable and requires no external  
components besides gain-setting resistors, an input coupling  
capacitor, and proper supply bypassing in the typical appli-  
cation. However, if a closed-loop differential gain of greater  
than 10 is required, a feedback capacitor (C4) may be  
needed as shown in Figure 2 to bandwidth limit the amplifier.  
This feedback capacitor creates a low pass filter that elimi-  
nates possible high frequency oscillations. Care should be  
taken when calculating the -3dB frequency in that an incor-  
rect combination of R3 and C4 will cause rolloff before  
20kHz. A typical combination of feedback resistor and ca-  
pacitor that will not produce audio band high frequency rolloff  
is R3 = 20kand C4 = 25pf. These components result in a  
-3dB point of approximately 320 kHz.  
www.national.com  
16  
Application Information (Continued)  
20019829  
FIGURE 3. DIFFERENTIAL AMPLIFIER CONFIGURATION FOR LM4901  
20019825  
FIGURE 4. REFERENCE DESIGN BOARD SCHEMATIC  
17  
www.national.com  
Application Information (Continued)  
LM4901 micro SMD BOARD ARTWORK  
Silk Screen  
Top Layer  
20019878  
20019876  
Bottom Layer  
Inner Layer VDD  
20019881  
20019880  
Inner Layer Ground  
20019882  
www.national.com  
18  
Application Information (Continued)  
LM4901 MSOP DEMO BOARD ARTWORK  
Silk Screen  
Top Layer  
20019875  
20019879  
Bottom Layer  
20019877  
19  
www.national.com  
Application Information (Continued)  
LM4901 LLP DEMO BOARD ARTWORK  
Composite View  
Silk Screen  
200198A9  
200198B0  
Top Layer  
Bottom Layer  
200198B1  
200198B2  
www.national.com  
20  
Application Information (Continued)  
Mono LM4901 Reference Design Boards  
Bill of Material  
Part Description  
Quantity  
Reference Designator  
LM4901 Audio AMP  
1
2
1
2
2
2
U1  
Tantalum Capcitor, 1µF  
C1, C3  
C2  
Ceramic Capacitor, 0.39µF  
Resistor, 20k, 1/10W  
R2, R3  
R1, R4  
J1, J2  
Resistor, 100k, 1/10W  
Jumper Header Vertical Mount 2X1 0.100“ spacing  
PCB LAYOUT GUIDELINES  
Single-Point Power / Ground Connections  
This section provides practical guidelines for mixed signal  
PCB layout that involves various digital/analog power and  
ground traces. Designers should note that these are only  
"rule-of-thumb" recommendations and the actual results will  
depend heavily on the final layout.  
The analog power traces should be connected to the digital  
traces through a single point (link). A "Pi-filter" can be helpful  
in minimizing High Frequency noise coupling between the  
analog and digital sections. It is further recommended to put  
digital and analog power traces over the corresponding digi-  
tal and analog ground traces to minimize noise coupling.  
GENERAL MIXED SIGNAL LAYOUT  
RECOMMENDATION  
Placement of Digital and Analog Components  
All digital components and high-speed digital signal traces  
should be located as far away as possible from analog  
components and circuit traces.  
Power and Ground Circuits  
For 2 layer mixed signal design, it is important to isolate the  
digital power and ground trace paths from the analog power  
and ground trace paths. Star trace routing techniques (bring-  
ing individual traces back to a central point rather than daisy  
chaining traces together in a serial manner) can have a  
major impact on low level signal performance. Star trace  
routing refers to using individual traces to feed power and  
ground to each circuit or even device. This technique will  
require a greater amount of design time but will not increase  
the final price of the board. The only extra parts required will  
be some jumpers.  
Avoiding Typical Design / Layout Problems  
Avoid ground loops or running digital and analog traces  
parallel to each other (side-by-side) on the same PCB layer.  
When traces must cross over each other do it at 90 degrees.  
Running digital and analog traces at 90 degrees to each  
other from the top to the bottom side as much as possible will  
minimize capacitive noise coupling and cross talk.  
21  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
Note: Unless otherwise specified.  
1. Epoxy coating.  
2. Recommend non-solder mask defined landing pad.  
3. Pin 1 is established by lower left corner with respect to text orientation pins are numbered counterclockwise.  
4. 63Sn/37Pb eutectic bump.  
5. Reference JEDEC registration MO-211, variation BC.  
9-Bump micro SMD  
Order Number LM4901IBL, LM4901IBLX  
NS Package Number BLA09AAC  
X1 = 1.514, X2 = 1.514, X3 = 0.600  
www.national.com  
22  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
MSOP  
Order Number LM4901MM  
NS Package Number MUB10A  
23  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
LLP  
Order Number LM4901LD  
NS Package Number LDA10B  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
National Semiconductor  
Corporation  
Americas  
National Semiconductor  
Europe  
National Semiconductor  
Asia Pacific Customer  
Response Group  
Tel: 65-2544466  
Fax: 65-2504466  
National Semiconductor  
Japan Ltd.  
Tel: 81-3-5639-7560  
Fax: 81-3-5639-7507  
Fax: +49 (0) 180-530 85 86  
Email: support@nsc.com  
Email: europe.support@nsc.com  
Deutsch Tel: +49 (0) 69 9508 6208  
English Tel: +44 (0) 870 24 0 2171  
Français Tel: +33 (0) 1 41 91 8790  
Email: ap.support@nsc.com  
www.national.com  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  

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