LM5008AMMX [NSC]

100V, 350 mA Constant On-Time Buck Switching Regulator; 100V , 350毫安恒定导通时间降压型开关稳压器
LM5008AMMX
型号: LM5008AMMX
厂家: National Semiconductor    National Semiconductor
描述:

100V, 350 mA Constant On-Time Buck Switching Regulator
100V , 350毫安恒定导通时间降压型开关稳压器

稳压器 开关
文件: 总16页 (文件大小:388K)
中文:  中文翻译
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June 26, 2009  
LM5008A  
100V, 350 mA Constant On-Time Buck Switching Regulator  
General Description  
Features  
The LM5008A is a functional variant of the LM5008 COT Buck  
Switching Regulator. The functional differences of the  
LM5008A are: The minimum input operating voltage is 6 volts,  
the on-time equation is slightly different, and the requirement  
for a minimum load current is removed.  
Operating input voltage range: 6V to 95V  
Integrated 100V, N-Channel buck switch  
Internal start-up regulator  
No loop compensation required  
Ultra-Fast transient response  
The LM5008A Step Down Switching Regulator features all of  
the functions needed to implement a low cost, efficient, Buck  
bias regulator. This high voltage regulator contains an 100 V  
N-Channel Buck Switch. The device is easy to implement and  
is provided in the MSOP-8 and the thermally enhanced LLP-8  
packages. The regulator is based on a control scheme using  
an ON time inversely proportional to VIN. This feature allows  
the operating frequency to remain relatively constant. The  
control scheme requires no loop compensation. An intelligent  
current limit is implemented with forced OFF time, which is  
inversely proportional to Vout. This scheme ensures short  
circuit control while providing minimum foldback. Other fea-  
tures include: Thermal Shutdown, VCC under-voltage lockout,  
Gate drive under-voltage lockout, Max Duty Cycle limiter, and  
a pre-charge switch.  
On time varies inversely with input voltage  
Operating frequency remains constant with varying line  
voltage and load current  
Adjustable output voltage from 2.5V  
Highly efficient operation  
Precision internal reference  
Low bias current  
Intelligent current limit  
Thermal shutdown  
Typical Applications  
Non-Isolated Telecommunication Buck Regulator  
Secondary High Voltage Post Regulator  
+42V Automotive Systems  
Package  
MSOP - 8  
LLP - 8 (4mm x 4mm)  
Typical Application, Basic Step-Down Regulator  
30074901  
© 2009 National Semiconductor Corporation  
300749  
www.national.com  
Connection Diagrams  
30074903  
Top View  
8-Lead MSOP  
30074902  
Top View  
8-Lead LLP  
Ordering Information  
Order Number  
LM5008AMM  
LM5008AMMX  
LM5008ASD  
Package Type  
NSC Package Drawing  
Supplied As  
1000 Units on Tape and Reel  
3500 Units on Tape and Reel  
1000 Units on Tape and Reel  
4500 Units on Tape and Reel  
MSOP-8  
MUA08A  
LLP-8  
SDC08B  
LM5008ASDX  
Pin Descriptions  
Pin  
Name  
Description  
Switching Node  
Application Information  
1
SW  
Power switching node. Connect to the output inductor, re-circulating diode, and  
bootstrap capacitor.  
2
3
BST  
RCL  
Boost Pin (Boot–strap capacitor  
input)  
An external capacitor is required between the BST and the SW pins. A 0.01  
µF ceramic capacitor is recommended. An internal diode charges the capacitor  
from VCC during each off-time.  
Current Limit OFF time set pin  
Ground pin  
A resistor between this pin and RTN sets the off-time when current limit is  
detected. The off-time is preset to 35 µs if FB = 0V.  
4
5
RTN  
FB  
Ground for the entire circuit.  
Feedback input from Regulated  
Output  
This pin is connected to the inverting input of the internal regulation  
comparator. The regulation threshold is 2.5V.  
6
7
RT/SD On time set pin  
A resistor between this pin and VIN sets the switch on time as a function of  
VIN. The minimum recommended on time is 400 ns at the maximum input  
voltage. This pin can be used for remote shutdown.  
VCC  
Output from the internal high voltage This regulated voltage provides gate drive power for the internal Buck switch.  
series pass regulator.  
An internal diode is provided between this pin and the BST pin. A local 0.47  
µF decoupling capacitor is required. The series pass regulator is current limited  
to 9 mA.  
8
VIN  
EP  
Input voltage  
Exposed Pad  
Input operating range: 6V to 95V.  
The exposed pad has no electrical contact. Connect to system ground plane  
for reduced thermal resistance.  
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2
BST to SW  
VCC to GND  
14V  
14V  
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
All Other Inputs to GND  
Lead Temperature (Soldering 4 sec)  
Storage Temperature Range  
-0.3 to 7V  
260°C  
-55°C to +150°C  
VIN to GND  
-0.3V to 100V  
-0.3V to 114V  
-1V  
BST to GND  
Operating Ratings (Note 1)  
VIN  
SW to GND (Steady State)  
ESD Rating (Note 5)  
Human Body Model  
BST to VCC  
6V to 95V  
−40°C to + 125°C  
Operating Junction Temperature  
2kV  
100V  
Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those with boldface type  
apply over full Operating Junction Temperature range. VIN = 48V, unless otherwise stated (Note 3).  
Symbol  
VCC Supply  
Vcc Reg  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Vcc Regulator Output  
Vin – Vcc  
Vin = 48V  
6.6  
7
7.4  
V
mV  
V
6V < Vin < 8.5V  
Vin Increasing  
100  
8.5  
300  
100  
8.8  
0.8  
9.2  
5.3  
190  
3
Vcc Bypass Threshold  
Vcc Bypass Hysteresis  
Vcc Output Impedance  
mV  
Vin =6V  
Vin = 10V  
Vin = 48V  
Vin = 48V  
Vcc Increasing  
mA  
Vcc Current Limit  
Vcc UVLO  
V
Vcc UVLO hysteresis  
Vcc UVLO filter delay  
Iin Operating current  
Iin Shutdown Current  
mV  
µs  
µA  
µA  
FB = 3V, Vin = 48V  
RT/SD = 0V  
550  
110  
750  
176  
Switch Characteristics  
Buckswitch Rds(on)  
Itest = 200 mA  
1.25  
3.8  
2.57  
4.8  
V
Gate Drive UVLO  
Vbst – Vsw Rising  
2.8  
Gate Drive UVLO hysteresis  
Pre-charge switch voltage  
Pre-charge switch on-time  
490  
0.8  
mV  
V
At 1 mA  
150  
ns  
Current Limit  
Current Limit Threshold  
0.41  
0.51  
350  
0.61  
A
Current Limit Response Time  
Iswitch Overdrive = 0.1A Time  
to Switch Off  
ns  
TOFF-1  
TOFF-2  
OFF time generator  
OFF time generator  
FB=0V, RCL = 100K  
35  
µs  
µs  
FB=2.3V, RCL = 100K  
2.56  
On Time Generator  
TON - 1  
Vin = 10V  
Ron = 200K  
2.15  
200  
2.77  
300  
3.5  
420  
1.05  
µs  
ns  
TON - 2  
Vin = 95V  
Ron = 200K  
Remote Shutdown Threshold  
Remote Shutdown Hysteresis  
Rising  
0.40  
0.70  
35  
V
mV  
3
www.national.com  
Symbol  
Parameter  
Conditions  
FB = 0V  
Min  
Typ  
300  
2.5  
Max  
Units  
ns  
Minimum Off Time  
Minimum Off Timer  
Regulation and OV Comparators  
FB Reference Threshold  
Internal reference  
2.445  
2.550  
V
Trip point for switch ON  
FB Over-Voltage Threshold  
FB Bias Current  
Trip point for switch OFF  
2.875  
100  
V
nA  
Thermal Shutdown  
Tsd  
Thermal Shutdown Temp.  
165  
25  
°C  
°C  
Thermal Shutdown Hysteresis  
Thermal Resistance  
Junction to Ambient  
MUA Package  
SDC Package  
°C/W  
°C/W  
θJA  
200  
40  
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the  
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.  
Note 2: For detailed information on soldering plastic MSOP and LLP packages, refer to the Packaging Data Book available from National Semiconductor  
Corporation.  
Note 3: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25°C. All hot and cold  
limits are guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.  
Note 4: The VCC output is intended as a self bias for the internal gate drive power and control circuits. Device thermal limitations limit external loading.  
Note 5: The human body model is a 100pF capacitor discharged through a 1.5kresistor into each pin. The ESD rating for pin 2, pin 7, and pin 8 is 1 kV.  
Note 6: For devices procured in the LLP-8 package the Rds(on) limits are guaranteed by design characterization data only.  
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4
Typical Performance Characteristics  
Efficiency vs. Load Current and VIN  
VCC vs. VIN  
(Circuit of Figure 4)  
30074905  
30074924  
ON-Time vs Input Voltage and RT  
Current Limit Off-Time vs. VFB and RCL  
30074925  
30074907  
Maximum Frequency vs. VOUT and VIN  
ICC Current vs. Applied VCC Voltage  
30074926  
30074927  
5
www.national.com  
Block Diagram  
30074910  
The LM5008A operates in discontinuous conduction mode at  
light load currents, and continuous conduction mode at heavy  
load current. In discontinuous conduction mode, current  
through the output inductor starts at zero and ramps up to a  
peak during the on-time, then ramps back to zero before the  
end of the off-time. The next on-time period starts when the  
voltage at FB falls below the internal reference - until then the  
inductor current remains zero. In this mode the operating fre-  
quency is lower than in continuous conduction mode, and  
varies with load current. Therefore at light loads the conver-  
sion efficiency is maintained, since the switching losses re-  
duce with the reduction in load and frequency. The discon-  
tinuous operating frequency can be calculated as follows:  
Functional Description  
The LM5008A Step Down Switching Regulator features all  
the functions needed to implement a low cost, efficient, Buck  
bias power converter. This high voltage regulator contains a  
100 V N-Channel Buck Switch, is easy to implement and is  
provided in the MSOP-8 and the thermally enhanced LLP-8  
packages. The regulator is based on a control scheme using  
an on-time inversely proportional to VIN. The control scheme  
requires no loop compensation. Current limit is implemented  
with forced off-time, which is inversely proportional to VOUT  
This scheme ensures short circuit control while providing min-  
imum foldback.  
.
The LM5008A can be applied in numerous applications to ef-  
ficiently regulate down higher voltages. This regulator is well  
suited for 48 Volt Telecom and the new 42V Automotive pow-  
er bus ranges. Features include: Thermal Shutdown, VCC  
under-voltage lockout, Gate drive under-voltage lockout, Max  
Duty Cycle limit timer, intelligent current limit off timer, and a  
pre-charge switch.  
where RL = the load resistance  
In continuous conduction mode, current flows continuously  
through the inductor and never ramps down to zero. In this  
mode the operating frequency is greater than the discontinu-  
ous mode frequency and remains relatively constant with load  
and line variations. The approximate continuous mode oper-  
ating frequency can be calculated as follows:  
Control Circuit Overview  
The LM5008A is a Buck DC-DC regulator that uses a control  
scheme in which the on-time varies inversely with line voltage  
(VIN). Control is based on a comparator and the on-time one-  
shot, with the output voltage feedback (FB) compared to an  
internal reference (2.5V). If the FB level is below the reference  
the buck switch is turned on for a fixed time determined by the  
line voltage and a programming resistor (RT). Following the  
ON period the switch will remain off for at least the minimum  
off-timer period of 300ns. If FB is still below the reference at  
that time the switch will turn on again for another on-time pe-  
riod. This will continue until regulation is achieved.  
(1)  
The output voltage (VOUT) is programmed by two external re-  
sistors as shown in the Block Diagram. The regulation point  
can be calculated as follows:  
VOUT = 2.5 x (RFB1 + RFB2) / RFB1  
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6
The LM5008A regulates the output voltage based on ripple  
voltage at the feedback input, requiring a minimum amount of  
ESR for the output capacitor C2. A minimum of 25mV to 50mV  
of ripple voltage at the feedback pin (FB) is required for the  
LM5008A. In cases where the capacitor ESR is too small,  
additional series resistance may be required (R3 in the Block  
Diagram).  
For applications where lower output voltage ripple is required  
the output can be taken directly from a low ESR output ca-  
pacitor, as shown in Figure 1. However, R3 slightly degrades  
the load regulation.  
30074913  
FIGURE 1. Low Ripple Output Configuration  
response to a step input applied at VIN. C3 must be located  
as close as possible to the VCC and RTN pins. In applications  
with a relatively high input voltage, power dissipation in the  
bias regulator is a concern. An auxiliary voltage of between  
7.5V and 14V can be diode connected to the VCC pin to shut  
off the VCC regulator, thereby reducing internal power dissi-  
pation. The current required into the VCC pin is shown in the  
graph “ICC Current vs. Applied VCC Voltage”. Internally a diode  
connects VCC to VIN requiring that the auxiliary voltage be  
less than VIN.  
Start-Up Regulator (VCC)  
The high voltage bias regulator is integrated within the  
LM5008A. The input pin (VIN) can be connected directly to  
line voltages between 6V and 95V, with transient capability to  
100V. Referring to the block diagram and the graph of VCC vs  
VIN, when VIN is between 6V and the bypass threshold (nom-  
inally 8.5V), the bypass switch (Q2) is on, and VCC tracks  
VIN within 100 mV to 150 mV. The bypass switch on-resis-  
tance is approximately 100, with inherent current limiting at  
approximately 100 mA. When VIN is above the bypass thresh-  
old Q2 is turned off, and VCC is regulated at 7V. The VCC  
regulator output current is limited at approximately 9.2 mA.  
When the LM5008A is shutdown using the RT/SD pin, the  
VCC bypass switch is shut off regardless of the voltage at  
VIN.  
The turn-on sequence is shown in Figure 2. During the initial  
delay (t1) VCC ramps up at a rate determined by its current  
limit and C3 while internal circuitry stabilizes. When VCC  
reaches the upper threshold of its under-voltage lock-out (UV-  
LO, typically 5.3V) the buckswitch is enabled. The inductor  
current increases to the current limit threshold (ILIM) and dur-  
ing t2 VOUT increases as the output capacitor charges up.  
When VOUT reaches the intended voltage the average induc-  
tor current decreases (t3) to the nominal load current (IO).  
When VIN exceeds the bypass threshold, the time required  
for Q2 to shut off is approximately 2 - 3 µs. The capacitor at  
VCC (C3) must be a minimum of 0.47 µF to prevent the volt-  
age at VCC from rising above its absolute maximum rating in  
7
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30074914  
FIGURE 2. Startup Sequence  
Regulation Comparator  
On-Time Generator and Shutdown  
The feedback voltage at FB is compared to an internal 2.5V  
reference. In normal operation (the output voltage is regulat-  
ed), an on-time period is initiated when the voltage at FB falls  
below 2.5V. The buck switch will stay on for the on-time,  
causing the FB voltage to rise above 2.5V. After the on-time  
period, the buck switch will stay off until the FB voltage again  
falls below 2.5V. During start-up, the FB voltage will be below  
2.5V at the end of each on-time, resulting in the minimum off-  
time of 300 ns. Bias current at the FB pin is nominally 100 nA.  
The on-time for the LM5008A is determined by the RT resistor,  
and is inversely proportional to the input voltage (Vin), result-  
ing in a nearly constant frequency as Vin is varied over its  
range. The on-time equation for the LM5008A is:  
TON = 1.385 x 10-10 x RT / VIN  
(2)  
RT should be selected for a minimum on-time (at maximum  
VIN) greater than 400 ns, for proper current limit operation.  
This requirement limits the maximum frequency for each ap-  
plication, depending on VIN and VOUT  
.
The LM5008A can be remotely disabled by taking the RT/SD  
pin to ground. See Figure 3. The voltage at the RT/SD pin is  
between 1.5 and 3.0 volts, depending on Vin and the value of  
the RT resistor.  
Over-Voltage Comparator  
The feedback voltage at FB is compared to an internal 2.875V  
reference. If the voltage at FB rises above 2.875V the on-time  
pulse is immediately terminated. This condition can occur if  
the input voltage, or the output load, change suddenly. The  
buck switch will not turn on again until the voltage at FB falls  
below 2.5V.  
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8
Thermal Protection  
The LM5008A should be operated so the junction tempera-  
ture does not exceed 125°C during normal operation. An  
internal Thermal Shutdown circuit is provided to shutdown the  
LM5008A in the event of a higher than normal junction tem-  
perature. When activated, typically at 165°C, the controller is  
forced into a low power reset state by disabling the buck  
switch. This feature prevents catastrophic failures from acci-  
dental device overheating. When the junction temperature  
reduces below 140°C (typical hysteresis = 25°C) normal op-  
eration is resumed.  
30074915  
FIGURE 3. Shutdown Implementation  
Applications Information  
SELECTION OF EXTERNAL COMPONENTS  
Current Limit  
A guide for determining the component values will be illus-  
trated with a design example. Refer to the Block Diagram. The  
following steps will configure the LM5008A for:  
The LM5008A contains an intelligent current limit OFF timer.  
If the current in the Buck switch exceeds 0.51A the present  
cycle is immediately terminated, and a non-resetable OFF  
timer is initiated. The length of off-time is controlled by an ex-  
ternal resistor (RCL) and the FB voltage (see the graph Cur-  
rent Limit Off-Time vs. VFB and RCL). When FB = 0V, a  
maximum off-time is required, and the time is preset to 35µs.  
This condition occurs when the output is shorted, and during  
the initial part of start-up. This amount of time ensures safe  
short circuit operation up to the maximum input voltage of  
95V. In cases of overload where the FB voltage is above zero  
volts (not a short circuit) the current limit off-time will be less  
than 35µs. Reducing the off-time during less severe over-  
loads reduces the amount of foldback, recovery time, and the  
start-up time. The off-time is calculated from the following  
equation:  
Input voltage range (Vin): 12V to 95V  
Output voltage (VOUT1): 10V  
Load current (for continuous conduction mode): 100 mA  
to 300 mA  
RFB1, RFB2: VOUT = VFB x (RFB1 + RFB2) / RFB1, and since  
VFB = 2.5V, the ratio of RFB2 to RFB1 calculates as 3:1. Stan-  
dard values of 3.01 kand 1.00 kare chosen. Other values  
could be used as long as the 3:1 ratio is maintained.  
Fs and RT: The recommended operating frequency range for  
the LM5008A is 50 kHz to 1.1 MHz. Unless the application  
requires a specific frequency, the choice of frequency is gen-  
erally a compromise since it affects the size of L1 and C2, and  
the switching losses. The maximum allowed frequency,  
based on a minimum on-time of 400 ns, is calculated from:  
TOFF = 10-5 / (0.285 + (VFB / 6.35 x 10-6 x RCL))  
(3)  
The current limit sensing circuit is blanked for the first 50-70ns  
of each on-time so it is not falsely tripped by the current surge  
which occurs at turn-on. The current surge is required by the  
re-circulating diode (D1) for its turn-off recovery.  
FMAX = VOUT / (VINMAX x 400 ns)  
For this exercise, Fmax = 263 kHz. From equation 1, RT cal-  
culates to 274 k. A standard value 324 kresistor will be  
used to allow for tolerances in equation 1, resulting in a fre-  
quency of 223 kHz.  
N - Channel Buck Switch and Driver  
L1: The main parameter affected by the inductor is the output  
current ripple amplitude. The choice of inductor value there-  
fore depends on both the minimum and maximum load cur-  
rents, keeping in mind that the maximum ripple current occurs  
at maximum Vin.  
The LM5008A integrates an N-Channel Buck switch and as-  
sociated floating high voltage gate driver. The gate driver  
circuit works in conjunction with an external bootstrap capac-  
itor and an internal high voltage diode. A 0.01 µF ceramic  
capacitor (C4) connected between the BST pin and SW pin  
provides the voltage to the driver during the on-time.  
a) Minimum load current: To maintain continuous conduc-  
tion at minimum Io (100 mA), the ripple amplitude (IOR) must  
be less than 200 mA p-p so the lower peak of the waveform  
does not reach zero. L1 is calculated using the following  
equation:  
During each off-time, the SW pin is at approximately 0V, and  
the bootstrap capacitor charges from Vcc through the internal  
diode. The minimum OFF timer, set to 300ns, ensures a min-  
imum time each cycle to recharge the bootstrap capacitor.  
The internal pre-charge switch at the SW pin is turned on for  
150 ns during the minimum off-time period, ensuring suffi-  
cient voltage exists across the bootstrap capacitor for the on-  
time. This feature helps prevent operating problems which  
can occur during very light load conditions, involving a long  
off-time, during which the voltage across the bootstrap ca-  
pacitor could otherwise reduce below the Gate Drive UVLO  
threshold. The pre-charge switch also helps prevent startup  
problems which can occur if the output voltage is pre-charged  
prior to turn-on. After current limit detection, the pre-charge  
switch is turned on for the entire duration of the forced off-  
time .  
At Vin = 95V, L1(min) calculates to 200 µH. The next larger  
standard value (220 µH) is chosen and with this value IOR  
calculates to 182 mA p-p at Vin = 95V, and 34 mA p-p at Vin  
= 12V.  
b) Maximum load current: At a load current of 300 mA, the  
peak of the ripple waveform must not reach the minimum  
guaranteed value of the LM5008A’s current limit threshold  
(410 mA). Therefore the ripple amplitude must be less than  
220 mA p-p, which is already satisfied in the above calcula-  
tion. With L1 = 220 µH, at maximum Vin and Io, the peak of  
the ripple will be 391 mA. While L1 must carry this peak cur-  
9
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rent without saturating or exceeding its temperature rating, it  
also must be capable of carrying the maximum guaranteed  
value of the LM5008A’s current limit threshold (610 mA) with-  
out saturating, since the current limit is reached during start-  
up.  
waveform, ramp up to the peak value, then drop to zero at  
turn-off. The average input current during this on-time is the  
load current (300 mA). For a worst case calculation, C1 must  
supply this average load current during the maximum on-time.  
To keep the input voltage ripple to less than 2V (for this ex-  
ercise), C1 calculates to:  
The DC resistance of the inductor should be as low as pos-  
sible. For example, if the inductor’s DCR is one ohm, the  
power dissipated at maximum load current is 0.09W. While  
small, it is not insignificant compared to the load power of 3W.  
C3: The capacitor on the VCC output provides not only noise  
filtering and stability, but its primary purpose is to prevent false  
triggering of the VCC UVLO at the buck switch on/off transi-  
tions. C3 should be no smaller than 0.47 µF.  
Quality ceramic capacitors in this value have a low ESR which  
adds only a few millivolts to the ripple. It is the capacitance  
which is dominant in this case. To allow for the capacitor’s  
tolerance, temperature effects, and voltage effects, a 1.0 µF,  
100V, X7R capacitor will be used.  
C2, and R3: When selecting the output filter capacitor C2, the  
items to consider are ripple voltage due to its ESR, ripple  
voltage due to its capacitance, and the nature of the load.  
C4: The recommended value is 0.01µF for C4, as this is ap-  
propriate in the majority of applications. A high quality ceramic  
capacitor, with low ESR is recommended as C4 supplies the  
surge current to charge the buck switch gate at turn-on. A low  
ESR also ensures a quick recharge during each off-time. At  
minimum Vin, when the on-time is at maximum, it is possible  
during start-up that C4 will not fully recharge during each 300  
ns off-time. The circuit will not be able to complete the start-  
up, and achieve output regulation. This can occur when the  
frequency is intended to be low (e.g., RT = 500K). In this case  
C4 should be increased so it can maintain sufficient voltage  
across the buck switch driver during each on-time.  
ESR and R3: A low ESR for C2 is generally desirable so as  
to minimize power losses and heating within the capacitor.  
However, the regulator requires a minimum amount of ripple  
voltage at the feedback input for proper loop operation. For  
the LM5008A the minimum ripple required at pin 5 is 25 mV  
p-p, requiring a minimum ripple at VOUT of 100 mV. Since the  
minimum ripple current (at minimum Vin) is 34 mA p-p, the  
minimum ESR required at VOUT is 100 mV/34 mA = 2.94.  
Since quality capacitors for SMPS applications have an ESR  
considerably less than this, R3 is inserted as shown in the  
Block Diagram. R3’s value, along with C2’s ESR, must result  
in at least 25 mV p-p ripple at pin 5. Generally, R3 will be 0.5  
to 3.0Ω.  
RCL: When current limit is detected, the minimum off-time set  
by this resistor must be greater than the maximum normal off-  
time, which occurs at maximum input voltage. Using Equation  
2, the minimum on-time is 472 ns, yielding an off-time of 4 µs  
(at 223 kHz). Due to the 25% tolerance on the on-time, the  
off-time tolerance is also 25%, yielding a maximum off-time  
of 5 µs. Allowing for the response time of the current limit de-  
tection circuit (350 ns) increases the maximum off-time to  
5.35 µs. This is increased an additional 25% to 6.7 µs to allow  
for the tolerances of Equation 3. Using Equation 3, RCL cal-  
culates to 325 kat VFB = 2.5V. A standard value 332 kΩ  
resistor will be used.  
C5: This capacitor helps avoid supply voltage transients and  
ringing due to long lead inductance at VIN. A low ESR, 0.1µF  
ceramic chip capacitor is recommended, located close to the  
LM5008A.  
FINAL CIRCUIT  
The final circuit is shown in Figure 4. The circuit was tested,  
and the resulting performance is shown in Figure 5 and Figure  
6.  
PC BOARD LAYOUT  
The LM5008A regulation and over-voltage comparators are  
very fast, and as such will respond to short duration noise  
pulses. Layout considerations are therefore critical for opti-  
mum performance. The components at pins 1, 2, 3, 5, and 6  
should be as physically close as possible to the IC, thereby  
minimizing noise pickup in the PC tracks. The current loop  
formed by D1, L1, and C2 should be as small as possible. The  
ground connection from D1 to C1 should be as short and di-  
rect as possible.  
D1: The important parameters are reverse recovery time and  
forward voltage. The reverse recovery time determines how  
long the reverse current surge lasts each time the buck switch  
is turned on. The forward voltage drop is significant in the  
event the output is short-circuited as it is only this diode’s  
voltage which forces the inductor current to reduce during the  
forced off-time. For this reason, a higher voltage is better, al-  
though that affects efficiency. A good choice is a Schottky  
power diode, such as the DFLS1100. D1’s reverse voltage  
rating must be at least as great as the maximum Vin, and its  
current rating be greater than the maximum current limit  
threshold (610 mA).  
If the internal dissipation of the LM5008A produces excessive  
junction temperatures during normal operation, good use of  
the pc board’s ground plane can help considerably to dissi-  
pate heat. The exposed pad on the bottom of the LLP-8  
package can be soldered to a ground plane on the PC board,  
and that plane should extend out from beneath the IC to help  
dissipate the heat. Additionally, the use of wide PC board  
traces, where possible, can also help conduct heat away from  
the IC. Judicious positioning of the PC board within the end  
product, along with use of any available air flow (forced or  
natural convection) can help reduce the junction tempera-  
tures.  
C1: This capacitor’s purpose is to supply most of the switch  
current during the on-time, and limit the voltage ripple at Vin,  
on the assumption that the voltage source feeding Vin has an  
output impedance greater than zero. At maximum load cur-  
rent, when the buck switch turns on, the current into pin 8 will  
suddenly increase to the lower peak of the output current  
www.national.com  
10  
30074918  
FIGURE 4. LM5008A Example Circuit  
Bill of Materials  
Item  
C1  
C2  
C3  
C4  
C5  
D1  
L1  
Description  
Part Number  
Value  
Ceramic Capacitor  
Ceramic Capacitor  
Ceramic Capacitor  
Ceramic Capacitor  
Ceramic Capacitor  
Schottky Power Diode  
Power Inductor  
TDK C4532X7R2A105M  
TDK C4532X7R1E226M  
Kemet C1206C474K5RAC  
Kemet C1206C103K5RAC  
TDK C3216X7R2A104M  
Diodes Inc. DFLS1100  
1 µF, 100V  
22 µF, 25V  
0.47 µF, 50V  
0.01 µF, 50V  
0.1 µF, 100V  
100V, 1A  
COILTRONICS DR125-221-R, or  
TDK SLF10145T-221MR65  
Vishay CRCW12063011F  
Vishay CRCW12061001F  
Vishay CRCW12063R00F  
Vishay CRCW12063243F  
Vishay CRCW12063323F  
National Semiconductor LM5008A  
220 µH  
RFB2  
RFB1  
R3  
Resistor  
Resistor  
3.01 kΩ  
1.0 kΩ  
3.0 Ω  
Resistor  
RT  
Resistor  
324 kΩ  
332 kΩ  
RCL  
U1  
Resistor  
Switching Regulator  
11  
www.national.com  
30074924  
FIGURE 5. Efficiency vs. Load Current and VIN  
30074928  
FIGURE 6. Efficiency vs. VIN  
LOW OUTPUT RIPPLE CONFIGURATIONS  
For applications where low output ripple is required, the fol-  
lowing options can be used to reduce or nearly eliminate the  
ripple.  
where tON(max) is the maximum on-time, which occurs at VIN  
(min). The next larger standard value capacitor should be used  
for Cff.  
a) Reduced ripple configuration: In Figure 7, Cff is added  
across RFB2 to AC-couple the ripple at VOUT directly to the FB  
pin. This allows the ripple at VOUT to be reduced to a minimum  
of 25 mVp-p by reducing R3, since the ripple at VOUT is not  
attenuated by the feedback resistors. The minimum value for  
Cff is determined from:  
www.national.com  
12  
c) Alternate minimum ripple configuration: The circuit in  
Figure 9 is the same as that in the Block Diagram, except the  
output voltage is taken from the junction of R3 and C2. The  
ripple at VOUT is determined by the inductor’s ripple current  
and C2’s characteristics. However, R3 slightly degrades the  
load regulation. This circuit may be suitable if the load current  
is fairly constant.  
30074921  
FIGURE 7. Reduced Ripple Configuration  
b) Minimum ripple configuration: If the application requires  
a lower value of ripple (<10 mVp-p), the circuit of Figure 8 can  
be used. R3 is removed, and the resulting output ripple volt-  
age is determined by the inductor’s ripple current and C2’s  
characteristics. RA and CA are chosen to generate a saw-  
tooth waveform at their junction, and that voltage is AC-  
coupled to the FB pin via CB. To determine the values for RA,  
CA and CB, use the following procedure:  
30074923  
FIGURE 9. Alternate Minimum Output Ripple  
Calculate VA = VOUT - (VSW x (1 - (VOUT/VIN(min))))  
where VSW is the absolute value of the voltage at the SW pin  
during the off-time (typically 1V). VA is the DC voltage at the  
RA/CA junction, and is used in the next equation.  
- Calculate RA x CA = (VIN(min) - VA) x tONV  
where tON is the maximum on-time (at minimum input volt-  
age), and ΔV is the desired ripple amplitude at the RA/CA  
junction (typically 40-50 mV). RA and CA are then chosen  
from standard value components to satisfy the above product.  
Typically CA is 1000 pF to 5000 pF, and RA is 10 kto 300  
k. CB is then chosen large compared to CA, typically 0.1 µF.  
30074922  
FIGURE 8. Minimum Output Ripple Using Ripple Injection  
13  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted  
8-Lead MSOP Package  
NS Package Number MUA08A  
8-Lead LLP Package  
NS Package Number SDC08B  
www.national.com  
14  
15  
www.national.com  
Notes  
For more National Semiconductor product information and proven design tools, visit the following Web sites at:  
Products  
www.national.com/amplifiers  
Design Support  
www.national.com/webench  
Amplifiers  
WEBENCH® Tools  
App Notes  
Audio  
www.national.com/audio  
www.national.com/timing  
www.national.com/adc  
www.national.com/interface  
www.national.com/lvds  
www.national.com/power  
www.national.com/appnotes  
www.national.com/refdesigns  
www.national.com/samples  
www.national.com/evalboards  
www.national.com/packaging  
www.national.com/quality/green  
www.national.com/contacts  
www.national.com/quality  
www.national.com/feedback  
www.national.com/easy  
Clock and Timing  
Data Converters  
Interface  
Reference Designs  
Samples  
Eval Boards  
LVDS  
Packaging  
Power Management  
Green Compliance  
Distributors  
Switching Regulators www.national.com/switchers  
LDOs  
www.national.com/ldo  
www.national.com/led  
www.national.com/vref  
www.national.com/powerwise  
Quality and Reliability  
Feedback/Support  
Design Made Easy  
Solutions  
LED Lighting  
Voltage Reference  
PowerWise® Solutions  
www.national.com/solutions  
www.national.com/milaero  
www.national.com/solarmagic  
www.national.com/training  
Serial Digital Interface (SDI) www.national.com/sdi  
Mil/Aero  
Temperature Sensors  
Wireless (PLL/VCO)  
www.national.com/tempsensors SolarMagic™  
www.national.com/wireless  
PowerWise® Design  
University  
THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION  
(“NATIONAL”) PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY  
OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO  
SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS,  
IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS  
DOCUMENT.  
TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT  
NATIONAL’S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL  
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National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other  
brand or product names may be trademarks or registered trademarks of their respective holders.  
Copyright© 2009 National Semiconductor Corporation  
For the most current product information visit us at www.national.com  
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