LP2986ILD-5/NOPB [NSC]
IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.35 V DROPOUT, PDSO8, LLP-8, Fixed/Adjustable Positive Single Output LDO Regulator;
| 型号： | LP2986ILD-5/NOPB |
| 厂家： | 
National Semiconductor |
| 描述： | IC VREG FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.35 V DROPOUT, PDSO8, LLP-8, Fixed/Adjustable Positive Single Output LDO Regulator 光电二极管 输出元件 调节器 |
| 文件： | 总17页 (文件大小：532K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Search http://www.ti.com/ for the latest technical
information and details on our current products and services.
January 19, 2010
LP2986
Micropower, 200 mA Ultra Low-Dropout Fixed or
Adjustable Voltage Regulator
General Description
Features
The LP2986 is a 200 mA precision LDO voltage regulator
which offers the designer a higher performance version of the
industry standard LP2951.
Ultra low dropout voltage
■
■
Guaranteed 200 mA output current
SO-8 and mini-SO8 surface mount packages
■
■
■
■
■
■
■
■
Using an optimized VIP™ (Vertically Integrated PNP) pro-
cess, the LP2986 delivers superior performance:
<1 μA quiescent current when shutdown
Low ground pin current at all loads
Dropout Voltage: Typically 180 mV @ 200 mA load, and 1
mV @ 1 mA load.
0.5% output voltage accuracy (“A” grade)
High peak current capability (400 mA typical)
Wide supply voltage range (16V max)
Overtemperature/overcurrent protection
−40°C to +125°C junction temperature range
Ground Pin Current: Typically 1 mA @ 200 mA load, and
200 μA @ 10 mA load.
Sleep Mode: The LP2986 draws less than 1 μA quiescent
current when shutdown pin is pulled low.
Error Flag: The built-in error flag goes low when the output
drops approximately 5% below nominal.
Applications
Precision Output: The standard product versions available
can be pin-strapped (using the internal resistive divider) to
provide output voltages of 5.0V, 3.3V, or 3.0V with guaran-
teed accuracy of 0.5% (“A” grade) and 1% (standard grade)
at room temperature.
Cellular Phone
■
■
Palmtop/Laptop Computer
Camcorder, Personal Stereo, Camera
■
Block Diagram
1293501
VIP™ is a trademark of National Semiconductor Corporation.
© 2011 National Semiconductor Corporation
12935
www.national.com
Connection Diagrams
8-Lead SOIC Narrow Package
1293502
Top View
See NS Package Drawing Number M08A
8-Lead Mini-SOIC Package
1293546
Top View
See NS Package Drawing Number MUA08A
8-Lead LLP Package
1293543
Top View
See NS Package Drawing LDC08A
See LLP MOUNTING section
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2
Ordering Information
TABLE 1. Package Marking and Ordering Information
Output
Grade
Order
Information
Package
Marking
Supplied as:
Voltage
Mini SO-8
5
A
A
LP2986AIMMX-5.0
LP2986AIMM-5.0
LP2986IMMX-5.0
LP2986IMM-5.0
LP2986AIMMX-3.3
LP2986AIMM-3.3
LP2986IMMX-3.3
LP2986IMM-3.3
LP2986AIMMX-3.0
LP2986AIMM-3.0
LP2986IMMX-3.0
LP2986IMM-3.0
L41A
L41A
L41B
L41B
L40A
L40A
L40B
L40B
L39A
L39A
L39B
L39B
3500 Units on Tape and Reel
1000 Units on Tape and Reel
3500 Units on Tape and Reel
1000 Units on Tape and Reel
3500 Units on Tape and Reel
1000 Units on Tape and Reel
3500 Units on Tape and Reel
1000 Units on Tape and Reel
3500 Units on Tape and Reel
1000 Units on Tape and Reel
3500 Units on Tape and Reel
1000 Units on Tape and Reel
5
5
STD
STD
A
5
3.3
3.3
3.3
3.3
3.0
3.0
3.0
3.0
A
STD
STD
A
A
STD
STD
SO-8
5
A
A
LP2986AIMX-5.0
LP2986AIM-5.0
LP2986IMX-5.0
LP2986IM-5.0
2986AIM5.0
2986AIM5.0
2986IM5.0
2986IM5.0
2986AIM3.3
2986AIM3.3
2986IM3.3
2986IM3.3
2986AIM3.0
2986AIM3.0
2986IM3.0
2986IM3.0
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
2500 Units on Tape and Reel
Shipped in Anti-Static Rails
5
5
STD
STD
A
5
3.3
3.3
3.3
3.3
3.0
3.0
3.0
3.0
LP2986AIMX-3.3
LP2986AIM-3.3
LP2986IMX-3.3
LP2986IM-3.3
A
STD
STD
A
LP2986AIMX-3.0
LP2986AIM-3.0
LP2986IMX-3.0
LP2986IM-3.0
A
STD
STD
8-Lead LLP
5
A
A
LP2986AILD-5
LP2986AILDX-5
LP2986ILD-5
L006A
L006A
1000 Units on Tape and Reel
4500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
1000 Units on Tape and Reel
4500 Units on Tape and Reel
5
5
STD
STD
A
L006AB
L006AB
L005A
5
LP2986ILDX-5
LP2986AILD-3.3
LP2986AILDX-3.3
LP2986ILD-3.3
LP2986ILDX-3.3
LP2986AILD-3.0
LP2986AILDX-3.0
LP2986ILD-3.0
LP2986ILDX-3.0
3.3
3.3
3.3
3.3
3.0
3.0
3.0
3.0
A
L005A
STD
STD
A
L005AB
L005AB
L004A
A
L004A
STD
STD
L004AB
L004AB
For LP2986 Ordering and Availability Information see: http://www.national.com/mpf/LP/LP2986.html#Order
3
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Input Supply Voltage
(Survival)
Input Supply Voltage
(Operating)
Shutdown Pin
Feedback Pin
Absolute Maximum Ratings (Note 1)
−0.3V to +16V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
2.1V to +16V
−0.3V to +16V
−0.3V to +5V
Storage Temperature Range
−65°C to +150°C
Operating Junction
Temperature Range
Lead Temperature
(Soldering, 5 seconds)
ESD Rating (Note 2)
Output Voltage
(Survival) (Note 4)
IOUT (Survival)
−40°C to +125°C
−0.3V to +16V
Short Circuit Protected
260°C
2 kV
Internally Limited
Input-Output Voltage
(Survival) (Note 5)
−0.3V to +16V
Power Dissipation (Note 3)
Electrical Characteristics
Limits in standard typeface are for T J = 25°C, and limits in boldface type apply over the full operating temperature range. Unless
otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, COUT = 4.7 µF, CIN = 2.2 µF, VS/D = 2V.
LM2986AI-X.X
LM2986I-X.X
(Note 6)
(Note 6)
Symbol
VO
Parameter
Output Voltage
Conditions
0.1 mA < IL < 200 mA
0.1 mA < IL < 200 mA
Typical
Units
Min
Max
Min
Max
5.0
5.0
3.3
3.3
3.0
3.0
4.975
4.960
4.910
3.283
3.274
3.241
2.985
2.976
2.946
5.025
5.040
5.090
3.317
3.326
3.359
3.015
3.024
3.054
0.014
0.032
4.950
4.920
4.860
3.267
3.247
3.208
2.970
2.952
2.916
5.050
5.080
5.140
3.333
3.353
3.392
3.030
3.048
3.084
0.014
0.032
(5.0V Versions)
Output Voltage
(3.3V Versions)
V
Output Voltage
(3.0V Versions)
0.1 mA < IL < 200 mA
Output Voltage Line
Regulation
VO(NOM) + 1V ≤ VIN ≤ 16V
0.007
%/V
mV
VIN–VO
Dropout Voltage
(Note 7)
IL = 100 µA
IL = 75 mA
IL = 200 mA
IL = 100 µA
IL = 75 mA
IL = 200 mA
2.0
3.5
2.0
3.5
1
120
170
230
350
120
150
800
1400
2.1
120
170
230
350
120
150
800
1400
2.1
90
180
100
500
1
IGND
Ground Pin Current
µA
mA
µA
3.7
3.7
VS/D < 0.3V
1.5
1.5
0.05
400
IO(PK)
Peak Output Current
Short Circuit Current
250
250
VOUT ≥ VO(NOM) − 5%
RL = 0 (Steady State) (Note
mA
IO(MAX)
400
160
11)
en
Output Noise Voltage
(RMS)
BW = 300 Hz to 50 kHz,
COUT = 10 µF
µV(RMS)
dB
Ripple Rejection
f = 1 kHz, COUT = 10 µF
65
20
Output Voltage
Temperature Coefficient
(Note 9)
ppm/°C
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4
LM2986AI-X.X
LM2986I-X.X
(Note 6)
(Note 6)
Symbol
Parameter
Conditions
Typical
Units
Min
Max
Min
Max
FEEDBACK PIN
VFB
Feedback Pin Voltage
1.21
1.20
1.19
1.25
1.26
1.28
1.20
1.19
1.18
1.26
1.27
1.29
1.23
1.23
20
V
(Note 10)
(Note 9)
FB Pin Voltage
Temperature Coefficient
ppm/°C
nA
IFB
Feedback Pin Bias Current IL = 200 mA
330
330
150
0.1
760
760
FB Pin Bias Current
(Note 9)
nA/°C
Temperature Coefficient
SHUTDOWN INPUT
VS/D S/D Input Voltage
VH = O/P ON
VL = O/P OFF
VS/D = 0
1.6
1.6
1.4
0.55
0
V
(Note 8)
0.18
−1
0.18
−1
IS/D
S/D Input Current
µA
VS/D = 5V
15
15
5
ERROR COMPARATOR
IOH
Output “HIGH” Leakage
VOH = 16V
1
1
0.01
150
µA
2
2
VOL
Output “LOW” Voltage
Upper Threshold Voltage
Lower Threshold Voltage
Hysteresis
VIN = VO(NOM) − 0.5V, IO
(COMP) = 300 µA
220
350
−3.5
−2.5
−4.9
−3.3
220
350
−3.5
−2.5
−4.9
−3.3
mV
VTHR
−5.5
−7.7
−5.5
−7.7
−4.6
(MAX)
%VOUT
VTHR
−8.9
−8.9
−6.6
2.0
(MIN)
−13.0
−13.0
HYST
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the
device outside of its rated operating conditions.
Note 2: The ESD rating of the Feedback pin is 500V. The ESD rating of the VIN pin is 1kV and the Tap pin is 1.5 kV.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ
−A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using:
The value of θJ−A for the SO-8 (M) package is 160°C/W, and the mini SO-8 (MM) package is 200°C/W. The value θJ−A for the LLP (LD) package is specifically
dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the LLP
package, refer to Application Note AN-1187. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will
go into thermal shutdown.
Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LM2986 output must be diode-clamped to ground.
Note 5: The output PNP structure contains a diode between the V IN and VOUT terminals that is normally reverse-biased. Forcing the output above the input will
turn on this diode and may induce a latch-up mode which can damage the part (see Application Hints).
Note 6: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality
Control (SQC) methods. The limits are used to calculate National's Average Outgoing Quality Level (AOQL).
Note 7: Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential.
Note 8: To prevent mis-operation, the Shutdown input must be driven by a signal that swings above VH and below VL with a slew rate not less than 40 mV/µs
(see Application Hints).
Note 9: Temperature coefficient is defined as the maximum (worst-case) change divided by the total temperature range.
Note 10: VFB ≤ VOUT ≤ (VIN − 1), 2.5V ≤ VIN ≤ 16V, 100 µA ≤ IL ≤ 200 mA, TJ ≤ 125°C.
Note 11: See Typical Performance Characteristics curves.
5
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Typical Performance Characteristics Unless otherwise specified: TA = 25°C, COUT = 4.7 µF,
CIN = 2.2 µF, S/D is tied to VIN, VIN = VO(NOM) + 1V, IL = 1 mA.
VOUT vs Temperature
Dropout Voltage vs Temperature
1293509
1293508
Dropout Voltage vs Load Current
Dropout Characteristics
1293510
1293513
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6
Ground Pin Current vs Temperature and Load
Ground Pin Current vs Load Current
1293512
1293511
Input Current vs VIN
Input Current vs VIN
1293515
1293514
Load Transient Response
Load Transient Response
1293516
1293517
7
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Line Transient Response
Line Transient Response
1293518
1293520
Turn-On Waveform
Turn-Off Waveform
1293523
1293521
Short Circuit Current
Short Circuit Current
1293524
1293525
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8
Short Circuit Current vs Output Voltage
Instantaneous Short Circuit Current vs Temperature
1293527
1293526
DC Load Regulation
Feedback Bias Current vs Load
1293529
1293528
Feedback Bias Current vs Temperature
Shutdown Pin Current vs Shutdown Pin Voltage
1293531
1293530
9
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Shutdown Voltage vs Temperature
Input to Output Leakage vs Temperature
1293532
1293537
Output Noise Density
Output Impedance vs Frequency
1293535
1293534
Output Impedance vs Frequency
Ripple Rejection
1293536
1293533
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10
Basic Application Circuits
Application Using Internal Resistive Divider
1293503
Application Using External Divider
1293504
11
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Application Hints
LLP PACKAGE DEVICES
The minimum required amount of output capacitance is
4.7 µF. Output capacitor size can be increased without limit.
The LP2986 is offered in the 8 lead LLP surface mount pack-
age to allow for increased power dissipation compared to the
SO-8 and Mini SO-8. For details on LLP thermal performance
as well as mounting and soldering specifications, refer to the
LLP MOUNTING section.
It is important to remember that capacitor tolerance and vari-
ation with temperature must be taken into consideration when
selecting an output capacitor so that the minimum required
amount of output capacitance is provided over the full oper-
ating temperature range. A good Tantalum capacitor will
show very little variation with temperature, but a ceramic may
not be as good (see next section).
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are re-
quired to assure stability. These capacitors must be correctly
selected for proper performance.
CAPACITOR CHARACTERISTICS
TANTALUM: The best choice for size, cost, and performance
are solid tantalum capacitors. Available from many sources,
their typical ESR is very close to the ideal value required on
the output of many LDO regulators.
INPUT CAPACITOR: An input capacitor (≥2.2 µF) is required
between the LP2986 input and ground (amount of capaci-
tance may be increased without limit).
This capacitor must be located a distance of not more than
0.5” from the input pin and returned to a clean analog ground.
Any good quality ceramic or tantalum may be used for this
capacitor.
Tantalums also have good temperature stability: a 4.7 µF was
tested and showed only a 10% decline in capacitance as the
temperature was decreased from +125°C to −40°C. The ESR
increased only about 2:1 over the same range of temperature.
OUTPUT CAPACITOR: The output capacitor must meet the
requirement for minimum amount of capacitance and also
have an appropriate E.S.R. (equivalent series resistance) val-
ue.
However, it should be noted that the increasing ESR at lower
temperatures present in all tantalums can cause oscillations
when marginal quality capacitors are used (where the ESR of
the capacitor is near the upper limit of the stability range at
room temperature).
Curves are provided which show the allowable ESR range as
a function of load current for various output voltages and ca-
pacitor values (see ESR curves below).
CERAMIC: For a given amount of a capacitance, ceramics
are usually larger and more costly than tantalums.
ESR Curves For 5V Output
Be warned that the ESR of a ceramic capacitor can be low
enough to cause instability: a 2.2 µF ceramic was measured
and found to have an ESR of about 15 mΩ.
If a ceramic capacitor is to be used on the LP2986 output, a
1Ω resistor should be placed in series with the capacitor to
provide a minimum ESR for the regulator.
Another disadvantage of ceramic capacitors is that their ca-
pacitance varies a lot with temperature:
Large ceramic capacitors are typically manufactured with the
Z5U temperature characteristic, which results in the capaci-
tance dropping by a 50% as the temperature goes from 25°C
to 80°C.
This means you have to buy a capacitor with twice the mini-
mum COUT to assure stable operation up to 80°C.
ALUMINUM: The large physical size of aluminum electrolyt-
ics makes them unattractive for use with the LP2986. Their
ESR characteristics are also not well suited to the require-
ments of LDO regulators.
1293506
ESR Curves For 2.5V Output
The ESR of an aluminum electrolytic is higher than a tanta-
lum, and it also varies greatly with temperature.
A typical aluminum electrolytic can exhibit an ESR increase
of 50X when going from 20°C to −40°C. Also, some aluminum
electrolytics can not be used below −25°C because the elec-
trolyte will freeze.
USING AN EXTERNAL RESISTIVE DIVIDER
The LP2986 output voltage can be programmed using an ex-
ternal resistive divider (see Basic Application Circuits).
The resistor connected between the Feedback pin and
ground should be 51.1k. The value for the other resistor (R1)
connected between the Feedback pin and the regulated out-
put is found using the formula:
VOUT = VFB × (1 + ( R1 / 51.1k ))
1293507
IMPORTANT: The output capacitor must maintain its ESR in
the stable region over the full operating temperature range of
the application to assure stability.
It should be noted that the 25 µA of current flowing through
the external divider is approximately equal to the current
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12
saved by not connecting the internal divider, which means the
quiescent current is not increased by using external resistors.
Board
Type
Thermal
Vias
θJC
θJA
A lead compensation capacitor (CF) must also be used to
place a zero in the loop response at about 50 kHz. The value
for C F can be found using:
JEDEC
2-Layer
JESD 51-3
None
7.2°C/W
184°C/W
CF = 1/(2π × R1 × 50k)
1
2
4
6
7.2°C/W
7.2°C/W
7.2°C/W
7.2°C/W
64°C/W
55°C/W
46°C/W
43°C/W
JEDEC
4-Layer
JESD 51-7
A good quality capacitor must be used for CF to ensure that
the value is accurate and does not change significantly over
temperature. Mica or ceramic capacitors can be used, as-
suming a tolerance of ±20% or better is selected.
If a ceramic is used, select one with a temperature coefficient
of NPO, COG, Y5P, or X7R. Capacitor types Z5U, Y5V, and
Z4V can not be used because their value varies more that
50% over the −25°C to +85°C temperature range.
REVERSE INPUT-OUTPUT VOLTAGE
The PNP power transistor used as the pass element in the
LP2986 has an inherent diode connected between the regu-
lator output and input.
SHUTDOWN INPUT OPERATION
During normal operation (where the input voltage is higher
than the output) this diode is reverse-biased.
The LP2986 is shut off by driving the Shutdown input low, and
turned on by pulling it high. If this feature is not to be used,
the Shutdown input should be tied to VIN to keep the regulator
output on at all times.
However, if the output voltage is pulled above the input, or the
input voltage is pulled below the output, this diode will turn ON
and current will flow into the regulator output pin.
To assure proper operation, the signal source used to drive
the Shutdown input must be able to swing above and below
the specified turn-on/turn-off voltage thresholds listed as VH
and VL, respectively (see Electrical Characteristics).
Since the Shutdown input comparator does not have hystere-
sis, It is also important that the turn-on (and turn-off) voltage
signals applied to the Shutdown input have a slew rate which
is not less than 40 mV/µs when moving between the VH and
VL thresholds.
CAUTION: The regulator output state (either On or Off) can
not be guaranteed if a slow-moving AC (or DC) signal is ap-
plied that is in the range between VH and VL.
1293544
FIGURE 1. LP2986 Reverse Current Path
LLP MOUNTING
The LDC08A (Pullback) 8-Lead LLP package requires spe-
cific mounting techniques which are detailed in National
Semiconductor Application Note # 1187. Referring to the sec-
tion PCB Design Recommendations in AN-1187 (Page 5),
it should be noted that the pad style which should be used
with this LLP package is the NSMD (non-solder mask defined)
type. Additionally, for optimal reliability, there is a recom-
mended 1:1 ratio between the package pad and the PCB pad
for the Pullback LLP..
In such cases, a parasitic SCR can latch which will allow a
high current to flow into VIN (and out the ground pin), which
can damage the part.
In any application where the output voltage may be higher
than the input, an external Schottky diode must be connected
from VIN to VOUT (cathode on VIN, anode on VOUT), to limit the
reverse voltage across the LP2986 to 0.3V (see the Absolute
Maximum Ratings section.
The thermal dissipation of the LLP package is directly related
to the printed circuit board construction and the amount of
additional copper area connected to the DAP.
The DAP (exposed pad) on the bottom of the LLP package is
connected to the die substrate with a conductive die attach
adhesive. The DAP has no direct electrical (wire) connection
to any of the eight pins. There is a parasitic PN junction be-
tween the die substrate and the device ground. As such, it is
strongly recommend that the DAP be connected directly to
the ground at device lead 1 (i.e. GROUND). Alternately, but
not recommended, the DAP may be left floating (i.e. no elec-
trical connection). The DAP must not be connected to any
potential other than ground.
For the LP2986 in the LDC08A 8-Lead LLP package, the
junction-to-case thermal rating (θJC) is 7.2°C/W, where the
'case' is on the bottom of the package at the center of the
DAP.
1293545
FIGURE 2. Adding External Schottky Diode Protection
The junction-to-ambient thermal performance for the LP2986
in the LDC08A 8-Lead LLP package, using the JEDEC
JESD51 standards is summarized in the following table:
13
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Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Mini SOIC (118 mils wide), JEDEC MO-187-AA
NS Package Number MUA08A
8-Lead SOIC NARROW (154 mils wide), JEDEC MS-012-AA
NS Package Number M08A
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14
8-Lead LLP Surface Mount Package
NS Package Number LDC08A
15
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Notes
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