LP3892ET-1.8 [NSC]

1.5A Fast-Response Ultra Low Dropout Linear Regulators; 1.5A快速响应超低压降线性稳压器


型号：	LP3892ET-1.8
厂家：	National Semiconductor
描述：	1.5A Fast-Response Ultra Low Dropout Linear Regulators 1.5A快速响应超低压降线性稳压器稳压器
文件：	总12页 (文件大小：313K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

September 2003

LP3892

1.5A Fast-Response Ultra Low Dropout Linear

Regulators

General Description

Features

n Ultra low dropout voltage (140 mV 1.5A typ)

The LP3892 is a high current, fast response regulator which

can maintain output voltage regulation with minimum input to

output voltage drop. Fabricated on a CMOS process, the

device operates from two input voltages: Vbias provides

voltage to drive the gate of the N-MOS power transistor,

while Vin is the input voltage which supplies power to the

load. The use of an external bias rail allows the part to

operate from ultra low Vin voltages. Unlike bipolar regula-

tors, the CMOS architectutre consumes extremely low qui-

escent current at any output load current. The use of an

n Low ground pin current

n Load regulation of 0.04%/A

n 60 nA typical quiescent current in shutdown

n 1.5% output accuracy (25˚C)

n TO-220, TO-263 packages

n Over temperature/over current protection

n −40˚C to +125˚C junction temperature range

N-MOS power transistor results in wide bandwidth, yet mini- Applications

mum external capacitance is required to maintain loop sta-

bility.

n DSP Power Supplies

n Server Core and I/O Supplies

n PC Add-in-Cards

n Local Regulators in Set-Top Boxes

n Microcontroller Power Supplies

n High Efficiency Power Supplies

n SMPS Post-Regulators

The fast transient response of these devices makes them

suitable for use in powering DSP, Microcontroller Core volt-

ages and Switch Mode Power Supply post regulators. The

parts are available in TO-220 and TO-263 packages.

Dropout Voltage:140mV (typ) 1.5A load current.

Ground Pin Current: 3 mA (typ) at full load.

Shutdown Current: 60 nA (typ) when S/D pin is low.

Precision Output Voltage: 1.5% room temperature accu-

racy.

Typical Application Circuit

20069601

At least 10 µF of input and output capacitance is required for stability.

*Tantalum capacitors are recommended. Aluminum electrolytic capacitors may be used for restricted temperature range. See application hints.

Connection Diagrams

20069602

20069603

TO-220, Top View

TO-263, Top View

DS200696

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Ordering Information

Order Number

LP3892ES-1.2

LP3892ESX-1.2

LP3892ET-1.2

LP3892ES-1.5

LP3892ESX-1.5

LP3892ET-1.5

LP3892ES-1.8

LP3892ESX-1.8

LP3892ET-1.8

Package Type

TO263-5

TO220-5

TO263-5

TO220-5

TO263-5

TO220-5

Package Drawing

TS5B

Supplied As

Rail

TS5B

Tape and Reel

Rail

T05D

TS5B

Rail

TS5B

Tape and Reel

Rail

T05D

TS5B

Rail

TS5B

Tape and Reel

Rail

T05D

Block Diagram

20069624

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Shutdown Input Voltage (Survival)

I_OUT(Survival)

−0.3V to +7V

Internally Limited

−0.3V to +6V

Output Voltage (Survival)

Junction Temperature

−40˚C to +150˚C

Storage Temperature Range

Lead Temp. (Soldering, 5 seconds)

ESD Rating

−65˚C to +150˚C

260˚C

Operating Ratings

V_IN

(V_OUT+ V_DO) to 5.5V

0 to +6V

Human Body Model (Note 3)

Machine Model (Note 10)

Power Dissipation (Note 2)

V_INSupply Voltage (Survival)

V_BIASSupply Voltage (Survival)

2 kV

200V

Shutdown

I_OUT

1.5A

Internally Limited

−0.3V to +6V

−0.3V to +7V

Junction Temperature

V_BIAS

−40˚C to +125˚C

4.5V to 6V

Electrical Characteristics Limits in standard typeface are for T_J= 25˚C, and limits in boldface type apply

over the full operating temperature range. Unless otherwise specified: V_IN= V_O(NOM) + 1V, V_BIAS= 4.5V, I_L= 10 mA, C_IN

C_OUT= 10µF, V_S/D= V_BIAS

Typical

MIN

MAX

Symbol

V_O

Parameter

Conditions

10 mA ≤ I_L≤ 1.5A

Units

(Note 4) (Note 5) (Note 5)

Output Voltage Tolerance

1.198

1.234

V_O(NOM) + 1V ≤ V_IN≤ 5.5V

4.5V ≤ V_BIAS≤ 6V

1.216

1.5

1.186

1.246

1.478

1.522

1.455

1.545

1.773

1.827

1.8

1.746

1.854

∆V_O/∆V_IN

∆V_O/∆I_L

V_DO

Output Voltage Line Regulation

(Note 7)

V_O(NOM) + 1V ≤ V_IN≤ 5.5V

0.01

%/V

%/A

µA

Output Voltage Load Regulation 10 mA ≤ I_L≤ 1.5A

(Note 8)

0.04

0.06

Dropout Voltage (Note 9)

I_L= 1.5A

320

500

140

I_Q(V_IN

)

Quiescent Current Drawn from

V_INSupply

10 mA ≤ I_L≤ 1.5A

≤ 0.3V

S/D

0.03

I_Q(V_BIAS

)

Quiescent Current Drawn from

V_BIASSupply

10 mA ≤ I_L≤ 1.5A

≤ 0.3V

S/D

0.03

µA

I_SC

Short-Circuit Current

V_OUT= 0V

Shutdown Input

V_SDT

Output Turn-off Threshold

Output = ON

Output = OFF

R_LOADX C_OUT

V _S/D=1.3V

0.7

1.3

0.3

Td (OFF)

Td (ON)

I_S/D

Turn-OFF Delay

Turn-ON Delay

S/D Input Current

Td (OFF)

Td (ON)

µs

µA

≤ 0.3V

−1

S/D

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Electrical Characteristics Limits in standard typeface are for T_J= 25˚C, and limits in boldface type apply

over the full operating temperature range. Unless otherwise specified: V_IN= V_O(NOM) + 1V, V_BIAS= 4.5V, I_L= 10 mA, C_IN

C_OUT= 10µF, V_S/D= V_BIAS. (Continued)

Typical

MIN

MAX

Symbol

Parameter

Conditions

Units

(Note 4) (Note 5) (Note 5)

AC Parameters

PSRR (V_IN

)

Ripple Rejection for V_INInput

Voltage

V_IN= V_OUT+1V, f = 120 Hz

V_IN= V_OUT+ 1V, f = 1 kHz

PSRR

Ripple Rejection for V_BIAS

Voltage

V_BIAS= V_OUT+ 3V, f = 120 Hz

(V_BIAS

)

V_BIAS= V_OUT+ 3V, f = 1 kHz

f = 120 Hz

Output Noise Density

Output Noise Voltage

µV/root−Hz

µV (rms)

e_n

BW = 10 Hz − 100 kHz, V_OUT=

150

1.8V

BW = 300 Hz − 300 kHz, V_OUT

= 1.8V

Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device

is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not

apply when operating the device outside of its rated operating conditions.

Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink thermal values. θ

for TO-220

J-A

devices is 65˚C/W if no heatsink is used. If the TO-220 device is attached to a heatsink, a θ

value of 4˚C/W can be assumed. θ

for TO-263 devices is

J-S

J-A

approximately 40˚C/W if soldered down to a copper plane which is at least 1.5 square inches in area. If power dissipation causes the junction temperature to exceed

specified limits, the device will go into thermal shutdown.

Note 3: The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin.

Note 4: Typical numbers represent the most likely parametric norm for 25˚C operation.

Note 5: Limits are guaranteed through testing, statistical correlation, or design.

Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground.

Note 7: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.

Note 8: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load.

Note 9: Dropout voltage is defined as the minimum input to output differential required to maintain the output with 2% of nominal value.

Note 10: The machine model is a 220 pF capacitor discharged directly into each pin. The machine model ESD rating of pin 5 is 100V.

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Typical Performance Characteristics Unless otherwise specified: T_J= 25˚C, C_OUT= 10 µF, Cin =

10 µF, S/D pin is tied to V_BIAS, V_IN= 2.2V, V_OUT= 1.8V.

I_GNDvs VSD

V_OUTvs Temperature

Line Regulation vs V_IN

I_BIASvs I_L

20069605

20069607

20069609

20069606

DC Load Regulation

20069608

Line Regulation vs V_BIAS

20069610

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Typical Performance Characteristics Unless otherwise specified: T_J= 25˚C, C_OUT= 10 µF, Cin = 10

µF, S/D pin is tied to V_BIAS, V_IN= 2.2V, V_OUT= 1.8V. (Continued)

I_GNDvs VSD

Noise Measurement

20069612

20069614

20069616

20069619

V_OUTStartup Waveform

20069615

Line Regulation vs V_BIAS

20069618

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Typical Performance Characteristics Unless otherwise specified: T_J= 25˚C, C_OUT= 10 µF, Cin = 10

µF, S/D pin is tied to V_BIAS, V_IN= 2.2V, V_OUT= 1.8V. (Continued)

V_INPSRR

20069620

20069623

V_BIASPSRR

20069622

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LP389X devices. The regulator output can tolerate ceramic

capacitance totaling up to 15% of the amount of Tantalum

capacitance connected from the output to ground.

Application Hints

V_BIASRESTRICTIONS FOR PROPER START-UP

To prevent misoperation, ensure that V_BIASis below 50mV

before start-up is initiated. This scenario can occur in sys-

tems with a backup battery using reverse-biased "blocking"

diodes which may allow enough leakage current to flow into

the V_BIASnode to raise it’s voltage slightly above ground

when the main power is removed. Using low leakage diodes

or a resistive pull down can prevent the voltage at V_BIASfrom

rising above 50mV. Large bulk capacitors connected to

V_BIASmay also cause a start-up problem if they do not

discharge fully before re-start is initiated (but only if V_BIASis

allowed to fall below 1V). A resistor connected across the

capacitor will allow it to discharge more quickly. It should be

noted that the probability of a "false start" caused by incor-

rect logic states is extremely low.

INPUT CAPACITOR

The input capacitor must be at least 10 µF, but can be

increased without limit. It’s purpose is to provide a low

source impedance for the regulator input. Ceramic capaci-

tors work best for this, but Tantalums are also very good.

There is no ESR limitation on the input capacitor (the lower,

the better). Aluminum electrolytics can be used, but their

ESR increase very quickly at cold temperatures. They are

not recommended for any application where temperatures

go below about 10˚C.

BIAS CAPACITOR

The 0.1µF capacitor on the bias line can be any good quality

capacitor (ceramic is recommended).

EXTERNAL CAPACITORS

BIAS VOLTAGE

To assure regulator stability, input and output capacitors are

required as shown in the Typical Application Circuit.

The bias voltage is an external voltage rail required to get

gate drive for the N-FET pass transistor. Bias voltage must

be in the range of 4.5 - 6V to assure proper operation of the

part.

OUTPUT CAPACITOR

At least 10µF of output capacitance is required for stability

(the amount of capacitance can be increased without limit).

The output capacitor must be located less than 1 cm from

the output pin of the IC and returned to a clean analog

ground. The ESR (equivalent series resistance) of the output

capacitor must be within the "stable" range as shown in the

graph below over the full operating temperature range for

stable operation.

UNDER VOLTAGE LOCKOUT

The bias voltage is monitored by a circuit which prevents the

regulator output from turning on if the bias voltage is below

approximately 4V.

SHUTDOWN OPERATION

Pulling down the shutdown (S/D) pin will turn-off the regula-

tor. Pin S/D must be actively terminated through a pull-up

resistor (10 kΩ to 100 kΩ) for a proper operation. If this pin

is driven from a source that actively pulls high and low (such

as a CMOS rail to rail comparator), the pull-up resistor is not

required. This pin must be tied to Vin if not used.

POWER DISSIPATION/HEATSINKING

A heatsink may be required depending on the maximum

power dissipation and maximum ambient temperature of the

application. Under all possible conditions, the junction tem-

perature must be within the range specified under operating

conditions. The total power dissipation of the device is given

by:

P_D= (V_IN−V_OUT)I_OUT+ (V_IN)I_GND

where I_GNDis the operating ground current of the device.

20069631

The maximum allowable temperature rise (T_Rmax) depends

on the maximum ambient temperature (T_Amax) of the appli-

cation, and the maximum allowable junction temperature

(T_Jmax):

Minimum ESR vs Output Load Current

Tantalum capacitors are recommended for the output as

their ESR is ideally suited to the part’s requirements and the

ESR is very stable over temperature. Aluminum electrolytics

are not recommended because their ESR increases very

rapidly at temperatures below 10˚C. Aluminum caps can only

be used in applications where lower temperature operation

is not required.

T_Rmax= T_Jmax− T_Amax

The maximum allowable value for junction to ambient Ther-

mal Resistance, θ_JA, can be calculated using the formula:

θ_JA= T_Rmax/ P_D

These parts are available in TO-220 and TO-263 packages.

The thermal resistance depends on amount of copper area

or heat sink, and on air flow. If the maximum allowable value

of θ_JAcalculated above is ≥ 60 ˚C/W for TO-220 package

and ≥ 60 ˚C/W for TO-263 package no heatsink is needed

since the package can dissipate enough heat to satisfy these

requirements. If the value for allowable θ_JAfalls below these

limits, a heat sink is required.

A second problem with Al caps is that many have ESR’s

which are only specified at low frequencies. The typical loop

bandwidth of a linear regulator is a few hundred kHz to

several MHz. If an Al cap is used for the output cap, it must

be one whose ESR is specified at a frequency of 100 kHz or

more.

Because the ESR of ceramic capacitors is only a few milli

Ohms, they are not suitable for use as output capacitors on

www.national.com

sizes, using a typical PCB with 1 ounce copper and no solder

mask over the copper area for heat sinking.

Application Hints (Continued)

HEATSINKING TO-220 PACKAGE

The thermal resistance of a TO220 package can be reduced

by attaching it to a heat sink or a copper plane on a PC

board. If a copper plane is to be used, the values of θ_JAwill

be same as shown in next section for TO263 package.

The heatsink to be used in the application should have a

heatsink to ambient thermal resistance,

θ_HA≤ θ_JA− θ_CH− θ_JC

In this equation, θ_CHis the thermal resistance from the case

to the surface of the heat sink and θ_JCis the thermal resis-

tance from the junction to the surface of the case. θ_JCis

about 3˚C/W for a TO220 package. The value for θ_CHde-

pends on method of attachment, insulator, etc. θ_CHvaries

between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,

2˚C/W can be assumed.

20069625

HEATSINKING TO-263 PACKAGE

The TO-263 package uses the copper plane on the PCB as

a heatsink. The tab of these packages are soldered to the

copper plane for heat sinking. The graph below shows a

curve for the θ_JAof TO-263 package for different copper area

FIGURE 1. θ_JAvs Copper (1 Ounce) Area for TO-263

package

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Application Hints (Continued)

As shown in the graph below, increasing the copper area

beyond 1 square inch produces very little improvement. The

minimum value for θ_JAfor the TO-263 package mounted to a

PCB is 32˚C/W.

Figure 2 shows the maximum allowable power dissipation

for TO-263 packages for different ambient temperatures,

assuming θ_JAis 35˚C/W and the maximum junction tempera-

ture is 125˚C.

20069626

FIGURE 2. Maximum power dissipation vs ambient

temperature for TO-263 package

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Physical Dimensions inches (millimeters) unless otherwise noted

TO220 5-lead, Molded, Stagger Bend Package (TO220-5)

NS Package Number T05D

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

TO263 5-Lead, Molded, Surface Mount Package (TO263-5)

NS Package Number TS5B

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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

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Support Center

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

LP3892ET-1.8 [NSC]

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