LP3981IMM-2.5 [NSC]

Micropower, 300mA Ultra Low-Dropout CMOS Voltage; 微功耗， 300毫安超低压差CMOS电压


型号：	LP3981IMM-2.5
厂家：	National Semiconductor
描述：	Micropower, 300mA Ultra Low-Dropout CMOS Voltage 微功耗， 300毫安超低压差CMOS电压线性稳压器IC 调节器电源电路光电二极管输出元件
文件：	总11页 (文件大小：337K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

March 2003

LP3981

Micropower, 300mA Ultra Low-Dropout CMOS Voltage

Regulator

n 60dB PSRR at 1kHz

n ≤1µA quiescent current when shut down

n Fast Turn-On time: 120 µs (typ.) with C_BYPASS= 0.01uF

n 132mV typ dropout with 300mA load

General Description

The LP3981’s performance is optimized for battery powered

systems to deliver ultra low noise, extremely low dropout

voltage and low quiescent current. Regulator ground current

n 35µVrms output noise over 10Hz to 100kHz

n −40 to +125˚C junction temperature range for operation

n 2.5V, 2.7V, 2.8V, 2.83V, 3.0V, 3.03V, and 3.3V outputs

standard

increases only slightly in dropout, further prolonging the

battery life.

Power supply rejection is better than 60 dB at low frequen-

cies. This high power supply rejection is maintained down to

lower input voltage levels common to battery operated cir-

cuits.

Features

The device is ideal for mobile phone and similar battery

powered wireless applications. It provides up to 300 mA,

from a 2.5V to 6V input, consuming less than 1µA in disable

mode.

n Small, space saving MSOP-8

n Low Thermal Resistance in LLP-6 package gives

excellent power capability

n Logic controlled enable

The LP3981 is available in MSOP-8 package. For LP3981 in

LLP-6 package, contact NSC sales offices. Performance is

specified for −40˚C to +125˚C temperature range. The de-

vice available in the following output voltages; 2.5V, 2.7V,

2.8V, 2.83V, 3.0V, 3.03V and 3.3V as standard. Other output

options can be made available, please contact your local

NSC sales office.

n Stable with ceramic and high quality tantalum capacitors

n Fast turn-on

n Thermal shutdown and short-circuit current limit

Applications

n CDMA cellular handsets

n Wideband CDMA cellular handsets

n GSM cellular handsets

n Portable information appliances

n Tiny 3.3V 5% to 2.5V, 300mA converter

Key Specifications

n 2.5 to 6.0V input range

n 300mA guaranteed output

Typical Application Circuit

20020302

Note: Pin Numbers in parenthesis indicate LLP-6 package.

DS200203

www.national.com

Block Diagram

20020301

Pin Descriptions

Name

V_EN

MSOP-8

LLP-6

Function

Enable Input Logic, Enable High

Common Ground

GND

V_OUT

V_IN

Output Voltage of the LDO

Input Voltage of the LDO

Optional bypass capacitor for noise

reduction

Bypass

V_OUT-SENSE

Output. Voltage Sense Pin. Should

be connected to V_OUTfor proper

operation.

N.C

3, 8

Connection Diagrams

LLP-6 Package

MSOP-8 Package

20020370

Top View

See NS Package Number LDC06D

20020307

Top View

See NS Package Number MUA008AE

www.national.com

Ordering Information

For LLP-6 Package

Output

Grade

LP3981 Supplied as 1000

LP3981 Supplied as 4500

Units, Tape and Reel

LP3981ILDX-2.5

Package Marking

Voltage (V)

Units, Tape and Reel

LP3981ILD-2.5

LP3981ILD-2.7

LP3981ILD-2.8

LP3981ILD-2.83

LP3981ILD-3.0

LP3981ILD-3.03

LP3981ILD -3.3

2.5

2.7

STD

LO1UB

LO1VB

LO1ZB

L01SB

L017B

LO1YB

LO1XB

LP3981ILDX-2.7

2.8

LP3981ILDX-2.8

2.83

3.0

LP3981ILDX-2.83

LP3981ILDX-3.0

3.03

3.3

LP3981ILDX-3.03

LP3981ILDX-3.3

For MSOP-8 Package

Output

Voltage (V)

2.5

LP3981 Supplied as 1000

Units, Tape and Reel

LP3981IMM-2.5

LP3981 Supplied as 3500

Units, Tape and Reel

LP3981IMMX-2.5

Grade

Package Marking

STD

LFKB

LFLB

LFTB

LDUB

LF3B

LFPB

LFNB

2.7

LP3981IMM-2.7

LP3981IMMX-2.7

2.8

LP3981IMM-2.8

LP3981IMMX-2.8

2.83

LP3981IMM-2.83

LP3981IMM-3.0

LP3981IMMX-2.83

LP3981IMMX-3.0

3.0

3.03

LP3981IMM-3.03

LP3981IMMX-3.03

LP3981IMMX-3.3

3.3

LP3981IMM-3.3

Please contact factory regarding the availability of voltage options not listed here.

www.national.com

Absolute Maximum Ratings (Notes 1,

Maximum Power Dissipation at 25˚C

MSOP-8

595mW

2.5W

LLP-6

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Rating(Note 4)

Human Body Model

Machine Model

2kV

200V

V_IN, V_EN

_OUT, V_OUT-SENSE

−0.3 to 6.5V

−0.3 to V_IN+ 0.3,

Max 6.5V

Operating Ratings (Notes 1, 2)

V_IN

Junction Temperature

Storage Temperature

Lead Temp.

150˚C

2.7 to 6V

0 to V_IN

−65˚C to +150˚C

V_EN

Junction Temperature

−40˚C to +125˚C

Pad Temp.

Maximum Power Dissipation (Note 5)

Power Dissipation (Note 3)

θ_JA(MSOP-8)

θ_JA(LLP-6)

MSOP-8

LLP-6

476mW

2.0W

210˚C/W

50˚C/W

Electrical Characteristics

Unless otherwise specified: V_EN= 1.2V, V_IN= V_OUT+ 0.5V, C_IN= 2.2 µF, C_BP= 0.033 µF, I_OUT= 1mA, C_OUT= 2.2 µF. Typi-

cal values and imits appearing in standard typeface are for T_J= 25˚C. Limits appearing in boldface type apply over the entire

junction temperature range for operation, −40˚C to +125˚C. (Notes 6, 7)

Limit

Symbol

Parameter

Output Voltage

Conditions

Typ

Units

Min

−2

Max

% of

Tolerance

−3

V_OUT(nom)

V_IN= V_OUT+ 0.5V to 6.0V, T_A

+85˚C

0.005

−0.1

0.1

%/V

∆V_OUT

Line Regulation Error

V_IN= V_OUT+ 0.5V to 6.0V, T_J≤125˚C

−0.2

0.2

%/V

Load Regulation Error

(Note 8)

I_OUT= 1 mA to 300 mA

0.0003

0.005 %/mA

V_IN= V_OUT(nom)+ 1V,

f = 1 kHz,

I_OUT= 50 mA (Figure 2)

V_IN= V_OUT(nom)+ 1V,

f = 10 kHz,

Power Supply Rejection Ratio

(Note 10)

PSRR

I_OUT= 50 mA (Figure 2)

V_EN= 1.2V, I_OUT= 1 mA

V_EN= 1.2V, I_OUT= 1 to 300 mA,

V_OUT= 2.5V(Note 12)

V_EN= 0.4V

I_Q

Quiescent Current

120

170

210

µA

0.003

0.5

1.5

I_OUT= 1 mA

Dropout Voltage (Note 9)

Short Circuit Current Limit

Output Noise Voltage

I_OUT= 200 mA

133

200

I_OUT= 300 mA

132

600

I_SC

e_n

Output Grounded

(Steady State)

BW = 10 Hz to 100 kHz,

C_BP= 0.033µF

µVrms

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

Peak Output Current

160

˚C

TSD

I_OUT(PK)

I_EN

V_OUT≥ V_OUT(nom) - 5%

V_EN= 0 and V_IN

455

300

Maximum Input Current at V_EN

Logic Low Input threshold

Logic High Input threshold

0.001

µA

V_IL

V_IN= 2.7 to 6.0V

0.4

V_IH

V_IN= 2.7 to 6.0V

1.4

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Electrical Characteristics (Continued)

Unless otherwise specified: V_EN= 1.2V, V_IN= V_OUT+ 0.5V, C_IN= 2.2 µF, C_BP= 0.033 µF, I_OUT= 1mA, C_OUT= 2.2 µF. Typi-

cal values and imits appearing in standard typeface are for T_J= 25˚C. Limits appearing in boldface type apply over the entire

junction temperature range for operation, −40˚C to +125˚C. (Notes 6, 7)

Limit

Symbol

T_ON

Parameter

Conditions

C_BYPASS= 0.033 µF

Typ

Units

Min

Max

350

Turn-On Time

(Note 10) (Note 11)

µs

240

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device

is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical

Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: The figures given for Absolute Maximum Power disipation for the device are calculated using the following equations:

where T

is the maximum junction temperature, T is the ambient temperature, and θ

is the junction-to-ambient thermal resistance.

J(MAX)

E.g. for the LLP package θ =50˚C/W, T

=150˚C and using T =25˚C the maximum power dissipation is found to be 2.5W. The derating factor (−1/θ ) =

A JA

J(MAX)

−20mW/˚C, thus below 25˚C the power dissipation figure can be increased by 20W per degree, and similarity decreased by this factor for temperatures above 25˚C

Note 4: The human body model is 100pF discharged through 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each

pin.

Note 5: As for the Maximum Power dissipation, the maximum power in operation is dependant on the ambient temperature. This can be calculated in teh same way

using T =125˚C, giving 2W as the maximum power dissipation for the LLP package in operation. The same derating factor applies.

Note 6: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T = 25˚C or correlated using

Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations

and applying statistical process control.

Note 7: The target output voltage, which is labeled V

, is the desired voltage option.

OUT(nom)

Note 8: An increase in the load current results in a slight decrease in the output voltage and vice versa.

Note 9: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This specification does not apply for

input voltages below 2.5V.

Note 10: Guaranteed by design.

Note 11: Turn-on time is time measured between the enable input just exceeding V and the output voltage just reaching 95% of its nominal value.

Note 12: For V

2.5C, Increase I

by 2.5µA for every 0.1V increase in V

OUT(NOM)

OUT

Q(MAX)

i.e. I

= 210 + ((V

- 2.5) * 25)µA

OUT(NOM)

Q(MAX)

Output Capacitor, Recommended Specification

Limit

Symbol

Parameter

Conditions

Typ

Units

Min

2.2

Max

C_OUT

Output Capacitor

Capacitance

ESR

µF

500

mΩ

20020308

FIGURE 1. Line Transient Response Input Perturbation

www.national.com

20020309

FIGURE 2. PSRR Input Perturbation

Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT= 2.2 µF Ceramic,

C_BP= 0.033 µF, V_IN= V_OUT+ 0.5V, T_A= 25˚C, Enable pin is tied to V_IN

Output Voltage vs. Temperature (V_OUT= 2.83V)

Dropout Voltage vs. Temperature (V_OUT= 2.85V)

20020317

20020318

Ground Current vs. Load Current (V_OUT= 2.85V)

Output Short Circuit Current

20020320

20020319

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Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT= 2.2 µF Ceramic,

C_BP= 0.033 µF, V_IN= V_OUT+ 0.5V, T_A= 25˚C, Enable pin is tied to V_IN. (Continued)

Output Short Circuit Current

Ripple Rejection (V_IN= V_OUT+ 1V)

20020332

20020321

Ripple Rejection (V_IN= V_OUT+ 1V)

20020322

20020323

Load Transient Response (V_IN= 3.5V)

20020324

20020325

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Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT= 2.2 µF Ceramic,

C_BP= 0.033 µF, V_IN= V_OUT+ 0.5V, T_A= 25˚C, Enable pin is tied to V_IN. (Continued)

Line Transient Response

(V_IN= V_OUT+ 1V to V_OUT+ 1.6V)

20020326

20020327

Line Transient Response

(V_IN= V_OUT+ 1V to V_OUT+ 1.6V)

20020328

20020329

Enable Response (T_ON

)

Enable Response (T_ON)

20020330

20020331

As stated in notes 3 and 5 in the electrical specifications

sections, the allowable power dissipation for the device in a

given package can be calculated using the equation:

Application Hints

POWER DISSIPATION AND DEVICE OPERATION

The permissible power dissipation for any package is a

measure of the capability of the device to pass heat from the

power source, the junctions of the IC, to the ultimate heat

sink, the ambient environment. Thus, the power dissipation

is dependant on the ambient temperature and the thermal

resistance across the various interfaces between the die and

ambient air.

With a θ_JA= 50˚C/W, the device in theLLP package returns

a value of 2.0W with a maximum junction temperature of

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NOISE BYPASS CAPACITOR

Application Hints (Continued)

Connecting a 0.033µF capacitor between the C_BPpin and

ground significantly reduces noise on the regulator output.

This cap is connected directly to a high impedance node in

the bad gap reference circuit. Any significant loading on this

node will cause a change on the regulated output voltage.

For this reason, DC leakage current through this pin must be

kept as low as possible for best output voltage accuracy.

125˚C and an ambient temperature of 25˚C. The device in a

MSOP package returns a figure of 0.476W, ( θ_JA= 210˚C/

W).

The actual power dissipation across the device can be rep-

resented by the following equation:

P_D= (V_IN− V_OUT) x I_OUT

The types of capacitors best suited for the noise bypass

capacitor are ceramic and film. Hight-quality ceramic capaci-

tors with either NPO or COG dielectric typically have very

low leakage. Polypropolene and polycarbonate film capaci-

tors are available in small surface-mount packages and

typically have extremely low leakage current.

This establishes the relationship between the power dissipa-

tion allowed due to thermal considerations, the voltage drop

across the device, and the continuous current capability of

the device. The device can deliver 300mA but care must be

taken when choosing the continuous current output for the

device under the operating load conditions.

Unlike many other LDO’s, addition of a noise reduction

capacitor does not effect the transient response of the de-

vice.

EXTERNAL CAPACITORS

Like any low-dropout regulator, the LP3981 requires external

capacitors for regulator stability. The LP3981 is specifically

designed for portable applications requiring minimum board

space and smallest components. These capacitors must be

correctly selected for good performance.

CAPACITOR CHARACTERISTICS

The LP3981 is designed to work with ceramic capacitors on

the output to take advantage of the benefits they offer: for

capacitance values in the range of 1µF to 4.7µF range,

ceramic capacitors are the smallest, least expensive and

have the lowest ESR values (which makes them best for

eliminating high frequency noise). The ESR of a typical 1µF

ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which

easily meets the ESR requirement for stability by the

LP3981.

INPUT CAPACITOR

An input capacitance of ) 2.2µF is required between the

LP3981 input pin and ground (the amount of the capacitance

may be increased without limit).

This capacitor must be located a distance of not more than

1cm from the input pin and returned to a clean analog

ground. Any good quality ceramic, tantalum, or film capacitor

may be used at the input.

The ceramic capacitor’s capacitance can vary with tempera-

ture. Most large value ceramic capacitors () 2.2µF) are

manufactured with Z5U or Y5V temperature characteristics,

which results in the capacitance dropping by more than 50%

as the temperature goes from 25˚C to 85˚C.

Important: Tantalum capacitors can suffer catastrophic fail-

ures due to surge current when connected to a low-

impedance source of power (like a battery or a very large

capacitor). If a tantalum capacitor is used at the input, it must

be guaranteed by the manufacturer to have a surge current

rating sufficient for the application.

A better choice for temperature coefficient in a ceramic

capacitor is X7R, which holds the capacitance within 15%.

Tantalum capacitors are less desirable than ceramic for use

as output capacitors because they are more expensive when

comparing equivalent capacitance and voltage ratings in the

1µF to 4.7µF range.

There are no requirements for the ESR on the input capaci-

tor, but tolerance and temperature coefficient must be con-

sidered when selecting the capacitor to ensure the capaci-

tance will be ) 2.2µF over the entire operating temperature

range.

Another important consideration is that tantalum capacitors

have higher ESR values than equivalent size ceramics. This

means that while it may be possible to find a tantalum

capacitor with an ESR value within the stable range, it would

have to be larger in capacitance (which means bigger and

more costly ) than a ceramic capacitor with the same ESR

value. It should also be noted that the ESR of a typical

tantalum will increase about 2:1 as the temperature goes

from 25˚C down to −40˚C, so some guard band must be

allowed.

OUTPUT CAPACITOR

The LP3981 is designed specifically to work with very small

ceramic output capacitors. A ceramic capacitor (dielectric

types Z5U, Y5V or X7R) in 2.2 to 22 µF range with 5mΩ to

500mΩ ESR range is suitable in the LP3981 application

circuit.

It may also be possible to use tantalum or film capacitors at

the output, but these are not as attractive for reasons of size

and cost (see next section Capacitor Characteristics).

ON/OFF INPUT OPERATION

The LP3981 is turned off by pulling the V_ENpin low, and

turned on by pulling it high. If this feature is not used, the V_EN

pin should be tied to V_INto keep the regulator output on at all

time. To assure proper operation, the signal source used to

drive the V_ENinput must be able to swing above and below

the specified turn-on/off voltage thresholds listed in the Elec-

The output capacitor must meet the requirement for mini-

mum amount of capacitance and also have an ESR (Equiva-

lent Series Resistance) value which is within a stable range

(5 mΩ to 500 mΩ).

NO-LOAD STABILITY

trical Characteristics section under V_ILand V_IH

The LP3981 will remain stable and in regulation with no

external load. This is specially important in CMOS RAM

keep-alive applications.

FAST ON-TIME

The LP3981 utilizes a speed up circuitry to ramp up the

internal V_REFvoltage to its final value to achieve a fast

output turn on time.

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Physical Dimensions inches (millimeters) unless otherwise noted

NS Package Number MUA008AE

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

NS Package Number LDC06D

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

National Semiconductor

Americas Customer

Support Center

National Semiconductor

Europe Customer Support Center

Fax: +49 (0) 180-530 85 86

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Support Center

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Fax: 81-3-5639-7507

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

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Tel: +65-6254 4466

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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