LP3986TLX-3133 [NSC]

Dual Micropower 150 mA Ultra Low-Dropout CMOS Voltage Regulators in micro SMD Package; 双微150毫安超低压差CMOS电压稳压器， micro SMD封装


型号：	LP3986TLX-3133
厂家：	National Semiconductor
描述：	Dual Micropower 150 mA Ultra Low-Dropout CMOS Voltage Regulators in micro SMD Package 双微150毫安超低压差CMOS电压稳压器， micro SMD封装稳压器
文件：	总14页 (文件大小：317K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

May 2003

LP3986

Dual Micropower 150 mA Ultra Low-Dropout CMOS

Voltage Regulators in micro SMD Package

General Description

The LP3986 is a 150 mA dual low dropout regulator de-

signed for portable and wireless applications with demand-

ing performance and board space requirements.

Features

n Miniature 8-I/O micro SMD package

n Stable with 1µF ceramic and high quality tantalum

output capacitors

n Fast turn-on

n Two independent regulators

n Logic controlled enable

The LP3986 is stable with a small 1 µF 30% ceramic output

capacitor requiring smallest possible board space.

The LP3986’s performance is optimized for battery powered

systems to deliver ultra low noise, extremely low dropout

voltage and low quiescent current independent of load cur-

rent. Regulator ground current increases very slightly in

dropout, further prolonging the battery life. Optional external

bypass capacitor reduces the output noise further without

slowing down the load transient response. Fast start-up time

is achieved by utilizing a speed-up circuit that actively pre-

charges the bypass capacitor. Power supply rejection is

better than 60 dB at low frequencies and 55 dB at 10 kHz.

High power supply rejection is maintained at low input volt-

age levels common to battery operated circuits.

n Over current and thermal protection

Key Specifications

n Guaranteed 150 mA output current per regulator

n 1nA typical quiescent current when both regulators in

shutdown mode

n 60 mV typical dropout voltage at 150 mA output current

n 115 µA typical ground current

n 40 µV typical output noise

n 200 µs fast turn-on circuit

The LP3986 is available in a micro SMD package. Perfor-

mance is specified for a −40˚C to +125˚C temperature

range. For single LDO applications, please refer to the

LP3985 datasheet.

n −40˚C to +125˚C junction temperature

Applications

n CDMA cellular handsets

n GSM cellular handsets

n Portable information appliances

n Portable battery applications

Typical Application Circuit

20003401

DS200034

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Block Diagram

LP3986

20003402

Pin Description

Name

V_OUT2

EN₂

*micro SMD

Function

Output Voltage of the second LDO

Enable input for the second LDO

Bypass capacitor for the bandgap

Common ground

BYPASS

GND

Common ground

EN₁

Enable input for the first LDO

Output Voltage of the first LDO

Common input for both LDOs

V_OUT1

V_IN

* Note: The pin numbering scheme for the micro SMD package was revised in April 2002 to conform to JEDEC standard. Only the pin

numbers were revised. No changes to the physical location of the inputs/outputs were made. For reference purposes, the obsolete

numbering scheme had V

as pin 8.

as pin 1, EN as pin 2, BYPASS as pin 3, GND as pins 4 and 5, EN as pin 6, V

as pin 7, and V

OUT2

OUT1 IN

Connection Diagram

20003404

Top View

8 Bump micro SMD Package

See NS Package Number BLA08

www.national.com

Ordering Information

For micro SMD Package (BL has thickness of 0.995mm)

Output

Voltage (V)

2.52.8

Package

Marking

LP3986 Supplied as 250 Units,

Tape and Reel

LP3986 Supplied as 3000

Units, Tape and Reel

LP3986BLX-2528

Grade

STD

LP3986BL-2528

2.82.8

LP3986BL-2828

LP3986BLX-2828

2.852.85

2.92.9

LP3986BL-285285

LP3986BL-2929

LP3986BLX285285

LP3986BLX-2929

3.03.0

LP3986BL-3030

LP3986BLX-3030

3.13.1

LP3986BL-3131

LP3986BLX-3131

3.13.3

LP3986BL-3133

LP3986BLX-3133

3.33.3

LP3986BL-3333

LP3986BLX-3333

For micro SMD Package (TL has thickness of 0.600mm)

Output

Voltage (V)

2.52.8

Package

Marking

LP3986 Supplied as 250 Units,

Tape and Reel

LP3986 Supplied as 3000

Units, Tape and Reel

LP3986TLX-2528

Grade

STD

LP3986TL-2528

2.82.8

LP3986TL-2828

LP3986TLX-2828

2.852.85

2.92.9

LP3986TL-285285

LP3986TL-2929

LP3986TLX285285

LP3986TLX-2929

3.03.0

LP3986TL-3030

LP3986TLX-3030

3.13.1

LP3986TL-3131

LP3986TLX-3131

3.13.3

LP3986TL-3133

LP3986TLX-3133

3.33.3

LP3986TL-3333

LP3986TLX-3333

20003403

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Absolute Maximum Ratings (Notes 1,

ESD Rating (Note 5)

Human Body Model

Machine Model

2kV

200V

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Operating Ratings (Notes 1, 2)

V_IN

V_IN, V_EN

−0.3 to 6.5V

2.5 to 6V

V_OUT

−0.3 to (V_IN+0.3V) ≤ 6.5V

150˚C

V_EN

0 to (V_IN+ 0.3V) ≤ 6V

Junction Temperature

Storage Temperature

Pad Temp. (Note 3)

Maximum Power Dissipation

(Note 4)

Junction Temperature

Thermal Resistance

θ_JA

−40˚C to +125˚C

−65˚C to +150˚C

235˚C

220˚C/W

250mW

Maximum Power Dissipation (Note 6)

364mW

Electrical Characteristics

Unless otherwise specified: V_IN= V_OUT(nom)+ 0.5V, C_IN= 1 µF, I_OUT= 1mA, C_OUT= 1 µF, C_BYPASS= 0.01µF. Typical values

and limits appearing in standard typeface are for T_J= 25˚C. Limits appearing in boldface type apply over the entire junction

temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)

Limit

Symbol

Parameter

Conditions

I_OUT= 1mA

Typ

Units

Min

−2.5

−3.0

Max

2.5

Output Voltage

Tolerance

% of

3.0

V_OUT(nom)

Line Regulation Error

(Note 9)

V_IN= (V_OUT(nom)+ 0.5V) to

6.0V,

0.006

0.092

0.128

∆V_OUT

%/V

I_OUT= 1 mA

Load Regulation Error

(Note 10)

I_OUT= 1mA to 150 mA

0.003

1.5

0.006

%/mA

mV_P-P

0.01

Output AC Line

Regulation

V_IN= V_OUT(nom)+ 1V,

I_OUT= 150 mA (Figure 1)

V_IN= 3.1V,

f = 1 kHz,

I_OUT= 50 mA (Figure 2)

V_IN= 3.1V,

Power Supply Rejection

Ratio

PSRR

f = 10 kHz,

I_OUT= 50 mA (Figure 2)

Both Regulators ON

V_EN= 1.4V, I_OUT= 0 mA

Both Regulators ON

V_EN= 1.4V, I_OUT= 0 to 150

I_Q

Quiescent Current

115

220

200

320

One Regulator ON

V_EN= 1.4V I_OUT= 0 mA

One Regulator ON

V_EN= 1.4V I_OUT= 0 to 150

130

200

µA

130

V_EN= 0.4V, Both Regulators

OFF (shutdown)

0.001

Dropout Voltage

(Note 11)

I_OUT= 1 mA

0.4

100

I_OUT= 150 mA

I_SC

Short Circuit Current

Limit

Output Grounded

600

µs

I_OUT(PK)

T_ON

Peak Output Current

Turn-On Time

(Note 12)

V_OUT≥ V_OUT(nom)- 5%

500

200

300

C_BYPASS= 0.01 µF

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Electrical Characteristics (Continued)

Unless otherwise specified: V_IN= V_OUT(nom)+ 0.5V, C_IN= 1 µF, I_OUT= 1mA, C_OUT= 1 µF, C_BYPASS= 0.01µF. Typical values

and limits appearing in standard typeface are for T_J= 25˚C. Limits appearing in boldface type apply over the entire junction

temperature range for operation, −40˚C to +125˚C. (Note 7) (Note 8)

Limit

Symbol

Parameter

Conditions

Typ

Units

Min

Max

e_n

Output Noise Voltage

BW = 10 Hz to 100 kHz,

C_OUT= 1µF

µVrms

ρn(1/f)

I_EN

Output Noise Density

f = 120 Hz,

µV/

C_OUT= 1µF

Maximum Input Current

at EN

V_EN= 0.4 and V_IN= 6V

V_IL

Maximum Low Level

Input Voltage at EN

Minimum High Level

Input Voltage at EN

V_IN= 2.5 to 6V

0.4

V_IH

V_IN= 2.5 to 6V

1.4

∆I_Load1= 150 mA at 1KHz rate

∆I_Load2= 1 mA

∆V_OUT2/∆V_OUT1

−60

Xtalk

C_OUT

Crosstalk Rejection

∆I_Load2= 150 mA at 1KHz rate

∆I_Load1= 1 mA

∆V_OUT2/∆V_OUT1

Capacitance

ESR

(Note 13)

µF

(Note 14)

500

mΩ

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device

is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical

Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

Note 3: Additional information on pad temperature can be found in National Semiconductor Application Note (AN-1112).

Note 4: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula:

P_D= (T_J- T_A)/θ_JA

Where T is the junction temperature, T is the ambient temperature, and θ is the junction-to-ambient thermal resistance. The 364mW rating appearing under

Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150˚C, for T , 70˚C for T , and 220˚C/W for θ . More power can

be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The Absolute Maximum power

dissipation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.

Note 5: The human body model is 100pF discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each

pin.

Note 6: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating

appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125˚C, for T , 70˚C for T , and 220˚C/W for θ into

(1) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient temperatures above 70˚C. The maximum

power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C.

Note 7: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with T = 25˚C or correlated using

Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations

and applying statistical process control.

Note 8: The target output voltage, which is labeled V

, is the desired voltage option.

OUT(nom)

Note 9: The output voltage changes slightly with line voltage. An increase in the line voltage results in a slight increase in the output voltage and vice versa.

Note 10: The output voltage changes slightly with load current. An increase in the load current results in a slight decrease in the output voltage and vice versa.

Note 11: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value.

Note 12: Turn-on time is that between the enable input just exceeding V and the output voltage just reaching 95% of its nominal value.

Note 13: Range of capacitor values for which the device will remain stable. This electrical specification is guaranteed by design.

Note 14: Range of capacitor ESR values for which the device will remain stable. This electrical specification is guaranteed by design.

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20003408

FIGURE 1. Line Regulation Input Test Signal

20003409

FIGURE 2. PSRR Input Test Signal

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Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT1µF Ceramic, C

0.01µ F, V_IN= V_OUT+ 0.5, T_A= 25˚C, both enable pins are tied to V_IN

Power Supply Rejection Ratio (C_BP= 0.001µF)

Power Supply Rejection Ratio (C_BP= 0.01µF)

20003410

20003447

Power Supply Rejection Ratio (C_BP= 0.1µF)

Output Noise Spectral Density

20003448

20003451

Line Transient Response (C_BP= 0.001µF)

Line Transient Response (C_BP= 0.01µF)

20003413

20003449

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Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT1µF Ceramic, C

0.01µ F, V_IN= V_OUT+ 0.5, T_A= 25˚C, both enable pins are tied to V_IN(Continued)

Load Transient & Cross Talk (V_IN= V_OUT+ 0.2V)

20003417

20003416

Start-Up Time (C_BP= 0.001, 0.01, 0.1µF)

Enable Response ( V_IN= 4.2V )

20003411

20003414

Enable Response (V_IN= V_OUT+ 0.2V)

Enable Response

20003450

20003415

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Typical Performance Characteristics Unless otherwise specified, C_IN= C_OUT1µF Ceramic, C

0.01µ F, V_IN= V_OUT+ 0.5, T_A= 25˚C, both enable pins are tied to V_IN(Continued)

Output Short Circuit Current at V_IN= 6V

Output Short Circuit Current at V_IN= 3.3V

20003465

20003466

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Application Hints

EXTERNAL CAPACITORS

X7R is recommended over Z5U and Y5 in applications

where the ambient temperature will change significantly

above or below 25˚C.

Like any low-dropout regulator, the LP3986 requires external

capacitors for regulator stability. The LP3986 is specifically

designed for portable applications requiring minimum board

space and smallest components. These capacitors must be

correctly selected for good performance.

Tantalum capacitors are less desirable than ceramic for use

as output capacitors because they are more expensive when

comparing equivalent capacitance and voltage ratings in the

1µF to 4.7µF range.

INPUT CAPACITOR

Another important consideration is that tantalum capacitors

have higher ESR values than equivalent size ceramics. This

means that while it may be possible to find a tantalum

capacitor with an ESR value within the stable range, it would

have to be larger in capacitance (which means bigger and

more costly ) than a ceramic capacitor with the same ESR

value. It should also be noted that the ESR of a typical

tantalum will increase about 2:1 as the temperature goes

from 25˚C down to −40˚C, so some guard band must be

allowed.

An input capacitance of ) 1µF is required between the

LP3986 input pin and ground (the amount of the capacitance

may be increased without limit).

This capacitor must be located a distance of not more than

1cm from the input pin and returned to a clean analog

ground. Any good quality ceramic, tantalum, or film capacitor

may be used at the input.

Important: Tantalum capacitors can suffer catastrophic fail-

ures due to surge current when connected to a low-

impedance source of power (like a battery or a very large

capacitor). If a tantalum capacitor is used at the input, it must

be guaranteed by the manufacturer to have a surge current

rating sufficient for the application.

NOISE BYPASS CAPACITOR

Connecting a 0.01µF capacitor between the C_BYPASSpin

and ground significantly reduces noise on the regulator out-

put. This cap is connected directly to a high impedance node

in the band gap reference circuit. Any significant loading on

this node will cause a change on the regulated output volt-

age. For this reason, DC leakage current through this pin

must be kept as low as possible for best output voltage

accuracy. The use of this 0.01µF bypass capacitor is strongly

recommended to prevent overshoot on the output during

start up.

There are no requirements for the ESR on the input capaci-

tor, but tolerance and temperature coefficient must be con-

sidered when selecting the capacitor to ensure the capaci-

tance will be ) 1µF over the entire operating temperature

range.

OUTPUT CAPACITOR

The LP3986 is designed specifically to work with very small

ceramic output capacitors, any ceramic capacitor (tempera-

ture characteristics X7R, X5R, Z5U or Y5V) in 1 to 22 µF

range with 5mΩ to 500mΩ ESR range is suitable in the

LP3986 application circuit.

The types of capacitors best suited for the noise bypass

capacitor are ceramic and film. High-quality ceramic capaci-

tors with either NPO or COG dielectric typically have very

low leakage. Polypropolene and polycarbonate film capaci-

tors are available in small surface-mount packages and

typically have extremely low leakage current.

It may also be possible to use tantalum or film capacitors at

the output, but these are not as attractive for reasons of size

and cost (see next section Capacitor Characteristics).

Unlike many other LDO’s, addition of a noise reduction

capacitor does not effect the transient response of the de-

vice.

The output capacitor must meet the requirement for mini-

mum amount of capacitance and also have an ESR (Equiva-

lent Series Resistance) value which is within a stable range.

ON/OFF INPUT OPERATION

The LP3986 is turned off by pulling the V_ENpin low, and

turned on by pulling it high. If this feature is not used, the V_EN

pin should be tied to V_INto keep the regulator output on at all

times. To assure proper operation, the signal source used to

drive the V_ENinput must be able to swing above and below

the specified turn-on/off voltage thresholds listed in the Elec-

NO-LOAD STABILITY

The LP3986 will remain stable and in regulation with no-load

(other than the internal voltage divider). This is specially

important in CMOS RAM keep-alive applications.

CAPACITOR CHARACTERISTICS

trical Characteristics section under V_ILand V_IH

The LP3986 is designed to work with ceramic capacitors on

the output to take advantage of the benefits they offer: for

capacitance values in the range of 1µF to 4.7µF range,

ceramic capacitors are the smallest, least expensive and

have the lowest ESR values (which makes them best for

eliminating high frequency noise). The ESR of a typical 1µF

ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which

easily meets the ESR requirement for stability by the

LP3986.

FAST ON-TIME

The LP3986 outputs are turned on after V_refvoltage reaches

its final value (1.23V nominal). To speed up this process, the

noise reduction capacitor at the bypass pin is charged with

an internal 70µA current source. The current source is turned

off when the bandgap voltage reaches approximately 95% of

its final value. The turn on time is determined by the time

constant of the bypass capccitor. The smaller the capacitor

value, the shorter the turn on time, but less noise gets

reduced. As a result, turn on time and noise reduction need

to be taken into design consideration when choosing the

value of the bypass capacitor.

The ceramic capacitor’s capacitance can vary with tempera-

ture. The capacitor type X7R, which operates over a tem-

perature range of -55˚C to +125˚C, will only vary the capaci-

tance to within 15%. Most large value ceramic capacitors

() 2.2µF) are manufactured with Z5U or Y5V temperature

characteristics. Their capacitance can drop by more than

50% as the temperature goes from 25˚C to 85˚C. Therefore,

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The wavelengths which have most detrimental effect are

reds and infra-reds, which means that the fluorescent light-

ing used inside most buildings has very little effect on per-

formance. A micro SMD test board was brought to within

1cm of a fluorescent desk lamp and the effect on the regu-

lated output voltage was negligible, showing a deviation of

less than 0.1% from nominal.

Application Hints (Continued)

MICRO SMD MOUNTING

The micro SMD package requires specific mounting tech-

niques which are detailed in National Semiconductor Appli-

cation Note (AN-1112). Referring to the section Surface

Mount Technology (SMT) Assembly Considerations.

For best results during assembly, alignment ordinals on the

PC board may be used to facilitate placement of the micro

SMD device.

MICRO SMD LIGHT SENSITIVITY

Exposing the micro SMD device to direct sunlight will cause

misoperation of the device. Light sources such as halogen

lamps can effect electrical performance if brought near to the

device.

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Physical Dimensions inches (millimeters) unless otherwise noted

micro SMD, 8 Bump

NS Package Number BLA08CCC

The dimensions for X1, X2 and X3 are as follows:

X1 = 1.55mm

X2 = 1.55mm

X3 = 0.995mm

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

micro SMD, 8 Bump

NS Package Number ATL08CCA

The dimensions for X1, X2 and X3 are as follows:

X1 = 1.55mm

X2 = 1.55mm

X3 = 0.600mm

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL

COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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