LP3997 [NSC]
Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset; 微250毫安CMOS LDO稳压器，错误标记/上电复位
| 型号： | LP3997 |
| 厂家： | 
National Semiconductor |
| 描述： | Micropower 250mA CMOS LDO Regulator with Error Flag / Power-On-Reset |
| 文件： | 总11页 (文件大小：278K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRELIMINARY
May 2004
LP3997
Micropower 250mA CMOS LDO Regulator with Error
Flag / Power-On-Reset
n Less than 70µA Typical IQ at 250mA.
n Virtually Zero IQ (Disabled).
The LP3997 regulator is designed to meet the requirements
n Themal and Short Circuit Protection.
General Description
of portable, battery-powered systems, providing accurate
output voltage, low noise, and low quiescent current. The
LP3997 provides 3.3V output at up to 250mA load current.
When switched in shutdown mode, the power consumption
is virtually zero.
n 3.3V Output.
n For other voltage options, please contact your local NSC
sales office.
The LP3997 is designed to be stable with space saving
ceramic capacitors as small as 1µF.
Package
8 Lead MSOP
For other package options contact your NSC sales office.
The LP3997 also includes an out-of-regulation error flag.
When the output is more than 5% below its nominal voltage,
the error flag sets to low. If a capacitor is connected to
device’s delay pin, a delayed power-on reset signal will be
generated.
Applications
n Portable Consumer Electronics
n Cellular Handsets
n Laptop and Palm Computers
n PDA’s
Features
n Low, 140mV, Dropout at 250mA Load.
n Stable with Ceramic Capactor.
n Low Noise, with Bypass Capacitor.
n Digital Cameras
Typical Application Circuit
20092901
© 2004 National Semiconductor Corporation
DS200929
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Functional Block Diagram
20092908
Pin Descriptions
Pin #
Name
Description
1
CNOISE
Noise bypass pin. For low noise applications a 0.1µF or larger ceramic
capacitor should be connected from this pin to ground
2
DELAY
A capacitor connected from this pin to ground will allow a delayed
power-on-reset signal at the ERROR (pin 7) output.
3
4
5
6
7
GND
VIN
Ground pin. Local ground for CNOISE and COUT.
Input supply pin. Bypass this with a 1µF capacitor.
VOUT
Output voltage, Connect COUT between this pin and ground.
Connect this pin to VOUT (pin 5).
SENSE
ERROR
This open drain output is an error flag output which goes low when VOUT
drops 5% below it nominal voltage. This pin also provides a power-on-reset
signal if a capacitor is connected to the DELAY pin.
8
SD
Shutdown. Disables the regulator when less than 0.4V is applied. Enables the
regulator when greater than 0.9V. The Shutdown pin is pulled down internally
by a 6MΩ resistor.
Connection Diagram
8 Lead MSOP
NS Package Number MUA08A
20092904
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2
Ordering Information
For MSOP Package
Please contact Sales Office for Availability
Output
Voltage (V)
3.3
LP3997 Supplied as 1000
Units, Tape and Reel
LP3997MM-3.3
LP3997 Supplied as 3500
Units, Tape and Reel
LP3997MMX-3.3
Grade
Package Marking
STD
3
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Absolute Maximum Ratings
(Notes 2, 1)
ESD (Note 4)
Human Body Model
2KV
Machine Model
200V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Operating Ratings
Input Voltage
-0.3 to 6.5V
-0.3 to (VIN + 0.3V) to
6.5V (max)
(Note 1)
Output Voltage
Input Voltage
2V to 6V
0 to (VIN + 0.3V) to
6.5V (max)
Shutdown Input Voltage
SD Input Voltage
-0.3 to (VIN + 0.3V) to
6.5V (max)
Junction Temperature
Ambient Temperature TA Range
(Note 5)
-40˚C to 125˚C
-40˚C to 85˚C
Junction Temperature
Lead/Pad Temp.
150˚C
MSOP
260˚C
Storage Temperature
Continuous Power Dissipation
Internally Limited (Note 3)
-65 to 150˚C
Thermal Properties
(Note 1)
Junction To Ambient Thermal
Resistance (Note 6)
θ
JA (MSOP)
210˚C/W
Electrical Characteristics
Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT =2.2 µF and CNOISE = 0.1 µF.
Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full
temperature range for operation, −40 to +125˚C. (Note 11)
Limit
Symbol
VIN
Parameter
Input Voltage
Conditions
Typ
Units
Min
2
Max
6
V
∆VOUT
Output Voltage Tolerance
Line Regulation Error
Over full line and load regulation.
VIN = (VOUT(NOM) + 1.0V) to 6.0V,
IOUT = 1mA
-3
+3
%
0.05
20
%/V
Load Regulation Error
Load Current
IOUT = 1mA to 250mA
(Notes 7, 8)
µV/mA
µA
ILOAD
IQ
0
Quiescent Current
VSD = 950mV, IOUT = 0mA
VSD = 950mV, IOUT = 250mA
VSD = 0.4V
45
65
µA
0.002
650
ISC
Short Circuit Current Limit
Maximum Output Current
Power Supply Rejection Ratio
(Note 9)
1000
mA
mA
IOUT
PSRR
250
f = 1kHz, IOUT = 1mA to 150mA
f = 10kHz, IOUT = 150mA
64
39
dB
µVRMS
˚C
eN
Output noise Voltage (Note 8)
BW = 10Hz to
100kHz,
w/o CNOISE
180
100
VIN = VOUTnom
+1V
CNOISE = 0.1µF
TSHUTDOWN Thermal Shutdown
Temperature
Hysteresis
160
20
Enable Control Characteristics
ISD
Maximum Input Current at
VSD = 0.0V
0.001
1
0.1
2
µA
VSD Input
VSD = 6V (Note 10)
VIN = 2V to 6V
VIN = 2V to 6V
VIL
VIH
Low Input Threshold
High Input Threshold
0.4
V
V
0.95
95
Error Flag Characteristics
VTH
Power Good Trip Threshold
VIN Rising
95
97
%VOUT
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4
Electrical Characteristics (Continued)
Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN = 2.2 µF, IOUT = 1 mA, COUT =2.2 µF and CNOISE = 0.1 µF.
Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full
temperature range for operation, −40 to +125˚C. (Note 11)
Limit
Symbol
VHYST
Parameter
Conditions
VIN Rising or Falling
Typ
Units
Min
Max
Hysteresis
2
%VOUT
V
VOL
ErrorOutput low Voltage
Error Output High Leakage
Delay Pin Current Source
ISINK = 2mA
0.4
2
IOFF
ERROR = VOUT(NOM)
µA
>
IDELAY
VOUT 95% VOUT(NOM)
2.2
µA
Timing Characteristics
tON
Turn On Time (Note 8)
To 95% Level
w/o CNOISE
CNOISE = 0.1µF
150
2
250
µs
ms
Transient
Response
Line Transient Response |δVOUT| Trise = Tfall = 30µs (Note 8)
δVIN = 600mV
mV
8
TBA
80
(pk - pk)
Load Transient Response
|δVOUT
Trise = Tfall = 1µs (Note 8)
IOUT = 1mA to 150mA
70
mV
|
Note 1: Absolute Maximum Ratings are limits beyond which damage can occur. Operating Ratings are conditions under which operation of the device is
guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All Voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage.
Note 4: The human body model is 100pF discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly into each
pin.
Note 5: The maximum ambient temperature (T
) is dependant on the maximum operating junction temperature (T
= 125˚C), the maximum power
J(max-op)
A(max)
dissipation of the device in te application (P
), and the junction to ambient thermal resistance of the part/package in the application (θ ), as given by the
D(max)
JA
following equation: T
= T
- (θ x P
).
A(max)
J(max-op)
JA
D(max)
Note 6: Junction to ambient thermal resistance is dependant on the application and board layout. In applications where high maximum power dissipation is possible,
special care must be paid to thermal dissipation issues in board design.
Note 7: The device maintains the regulated output voltage without the load.
Note 8: This electrical specification is guaranteed by design.
Note 9: Short circuit current is measured on the input supply line at the point when the short circuit condition reduces the output voltage to 5% of its nominal value.
Note 10: Enable Pin has 6MΩ typical, resistor connected to GND.
Note 11: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production at T = 25˚C or correlated using
J
Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
Output Capacitor, Recommended Specifications
Limit
Symbol
Co
Parameter
Output Capacitor
Conditions
Typ
1.0
Units
Min
0.7
5
Max
Capacitance(Note 12)
ESR
µF
500
mΩ
Note 12: The capacitor tolerance should be 30% or better over temperature. The full operating conditions for the application should be considered when selecting
a suitable capacitor to ensure that the minimum value of capacitance is always met. Recommended capacitor type is X7R. However, dependent on application, X5R,
Y5V, and Z5U can also be used. (See capacitor characteristics section in Application Hints)
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Typical Performance Characteristics. Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V,
CIN = 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF.
Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full
temperature range for operation, −40 to +125˚C.
Output Voltage Change vs Temperature
Ground Current vs Load Current
20092910
20092911
Ground Current vs VIN. ILOAD = 0mA
Ground Current vs VIN. ILOAD = 1mA
20092930
20092931
Ground Current vs VIN. ILOAD = 250mA
Dropout Voltage vs Load Current
20092932
20092916
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6
Typical Performance Characteristics. Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN
= 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF.
Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full
temperature range for operation, −40 to +125˚C. (Continued)
Line Transient
Line Transient
20092918
20092921
20092929
20092919
20092923
20092926
Load Transient
Enable Start-up Time
Enable Start-up Time
Short Circuit Current
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Typical Performance Characteristics. Unless otherwise noted, VSD =950mV, VIN = VOUT + 1.0V, CIN
= 2.2 µF, IOUT = 1 mA, COUT = 2.2 µF and CNOISE = 0.1 µF.
Typical values and limits appearing in normal type apply for TJ = 27˚C. Limits appearing in boldface type apply over the full
temperature range for operation, −40 to +125˚C. (Continued)
Power Supply Rejection Ratio
Noise Spectrum
20092925
20092924
Turn-0n Sequence
Turn-Off Sequence
20092927
20092928
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8
DELAY
Applications Information
A capacitor from DELAY to GROUND sets the time delay for
ERROR changing from low to high state. The delay time is
set by the following formula.
External Capacitors
In common with most regulators, the LP3997 requires exter-
nal capacitors for regulator stability. The LP3990 is specifi-
cally designed for portable applications requiring minimum
board space and smallest components. These capacitors
must be correctly selected for good performance.
20092905
VIN
VTH(DELAY) is nominally 1.2V.
An input capacitor is required for stability. It is recommended
that a minimum of 1.0µF capacitor is connected between the
LP3997 input pin and ground (this capacitance value may be
increased without limit).
The DELAY pin should be open circuit if not used.
CNOISE
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground, A 0.01µF to 0.1µF X5R or
X7R is recommended. This capacitor is connected directly to
high impedence node in the band gap reference circuit. Any
significant loading on this node will cause a change in the
regulated output voltage. For theis reason, DC leakage cur-
rent from this pin must be kept as low as possible for best
output voltage accuracy.
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
CAPACITOR CHARACTERISTICS
The LP3997 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer: for
capacitance values in the range of 1µF to 4.7µF range,
ceramic capacitors are the smallest, least expensive and
have the lowest ESR values (which makes them best for
eliminating high frequency noise). The ESR of a typical 1µF
ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which
easily meets the ESR requirement for stability by the
LP3985.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain ) 1.0µF over
the entire operating temperature range.
VOUT
VOUT is the output voltage of the regulator. Connect capaci-
tor (minimum 1.0µF) to ground form this pin. To ensure
stabilty the capacitor must meet the minimum value for
capcitance and have an ESR in the range 5mW to 500mW.
Ceramic X7R types are recommended.
For both input and output capacitors careful interpretation of
the capacitor specification is required to ensure correct de-
vice operation. The capacitor value can change greatly de-
pendant on the conditions of operation and capacitor type.
In particular the output capacitor selection should take ac-
count of all the capacitor parameters to ensure that the
specification is met within the application. Capacitance value
can vary with DC bias conditions as well as temperature and
frequency of operation. Capacitor values will also show
some decrease over time due to aging. The capacitor pa-
rameters are also dependant on the particular case size with
smaller sizes giving poorer performance figures in general.
As an example Figure 1shows a typical graph showing a
comparison of capacitor case sizes in a Capacitance vs. DC
Bias plot. As shown in the graph, as a result of the DC Bias
condition the capacitance value may drop below the mini-
mum capacitance value given in the recommended capacitor
table (0.7µF in this case). Note that the graph shows the
capacitance out of spec for the 0402 case size capacitor at
higher bias voltages. It is therefore recommended that the
capacitor manufacturers’ specifications for the nominal value
capacitor are consulted for all conditions as some capacitor
sizes (e.g. 0402) may not be suitable in the actual applica-
tion.
SENSE or ADJUST
SENSE is used to sense the output voltage. Connect sense
to VOUT for fixed voltage version.
SHUTDOWN
SD controls the turning on and off of the LP3997. VOUT is
guaranteed to be on when the voltage on the /SD pin is
greater than 0.95V. VOUT is guaranteed to be off when the
voltage on the SD pin is less than 0.4V.
ERROR
ERROR is an open drain output which is set low when VOUT
is more than 5% below its nominal value. An external pull up
resistor is required on this pin. When a capacitor is con-
nected from DELAY to GROUND, the error signal is delayed
(see DELAY section). This delayed error signal can be used
as the power-on reset signal for the application system. The
ERROR pin is disconnected when not used.
9
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perature range of -55˚C to +125˚C, will only vary the capaci-
tance to within 15%. The capacitor type X5R has a similar
tolerance over a reduced temperature range of -55˚C to
+85˚C. Most large value ceramic capacitors, larger than 1µF
are manufactured with Z5U or Y5V temperature characteris-
tics. Their capacitance can drop by more than 50% as the
temperature goes from 25˚C to 85˚C. Therefore X7R is
recommended over Z5U and Y5V in applications where the
ambient temperature will change significantly above or be-
low 25˚C.
Applications Information (Continued)
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
1µF to 4.7µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly ) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to -40˚C, so some guard band must be
allowed.
20092940
FIGURE 1. Graph Showing a Typical Variation in
Capacitance vs DC Bias
The ceramic capacitor’s capacitance can vary with tempera-
ture. The capacitor type X7R, which operates over a tem-
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10
Physical Dimensions inches (millimeters) unless otherwise noted
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