MM5451 [NSC]
LED Display Drivers; LED显示驱动器
| 型号： | MM5451 |
| 厂家： | 
National Semiconductor |
| 描述： | LED Display Drivers |
| 文件： | 总8页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
February 1995
MM5450ꢀMM5451 LED Display Drivers
General Description
Features
Y
Continuous brightness control
The MM5450 and MM5451 are monolithic MOS integrated
circuits utilizing N-channel metal-gate low thresholdꢁ en-
hancement modeꢁ and ion-implanted depletion mode devic-
esꢂ They are available in 40-pin molded or cavity dual-in-line
packagesꢂ The MM5450ꢀMM5451 is designed to drive com-
mon anode-separate cathode LED displaysꢂ A single pin
controls the LED display brightness by setting a reference
Y
Serial data input
Y
No load signal required
Y
Enable (on MM5450)
Y
Wide power supply operation
Y
TTL compatibility
Y
34 or 35 outputsꢁ 15 mA sink capability
current through a variable resistor connected to V
ꢂ
DD
Y
Alphanumeric capability
Y
e
e
i
DIP
Board
Socket
49 CꢀW
ꢀ
JA
Applications
COPSTM or microprocessor displays
54 CꢀW
ꢀ
Y
Y
Industrial control indicator
Y
Relay driver
Y
Digital clockꢁ thermometerꢁ counterꢁ voltmeter
Y
Instrumentation readouts
Block Diagram
TLꢀFꢀ6136–1
FIGURE 1
COPSTM is a trademark of National Semiconductor Corporationꢂ
C
1995 National Semiconductor Corporation
TLꢀFꢀ6136
RRD-B30M105ꢀPrinted in Uꢂ Sꢂ Aꢂ
Absolute Maximum Ratings
If MilitaryꢀAerospace specified devices are requiredꢁ
please contact the National Semiconductor Sales
OfficeꢀDistributors for availability and specificationsꢂ
a
Power Dissipation at 25 C
ꢀ
Molded DIP Packageꢁ Board Mount
Molded DIP Packageꢁ Socket Mount
2ꢂ5Wꢁ
2ꢂ3Wꢁꢁ
b
a
e
49 CꢀWꢁ
JA
Voltage at Any Pin
V
SS
0ꢂ3V to V
12V
ꢁMolded DIP Package board mountꢁ i
ꢀ
SS
Derate 20ꢂ4 mWꢀ C above 25 Cꢂ
ꢀ
ꢀ
b
a
25 C to 85 C
Operating Temperature
Storage Temperature
Junction Temperature
ꢀ
65 C to 150 C
ꢀ
ꢀ
ꢀ
e
ꢁꢁMolded DIP Packageꢁ socket mountꢁ i
54 CꢀWꢁ
ꢀ
JA
b
a
ꢀ
Derate 18ꢂ5 mWꢀ C above 25 Cꢂ
ꢀ
ꢀ
a
150 C
Lead Temperature (Solderingꢁ 10 secꢂ)
300 C
ꢀ
e
e
0Vunlessotherwisespecified
Electrical Characteristics T withinoperatingrangeꢁV
4ꢂ75Vto11ꢂ0VꢁV
SS
A
DD
Parameter
Conditions
Min
Typ
Max
11
7
Units
V
Power Supply
4ꢂ75
Power Supply Current
Input Voltages
Logical ‘‘0’’ Level (V )
Excluding Output Loads
mA
b
g
4ꢂ75V
10 mA Input Bias
0ꢂ3
0ꢂ8
V
V
V
L
s
V
DD
5ꢂ25V
s
Logical ‘‘1’’ Level (V )
H
5ꢂ25V
2ꢂ2
V
DD
V
DD
l
b
2V
V
V
DD
DD
Brightness Input (Note 2)
0
0ꢂ75
mA
Output Sink Current
Segment OFF
Segment ON
e
e
V
V
3ꢂ0V
1V (Note 3)
10
mA
OUT
OUT
e
e
e
Brightness Input
Brightness Input
Brightness Input
0 mA
100 mA
750 mA
0
2ꢂ0
15
10
4
25
mA
mA
mA
2ꢂ7
Brightness Input Voltage (Pin 19)
Output Matching (Note 1)
Clock Input
Input Current 750 mA
3ꢂ0
4ꢂ3
V
g
20
%
(Notes 5 and 6)
Frequencyꢁ f
High Timeꢁ t
Low Timeꢁ t
500
kHz
ns
ns
C
950
950
h
l
Data Input
Set-Up Timeꢁ t
300
300
ns
ns
DS
DH
Hold Timeꢁ t
Data Enable Input
Set-Up Timeꢁ t
100
ns
DES
Note 1ꢃ Output matching is calculated as the percent variation (I
a
I
)ꢀ2ꢂ
MIN
MAX
Note 2ꢃ With a fixed resistor on the brightness input pinꢁ some variation in brightness will occur from one device to anotherꢂ Maximum brightness input current can
be 2 mA as long as Note 3 and junction temperature equation are complied withꢂ
Note 3ꢃ See Figures 5ꢁ 6ꢁ and 7 for Recommended Operating Conditions and limitsꢂ Absolute maximum for each output should be limited to 40 mAꢂ
Note 4ꢃ The V
OUT
voltage should be regulated by the userꢂ See Figures 6 and 7 for allowable V
vs I
operationꢂ
OUT
OUT
s
s
20 nsꢁ f
e
g
500 kHzꢁ 50% 10% duty cycleꢂ
Note 5ꢃ AC input waveform specification for test purposeꢃ t
20 nsꢁ t
r
f
Note 6ꢃ Clock input rise and fall times must not exceed 300 nsꢂ
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TLꢀFꢀ6136–3
TLꢀFꢀ6136–2
Top View
Top View
FIGURE 2b
FIGURE 2a
Order Number MM5450Nꢁ MM5451Nꢁ MM5450V or MM5451V
See NS Package Number N40A or V44A
2
Connection Diagrams (Continued)
Plastic Chip Carrier
TLꢀFꢀ6136–13
Top View
Plastic Chip Carrier
TLꢀFꢀ6136–14
Top View
3
Functional Description
Both the MM5450 and the MM5451 are specifically de-
signed to operate 4- or 5-digit alphanumeric displays with
minimal interface with the display and the data sourceꢂ Seri-
al data transfer from the data source to the display driver is
accomplished with 2 signalsꢁ serial data and clockꢂ Using a
format of a leading ‘‘1’’ followed by the 35 data bits allows
data transfer without an additional load signalꢂ The 35 data
bits are latched after the 36th bit is completeꢁ thus providing
non-multiplexedꢁ direct drive to the displayꢂ Outputs change
only if the serial data bits differ from the previous timeꢂ Dis-
play brightness is determined by control of the output cur-
rent for LED displaysꢂ A 0ꢂ001 capacitor should be connect-
ed to brightness controlꢁ pin 19ꢁ to prevent possible oscilla-
tionsꢂ
There must be a complete set of 36 clocks or the shift regis-
ters will not clearꢂ
When the chip first powers ON an internal power ON reset
signal is generated which resets all registers and all latchesꢂ
The START bit and the first clock return the chip to its nor-
mal operationꢂ
Figure 2 shows the pin-out of the MM5450 and MM5451ꢂ Bit
1 is the first bit following the start bit and it will appear on pin
18ꢂ A logical ‘‘1’’ at the input will turn on the appropriate
LEDꢂ
Figure 3 shows the timing relationships between dataꢁ clock
and DATA ENABLEꢂ A max clock frequency of 0ꢂ5 MHz is
assumedꢂ
For applications where a lesser number of outputs are usedꢁ
it is possible to either increase the current per outputꢁ or
A block diagram is shown in Figure 1ꢂ For the MM5450 a
DATA ENABLE is used instead of the 35th outputꢂ The
DATA ENABLE input is a metal option for the MM5450ꢂ The
output current is typically 20 times greater than the current
into pin 19ꢁ which is set by an external variable resistorꢂ
There is an internal limiting resistor of 400X nominal valueꢂ
operate the part at higher than 1V V
equation can be used for calculationsꢂ
ꢂ The following
OUT
e
a
T
T
(V ) (I ) (Noꢂ of segments)(i
OUT LED
)
JA
j
A
whereꢃ
Figure 4 shows the input data formatꢂ A start bit of logical
‘‘1’’ precedes the 35 bits of dataꢂ At the 36th clock a LOAD
signal is generated synchronously with the high state of the
clockꢁ which loads the 35 bits of the shift registers into the
latchesꢂ At the low state of the clock a RESET signal is
generated which clears all the shift registers for the next set
of dataꢂ The shift registers are static master-slave configura-
tionꢂ There is no clear for the master portion of the first shift
registerꢁ thus allowing continuous operationꢂ
e
T
junction temperatureꢁ 150 C max
ꢀ
the voltage at the LED driver outputs
j
e
V
OUT
e
I
the LED current
LED
e
i
T
i
i
thermal coefficient of the package
JA
e
ambient temperature
A
e
(Socket Mount)
54 CꢀW
ꢀ
49 CꢀW
JA
JA
e
(Board Mount)
ꢀ
The above equation was used to plot Figure 5ꢁ Figure 6 and
Figure 7ꢂ
TLꢀFꢀ6136–4
FIGURE 3
4
Functional Description (Continued)
TLꢀFꢀ6136–5
FIGURE 4ꢂ Input Data Format
Typical Performance Characteristics
TLꢀFꢀ6136–7
TLꢀFꢀ6136–8
TLꢀFꢀ6136–6
FIGURE 6
FIGURE 7
FIGURE 5
Typical Applications
TLꢀFꢀ6136–9
FIGURE 8ꢂ Typical Application of Constant Current Brightness Control
TLꢀFꢀ6136–10
FIGURE 9ꢂ Brightness Control Varying the Duty Cycle
5
Typical Applications (Continued)
Basic Electronically Tuned Radio System
TLꢀFꢀ6136–11
Duplexing 8 Digits with One MM5450
TLꢀFꢀ6136–12
6
Physical Dimensions inches (millimeters)
Molded Dual-In-Line Package (N)
Order Number MM5450N or MM5451N
NS Package Number N40A
7
Physical Dimensions inches (millimeters) (Continued)
Plastic Chip Carrier (V)
Order Number MM5450V or MM5451V
NS Package Number V44A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATIONꢂ As used hereinꢃ
1ꢂ Life support devices or systems are devices or
systems whichꢁ (a) are intended for surgical implant
into the bodyꢁ or (b) support or sustain lifeꢁ and whose
failure to performꢁ when properly used in accordance
with instructions for use provided in the labelingꢁ can
be reasonably expected to result in a significant injury
to the userꢂ
2ꢂ A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or systemꢁ or to affect its safety or
effectivenessꢂ
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Corporation
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Europe
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a
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a
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National does not assume any responsibility for use of any circuitry describedꢁ no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specificationsꢂ
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