MM54C903J-MIL [NSC]
暂无描述;型号: | MM54C903J-MIL |
厂家: | National Semiconductor |
描述: | 暂无描述 |
文件: | 总6页 (文件大小:138K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 1988
MM54C901/MM74C901 Hex Inverting TTL Buffer
MM54C902/MM74C902 Hex Non-Inverting TTL Buffer
MM54C903/MM74C903 Hex Inverting CMOS Buffer
MM54C904/MM74C904 Hex Non-Inverting CMOS Buffer
General Description
Features
Y
Wide supply voltage range
3.0V to 15V
1.0V
These hex buffers employ complementary MOS to achieve
wide supply operating range, low power consumption, and
high noise immunity. These buffers provide direct interface
from PMOS into CMOS or TTL and direct interface from
Y
Guaranteed noise margin
Y
High noise immunity
0.45 V (typ.)
CC
Y
TTL compatibility
Fan out of 2
driving standard TTL
CMOS to TTL or CMOS operating at a reduced V supply.
CC
Connection Diagrams
Dual-In-Line Package
MM54C901/MM74C901
MM54C903/MM74C903
Dual-In-Line Package
MM54C902/MM74C902
MM54C904/MM74C904
TL/F/5909–1
TL/F/5909–2
Top View
Top View
Order Number MM54C902,
MM74C902, MM54C904 or MM74C904
Order Number MM54C901,
MM74C901, MM54C903 or MM74C903
C
1995 National Semiconductor Corporation
TL/F/5909
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Temperature Range (T )
A
MM54C901, MM54C902,
MM54C903, MM54C904
MM74C901, MM74C902,
MM74C903, MM74C904
b
a
55 C to 125 C
§
§
b
a
0.3V
Voltage at Any Pin
0.3V to V
CC
b
a
40 C to 85 C
§
§
3.0V to 15V
18V
Voltage at Any Input Pin
MM54C901/MM74C901
MM54C902/MM74C902
MM54C903/MM74C903
MM54C904/MM74C904
Operating V Range
CC
b
b
a
0.3V to 15V
a
0.3V to 15V
Absolute Maximum V
CC
b
b
a
a
V
CC
V
CC
17V to V
17V to V
0.3V
0.3V
CC
CC
Lead Temperature (T )
L
(Soldering, 10 seconds)
260 C
§
b
a
65 C to 150 C
Storage Temperature Range (T )
S
§
§
Power Dissipation (P )
D
Dual-In-Line
Small Outline
700 mW
500 mW
DC Electrical Characteristics Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CMOS TO CMOS
e
e
V
V
V
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
V
V
5.0V
10V
3.5
8.0
V
V
IN(1)
CC
CC
e
e
V
V
5.0V
10V
1.5
2.0
V
V
IN(0)
CC
CC
e
e
e b
5.0V, I
O
V
V
10 mA
4.5
9.0
V
V
OUT(1)
OUT(0)
CC
e b
10V, I
10 mA
CC
O
e
e
V
V
5.0V
10V
0.5
1.0
V
V
CC
CC
e
e
e
e
e
I
I
I
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Supply Current
V
CC
V
CC
V
CC
15V, V
15V, V
15V
15V
0V
0.005
1.0
mA
mA
mA
IN(1)
IN(0)
CC
IN
b
b
0.005
0.05
1.0
IN
15
TTL TO CMOS
e
e
b
b
V
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
54C
74C
V
4.5V
V
V
1.5
1.5
V
V
IN(1)
CC
CC
CC
V
4.75V
CC
e
e
V
IN(0)
54C
74C
V
V
4.5V
0.8
0.8
V
V
CC
4.75V
CC
CMOS TO TTL
V
IN(1)
Logical ‘‘1’’ Input Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
e
e
e
e
V
CC
V
CC
V
CC
V
CC
4.5V
4.0
b
V
V
V
V
4.5V
V
V
1.5
1.5
CC
4.75V
4.75V
4.25
b
CC
V
IN(0)
Logical ‘‘0’’ Input Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
e
e
e
e
V
CC
V
CC
V
CC
V
CC
4.5V
1.0
1.5
1.0
1.5
V
V
V
V
4.5V
4.75V
4.75V
e
e
e b
4.5V, I
O
V
V
Logical ‘‘1’’ Output Voltage
54C
74C
V
800 mA
e b
800 mA
2.4
2.4
V
V
OUT(1)
CC
V
4.75V, I
CC
O
Logical ‘‘0’’ Output Voltage
MM54C901, MM54C903
MM54C902, MM54C904
MM74C901, MM74C903
MM74C902, MM74C904
OUT(0)
e
e
e
e
e
e
V
CC
V
CC
V
CC
V
CC
4.5V, I
4.5V, I
2.6 mA
3.2 mA
0.4
0.4
0.4
0.4
V
V
V
V
O
O
e
e
4.75V, I
4.75V, I
2.6 mA
3.2 mA
O
O
2
DC Electrical Characteristics (Continued)
Min/Max limits apply across temperature range unless otherwise noted
Symbol Parameter Conditions
Min
Typ
Max
Units
OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current)
(MM54C901/MM74C901, MM54C903/MM74C903)
e
e
0V
I
I
I
I
Output Source Current
(P-Channel)
V
T
5.0V, V
0V
SOURCE
SOURCE
SINK
CC
OUT
e
b
5.0
mA
mA
mA
mA
e
25 C, V
§
A
IN
e
e
0V
Output Source Current
(P-Channel)
V
CC
10V, V
0V
OUT
e
b
20
e
T
A
25 C, V
§
IN
e
e
Output Sink Current
(N-Channel)
V
T
5.0V, V
V
CC
CC
OUT
e
9.0
e
25 C, V
§
V
CC
A
IN
e
e
0.4V
Output Sink Current
(N-Channel)
V
CC
5.0V, V
SINK
OUT
e
3.8
e
T
A
25 C, V
§
V
CC
IN
(MM54C902/MM74C902, MM54C904/MM74C904)
e
e
I
I
I
I
Output Source Current
(P-Channel)
V
T
5.0V, V
0V
0V
SOURCE
SOURCE
SINK
CC
OUT
e
b
5.0
mA
mA
mA
mA
e
25 C, V
§
V
CC
A
IN
e
e
Output Source Current
(P-Channel)
V
CC
10V, V
OUT
e
b
20
e
T
A
25 C, V
§
V
CC
IN
e
e
V
Output Sink Current
(N-Channel)
V
T
5.0V, V
CC
OUT
e
CC
9.0
e
25 C, V
§
0V
A
IN
e
e
0V
Output Sink Current
(N-Channel)
V
CC
5.0V, V
0.4V
SINK
OUT
e
3.8
e
T
A
25 C, V
§
IN
e
e
50 pF, unless otherwise noted
AC Electrical Characteristics* T
25 C, C
§
A
L
Symbol
Parameter
Conditions
Min
Typ
Max
Units
MM54C901/MM74C901, MM54C903/MM74C903
e
e
t
t
Propagation Delay Time
to a Logical ‘‘1’’
V
V
5.0V
10V
38
22
70
30
ns
ns
pd1
CC
CC
e
e
Propagation Delay Time
to a Logical ‘‘0’’
V
V
5.0V
10V
21
13
35
20
ns
ns
pd0
CC
CC
C
C
Input Capacitance
Any Input (Note 2)
(Note 3) Per Buffer
14
30
pF
pF
IN
Power Dissipation Capacity
PD
MM54C902/MM74C902, MM54C904/MM74C904
e
e
t
Propagation Delay Time
to a Logical ‘‘1’’
V
V
5.0V
10V
57
27
90
40
ns
ns
pd1
CC
CC
e
e
t
Propagation Delay Time
to a Logical ‘‘0’’
V
V
5.0V
10V
54
25
90
40
ns
ns
pd0
CC
CC
C
C
Input Capacitance
Any Input (Note 2)
(Note 3) Per Buffer
5.0
50
pF
pF
IN
Power Dissipation Capacity
PD
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note
PD
AN-90.
3
Logic Diagrams
MM54C901/MM74C901
CMOS to TTL Inverting Buffer
MM54C903/MM74C903
PMOS to TTL or CMOS Inverting Buffer
TL/F/5909–3
TL/F/5909–4
MM54C902/MM74C902
CMOS to TTL Buffer
MM54C904/MM74C904
PMOS to TTL or CMOS Buffer
TL/F/5909–5
TL/F/5909–6
Typical Applications
PMOS to CMOS or TTL Interface
TL/F/5909–7
CMOS to TTL or CMOS at a Lower V
CC
TL/F/5909–8
4
AC Test Circuit and Switching Time Waveforms
CMOS to CMOS
TL/F/5909–9
e
f
Note: Delays measured with input t , t
r
20 ns.
TL/F/5909–10
Typical Performance Characteristics
Typical Propagation Delay
to a Logical ‘‘0’’ for the
MM54C901/MM74C901 and
MM54C903/MM74C903
Typical Propagation Delay
to a Logical ‘‘1’’ for the
MM54C901/MM74C901 and
M54C903/MM74C903
TL/F/5909–13
TL/F/5909–11
Typical Propagation Delay
to a Logical ‘‘0’’ for the
MM54C902/MM74C902 and
MM54C904/MM74C904
Typical Propagation Delay
to a Logical ‘‘1’’ for the
MM54C902/MM74C902 and
MM54C904/MM74C904
TL/F/5909–14
TL/F/5909–12
5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C901J, MM74C901J, MM54C902J,
MM74C902J, MM54C903J, MM74C903J, MM54C904J or MM74C904J
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number MM54C901N, MM74C901N, MM54C902N,
MM74C902N, MM54C903N, MM74C903N, MM54C904N or MM74C904N
NS Package Number N14A
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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