MM54HC4016J [NSC]
Quad Analog Switch; 四路模拟开关型号: | MM54HC4016J |
厂家: | National Semiconductor |
描述: | Quad Analog Switch |
文件: | 总8页 (文件大小:164K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
August 1989
MM54HC4016/MM74HC4016
Quad Analog Switch
General Description
Features
Y
Typical switch enable time: 15 ns
These devices are digitally controlled analog switches im-
plemented in advanced silicon-gate CMOS technology.
These switches have low ‘‘on’’ resistance and low ‘‘off’’
leakages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. The ‘4016
devices allow control of up to 12V (peak) analog signals
with digital control signals of the same range. Each switch
has its own control input which disables each switch when
low. All analog inputs and outputs and digital inputs are pro-
Y
Wide analog input voltage range: 0–12V
Y
Low ‘‘on’’ resistance: 50X typ.
Y
Low quiescent current: 80 mA maximum (74HC)
Matched switch characteristics
Y
Y
Individual switch controls
tected from electrostatic damage by diodes to V
ground.
and
CC
Connection Diagram
Truth Table
Dual-In-Line Package
Input
CTL
Switch
I/O-O/I
L
‘‘OFF’’
‘‘ON’’
H
TL/F/5350–1
Top View
Order Number MM54HC4016 or MM74HC4016
Schematic Diagram
TL/F/5350–2
C
1995 National Semiconductor Corporation
TL/F/5350
RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Notes 1 & 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Operating Conditions
Min
Max
12
Units
V
Supply Voltage (V
)
CC
2
DC Input or Output Voltage
(V , V
0
V
CC
V
b
a
0.5 to 15V
Supply Voltage (V
)
CC
)
IN OUT
b
b
a
a
DC Control Input Voltage (V
IN
)
1.5 to V
1.5V
0.5V
CC
CC
Operating Temp. Range (T )
A
MM74HC
MM54HC
b
b
a
85
DC Switch I/O Voltage (V
)
IO
0.5 to V
40
55
C
C
§
a
125
§
g
g
g
Clamp Diode Current (I , I
)
20 mA
25 mA
50 mA
IK OK
Input Rise or Fall Times
DC Output Current, per pin (I
)
OUT
e
e
e
(t , t )
r f
V
V
V
2.0V
4.5V
6.0V
1000
500
400
ns
ns
ns
CC
CC
CC
DC V or GND Current, per pin (I
CC
)
CC
b
a
65 C to 150 C
Storage Temperature Range (T
)
§
§
STG
Power Dissipation (P )
D
(Note 3)
600 mW
500 mW
S.O. Package only
Lead Temp. (T ) (Soldering 10 seconds)
L
260 C
§
DC Electrical Characteristics (Note 4)
74HC
54HC
e
T
25 C
§
A
eb
eb
T
40 to 85 C
T
A
55 to 125 C
§
§
Guaranteed Limits
Symbol
Parameter
Conditions
V
A
Units
CC
Typ
V
Minimum High Level
Input Voltage
2.0V
4.5V
1.5
3.15
6.3
1.5
3.15
6.3
1.5
3.15
6.3
V
V
V
V
IH
IL
9.0V
12.0V
8.4
8.4
8.4
V
Maximum Low Level
2.0V
4.5V
0.5
1.35
2.7
0.5
1.35
2.7
0.5
1.35
2.7
V
V
V
V
Input Voltage**
9.0V
12.0V
3.6
3.6
3.6
e
e
, I
IH S
to GND
R
Maximum ‘ON’ Resistance
(See Note 5)
V
V
V
2.0 mA
4.5V 100 170
200
105
85
220
120
100
X
X
X
ON
CTL
e
V
CC
9.0V 50
12.0V 30
85
70
IS
(Figure 1)
2.0V 100 180
215
100
75
240
120
80
X
X
X
X
e
e
S
or GND
V
V
V
, I
2.0 mA
4.5V 40
9.0V 35
12.0V 20
80
60
40
CTL
IH
e
V
CC
IS
(Figure 1)
60
70
e
R
Maximum ‘ON’ Resistance
Matching
V
V
V
4.5V 10
15
10
10
20
15
15
20
15
15
X
X
X
ON
CTL
IH
e
V
CC
to GND
9.0V
12.V
5
5
IS
e
g
g
g
1.0
I
I
Maximum Control
Input Current
V
V
or GND
6.0V
0.1
1.0
mA
IN
IN
CC
e
V or GND
CC
g
g
g
g
g
g
Maximum Switch ‘OFF’
Leakage Current
V
V
V
6.0V
9.0V
60
80
600
800
600
800
nA
nA
nA
IZ
OS
e
GND or V
IS
CC
(Figure 2)
e
g
g
g
1000
V
12.0V
100
1000
CTL
IL
e
g
g
g
g
g
g
g
g
g
I
I
Maximum Switch ‘ON’
Leakage Current
V
V
V
to GND
6.0V
OPEN 9.0V
12.0V
40
50
60
150
200
300
150
200
300
nA
nA
nA
IZ
IS
CC
e
e
V
, V
IH OH
CTL
(Figure 3)
e
V or GND
CC
Maximum Quiescent
Supply Current
V
6.0V
9.0V
2.0
20
40
80
40
80
mA
mA
mA
CC
IN
e
I
0 mA
4.0
8.0
OUT
12.0V
160
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
b
b
Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: 12 mW/ C from 65 C to 85 C; ceramic ‘‘J’’ package: 12 mW/ C from 100 C to 125 C.
§
§
§
§
Note 4: For a power supply of 5V 10% the worst case on resistances (R ) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with
§
§
g
ON
5.5V and 4.5V respectively. (The V value at 5.5V is 3.85V.) The worst case leakage current occur for CMOS at
IH
e
this supply. Worst case V and V occur at V
IH IL
CC
the higher voltage and so these values should be used.
Note 5: At supply voltages (V –GND) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that these
CC
devices be used to transmit digital only when using these supply voltages.
**V limits are currently tested at 20% of V . The above V specification (30% of V ) will be implemented no later than Q1, CY’89.
IL
CC
IL
CC
2
e
e
50 pF (unless otherwise specified), (Notes 6 and 7)
AC Electrical Characteristics V
2.0V–12.0V, C
CC
L
74HC
eb
54HC
e
T
25 C
§
A
eb
T
40 to 85 C T
55 to 125 C
§
§
Guaranteed Limits
Symbol
Parameter
Conditions
V
CC
Units
A
A
Typ
t
t
t
, t
PHL PLH
Maximum Propagation
Delay Switch In to
Out
2.0V
4.5V
25
5
50
10
8
62
13
12
11
75
15
14
13
ns
ns
ns
ns
9.0V
4
12.0V
3
7
e
, t
PZL PZH
Maximum Switch Turn
‘‘ON’’ Delay
R
R
R
1 kX
2.0V
4.5V
32 100
125
25
150
30
ns
ns
ns
ns
L
L
L
8
6
5
20
12
10
9.0V
15
18
12.0V
13
15
e
, t
PHZ PLZ
Maximum Switch Turn
‘‘OFF’’ Delay
1 kX
2.0V
4.5V
45 168
210
45
252
54
ns
ns
ns
ns
15
10
8
36
32
30
9.0V
40
48
12.0V
38
45
e
e
2V
Minimum Frequency
Response (Figure 7)
600X, V
4.5V
40
MHz
MHz
IS
PP
at (V /2)
CC
3 dB (Notes 6 & 7)
9.0V 100
e b
20 log (V /V
OS IS
)
e
e
e
Control to Switch
R
600X, F
50 pF
1 MHz
1 MHz
1 MHz
4.5V 100
9.0V 250
mV
mV
L
Feedthrough Noise
(Figure 8)
C
L
(Notes 7 & 8)
e
e
e
Crosstalk Between
any Two Switches
(Figure 9)
R
L
600X, F
b
b
4.5V
9.0V
52
50
dB
dB
e
Switch OFF Signal
Feedthrough
Isolation
R
L
600X, F
e
V
V
IL
CTL
(Notes 7 & 8)
b
b
4.5V
9.0V
42
44
dB
dB
(Figure 10)
e
e
50 pF,
THD
Sinewave Harmonic
Distortion
R
F
10 kX, C
L
L
e
1 kHz
e
e
(Figure 11)
V
4V
8V
4.5V 0.013
9.0V 0.008
%
%
IS
PP
PP
V
IS
C
IN
C
IN
C
IN
C
PD
Maximum Control
Input Capacitance
5
15
5
10
10
10
pF
pF
pF
pF
Maximum Switch
Input Capacitance
e
GND
Maximum Feedthrough
Capacitance
V
CTL
Power Dissipation
Capacitance
(per switch)
15
e
Note 6: Adjust 0 dBm for F
1 kHz (Null R /R
L
Attenuation)
ON
Note 7: V is centered at V /2
IS CC
Note 8: Adjust input for 0 dBm
3
AC Test Circuits and Switching Time Waveforms
TL/F/5350–4
FIGURE 2. ‘‘OFF’’ Channel Leakage Current
TL/F/5350–3
FIGURE 1. ‘‘ON’’ Resistance
TL/F/5350–5
FIGURE 3. ‘‘ON’’ Channel Leakage Current
TL/F/5350–7
TL/F/5350–6
FIGURE 4. t , t Propagation Delay Time Signal Input to Signal Output
PHL PLH
TL/F/5350–9
TL/F/5350–8
FIGURE 5. t , t
PZL PLZ
Propagation Delay Time Control to Signal Output
4
AC Test Circuits and Switching Time Waveforms (Continued)
TL/F/5350–11
TL/F/5350–10
FIGURE 6. t , t Propagation Delay Time Control to Signal Output
PZH PHZ
TL/F/5350–20
FIGURE 7. Frequency Response
TL/F/5350–13
TL/F/5350–12
FIGURE 8. Crosstalk: Control Input to Signal Output
5
AC Test Circuits and Switching Time Waveforms (Continued)
TL/F/53
TL/F/5350–15
TL/F/5350–16
FIGURE 9. Crosstalk Between Any Two Switches
TL/F/5350–21
TL/F/5350–22
FIGURE 10. Switch OFF Signal Feedthrough Isolation
FIGURE 11. Sinewave Distortion
6
Typical Performance Characteristics
Typical ‘‘On’’ Resistance
Typical Frequency Response
TL/F/5350–19
TL/F/5350–23
Typical Crosstalk Between
Any Two Switches
TL/F/5350–24
Special Considerations
In certain applications the external load-resistor current may include both V
and signal line components. To avoid drawing
CC
current when switch current flows into the analog switch input pins, the voltage drop across the switch must not exceed
V
CC
0.6V (calculated from the ON resistance).
7
Physical Dimensions inches (millimeters)
Ceramic Dual in Line Pkg (J)
Order Number MM54HC4016J or
MM74HC4016J
NS Package Number J14A
Molded Dual in Line Package (N)
Order Number MM74HC4016N
NS Package Number N14A
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failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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