RC28F00AM29EWH [NUMONYX]
Flash, 64MX16, 100ns, PBGA64, 11 X 13 MM, 1 MM PITCH, BGA-64;
| 型号： | RC28F00AM29EWH |
| 厂家： | 
NUMONYX B.V |
| 描述： | Flash, 64MX16, 100ns, PBGA64, 11 X 13 MM, 1 MM PITCH, BGA-64 内存集成电路 闪存 |
| 文件： | 总117页 (文件大小：1214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Numonyx™ Axcell™ M29EW
Datasheet
256-Mbit, 512-Mbit, 1-Gbit, 2-Gbit (x8/x16, uniform block)
3 V supply flash memory
Features
Unlock Bypass/Block Erase/Chip Erase/Write
Supply voltage
to Buffer
— VCC = 2.7 to 3.6 V for Program, Erase and
Read
— VCCQ = 1.65 to 3.6 V for I/O buffers
Asynchronous Random/Page Read
— Page size: 16 words or 32 bytes
— Page access: 25 ns
— Faster Buffered/Batch Programming
— Faster Block and Chip Erase
Vpp/WP# pin protection
— Protects first or last block regardless of
block protection settings
Software protection
— Volatile Protection
— Random access: 100ns (Fortified BGA);
110 ns (TSOP)
— Non-Volatile Protection
— Password Protection
— Password Access
Buffer Program
— 512-word program buffer
Programming time
— 0.68 µs per byte (1.48MB/s) typical when
using full buffer size in buffer program
Memory organization
— Uniform blocks, 128 Kbytes/64 Kwords
each
Program/Erase controller
— Embedded byte/word program algorithms
Program/ Erase Suspend and Resume
Extended Memory block
— 128-word/256-byte block for permanent,
secure identification.
— can be programmed and locked by factory
or by the customer
Low power consumption
— Standby and automatic standby
Minimum 100,000 Program/Erase cycles per
block
— Read from any block during Program
Suspend
— Read and Program another block during
Erase Suspend
ETOXTM* X (65nm) MLC technology
Fortified BGA and TSOP packages
Green packages available
— RoHS Compliant
— Halogen Free
November 2009
208045-07
1
Table of Contents
Numonyx™ Axcell™ M29EW
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Address inputs (A0-Amax) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data inputs/outputs (DQ0-DQ7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data inputs/outputs (DQ8-DQ14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data input/output or address input (DQ15/A-1) . . . . . . . . . . . . . . . . . . . . 12
Chip Enable (CE#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Enable (OE#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Write Enable (WE#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
VPP/Write Protect (VPP/WP#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Reset (RST#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.10 Ready/Busy output (RY/BY#) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.11 Byte/Word organization select (BYTE#) . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.12
VCC supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.13 VCCQ input/output supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.14
VSS ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3
Bus Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
3.2
3.3
3.4
3.5
3.6
Bus Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Bus Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Auto Select mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.6.1
3.6.2
3.6.3
3.6.4
Read electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Verify Extended Memory Block protection indicator . . . . . . . . . . . . . . . . 17
Verify block protection status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Hardware Block Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4
Hardware Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Software Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5
5.1
5.2
Volatile Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Non-Volatile Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2
208045-07
Numonyx™ Axcell™ M29EW
Table of Contents
5.2.1
5.2.2
Non-Volatile Protection bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Non-Volatile Protection Bit Lock bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3
Password Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6
Command Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.1
Standard commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.1.1
6.1.2
6.1.3
6.1.4
6.1.5
6.1.6
6.1.7
6.1.8
6.1.9
Read/Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Auto Select command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Program Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Program Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.1.10 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Fast Program commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.9
Write to Buffer Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Buffered Program Abort and Reset command . . . . . . . . . . . . . . . . . . . . 36
Write to Buffer Program Confirm command . . . . . . . . . . . . . . . . . . . . . . 37
Unlock Bypass command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Unlock Bypass Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Unlock Bypass Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . 37
Unlock Bypass Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Unlock Bypass Write to Buffer Program command . . . . . . . . . . . . . . . . 38
Unlock Bypass Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.3
Protection commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
Enter Extended Memory Block command . . . . . . . . . . . . . . . . . . . . . . . 41
Exit Extended Memory Block command . . . . . . . . . . . . . . . . . . . . . . . . 41
Lock Register command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Password Protection mode command set . . . . . . . . . . . . . . . . . . . . . . . 42
Non-Volatile Protection mode command set . . . . . . . . . . . . . . . . . . . . . 43
NVPB Lock Bit command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Volatile Protection mode command set . . . . . . . . . . . . . . . . . . . . . . . . . 45
Exit Protection command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
7
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
208045-07
3
Table of Contents
Numonyx™ Axcell™ M29EW
7.1
Lock Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
7.1.1
7.1.2
7.1.3
Password Protection Mode Lock bit (DQ2) . . . . . . . . . . . . . . . . . . . . . . 50
Non-Volatile Protection Mode Lock bit (DQ1) . . . . . . . . . . . . . . . . . . . . 50
Extended Memory Block Protection bit (DQ0) . . . . . . . . . . . . . . . . . . . . 50
7.2
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
Data Polling bit (DQ7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Toggle bit (DQ6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Error bit (DQ5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Erase Timer bit (DQ3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Alternative Toggle bit (DQ2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Buffered Program Abort bit (DQ1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
8
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
DC and AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Programming and Erase Performance . . . . . . . . . . . . . . . . . . . . . . . . . 75
Package Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
9
10
11
12
Appendix A Memory Address Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Appendix B Common Flash Interface (CFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Appendix C Extended Memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
C.1
C.2
Numonyx pre-locked Extended Memory Block . . . . . . . . . . . . . . . . . . . . 114
Customer-lockable Extended Memory Block. . . . . . . . . . . . . . . . . . . . . . 115
Appendix D Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4
208045-07
Numonyx™ Axcell™ M29EW
List of Tables
Table 1.
Table 2.
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
/WP# functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
V
PP
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Bus operations, 8-bit mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Bus operations, 16-bit mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Read electronic signature - auto select mode - programmer method (8-bit mode) . . . . . . 20
Read electronic signature - auto select mode - programmer method (16-bit mode) . . . . . 20
Block protection - auto select mode - programmer method (8-bit mode) . . . . . . . . . . . . . . 21
Block protection - auto select mode - programmer method (16-bit mode) . . . . . . . . . . . . . 21
Standard commands, 8-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Standard commands, 16-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Fast Program commands, 8-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Fast Program commands, 16-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Block Protection commands, 8-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Block Protection commands, 16-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Lock Register bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Block Protection Status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Status Register bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Power-up wait timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Device capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Write AC characteristics, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Write AC characteristics, Chip Enable Controlled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Reset AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Accelerated Program and Data Polling/Data Toggle AC characteristics . . . . . . . . . . . . . . 74
Programming and Erase Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
TSOP56 – 56 lead thin small-outline package, 14 x 20 mm, package mechanical data . . 76
Fortified BGA64 11 x 13 mm - 8 x 8 active ball array, package mechanical data. . . . . . . . 77
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Valid Combinations of M29EW Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Block Address Table for Descrete Device (Up to 1-Gbit) . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
CFI query identification string . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
CFI query system interface information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Device geometry definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Primary algorithm-specific extended query table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Extended Memory Block address and data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
208045-07
5
List of Figures
Numonyx™ Axcell™ M29EW
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Fortified BGA connections (top and bottom views). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Block addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Software protection scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Boundary condition of program buffer size. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Write to Buffer Program fletcher and pseudo code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
NVPB Program/Erase algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Lock Register program flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 10. Data polling flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 11. Toggle flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 12. Status Register Polling Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 13. AC measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 14. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 15. Power-up wait timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 16. Random Read AC waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 17. Random Read AC waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 18. Page Read AC waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 19. Write Enable Controlled Program waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 20. Write Enable Controlled Program waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 21. Chip Enable Controlled Program waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 22. Chip Enable Controlled Program waveforms (16-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 23. Chip/Block Erase waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 24. Reset AC waveforms (no program/erase in progress) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 25. Reset during program/erase operation AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 26. Accelerated program timing waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 27. Data polling AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 28. Toggle/Alternative Toggle bit polling AC waveforms (8-bit mode) . . . . . . . . . . . . . . . . . . . 74
Figure 29. TSOP56 – 56 lead thin small-outline package, 14 x 20 mm, package outline . . . . . . . . . . 76
Figure 30. Fortified BGA64 11 x 13 mm - 8 x 8 active ball array, package outline . . . . . . . . . . . . . . . 77
6
208045-07
Numonyx™ Axcell™ M29EW
Description
1
Description
The Numonyx™ Axcell™ M29EW flash memory based on 65nm MLC technology is the
world’s leading line of parallel NOR flash for embedded applications. It can be read, erased
and reprogrammed; and these operations can be performed using a single low voltage (2.7
to 3.6 V) supply. Upon power-up, the memory defaults to its array read mode.
The main memory array is divided into 64-Kword/128-Kbyte uniform blocks that can be
erased independently so that valid data can be preserved while old data is purged. Program
and Erase commands are written to the command interface of the memory. An on-chip
Program/Erase controller simplifies the process of programming or erasing the memory by
taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error condition can be
identified. The command set required to control the memory is consistent with JEDEC
standards.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the
memory. They allow simple connection to most microprocessors, often without additional
logic.
The M29EW supports Asynchronous Random Read and Page Read from all blocks of the
memory array. It also features an internal program buffer which improves throughput by
programming 512 words via one command sequence.
The M29EW contains a 128-word Extended Memory Block which overlaps addresses with
array block 0. The user can program this additional space; then protect it to permanently
secure its contents.
The device features different levels of hardware and software protection to secure blocks
from unwanted modification (program or erase):
l
l
Hardware protection:
–
The V /WP# provides a hardware protection of either the highest (M29EWH) or
PP
the lowest (M29EWL) block of the main memory array.
Software protection:
–
–
–
–
Volatile Protection
Non-Volatile Protection
Password Protection
Password Access
The M29EW is offered in TSOP56 (14 x 20 mm) and Fortified BGA64 (11 x 13 mm, 1 mm
pitch) packages.
The memories are delivered with all the bits erased (set to ‘1’).
Also see Appendix B: Common Flash Interface (CFI) on page 110 and Table 4: Block
addresses on page 11 for a full list of the block addresses.
208045-07
7
Description
Table 1.
Numonyx™ Axcell™ M29EW
Direction
Signal Descriptions
Name
Description
A0-Amax
DQ0-DQ7
DQ8-DQ14
DQ15/A−1
CE#
Address inputs
Inputs
I/O
Data inputs/outputs
Data inputs/outputs
I/O
Data input/output or address input
Chip Enable
I/O
Input
Input
Input
Input
Output
Input
Supply
Supply
Input
-
OE#
Output Enable
WE#
Write Enable
RST#
Reset
RY/BY#
BYTE#
VCCQ
Ready/Busy output
Byte/word organization select
Input/output buffer supply voltage
Supply voltage
VCC
VPP/WP#(1)
VPP/Write Protect
Ground
VSS
NC
Not connected
-
1. VPP/WP# may be left floating as it is internally connected to a pull-up resistor, which enables Program/Erase operations.
Figure 1.
Logic diagram
VCC
VCCQ
M29EW
VSS
VPP/WP#
15
A0 – Amax
DQ0 – DQ14
DQ15 / A-1
WE#
CE#
OE#
RST#
RY/BY#
BYTE#
1. A23 is valid for 256-Mbit density and above; otherwise, it is a RFU.
2. A24 is valid for 512-Mbit density and above; otherwise, it is a RFU.
3. A25 is valid for 1-Gbit density and above; otherwise, it is a RFU.
4. A26 is valid for 2-Gbit (1-Gbit/1-Gbit stack) density only; otherwise it’s a RFU.
5. RFU stands for Reserved for Future Use and should be not connect.
8
208045-07
Numonyx™ Axcell™ M29EW
Description
Figure 2.
A23
TSOP connections
A24
A25
A16
BYTE#
VSS
DQ15/ A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE#
VSS
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
A22
A15
A14
A13
A12
A11
A10
A9
9
A8
A19
A20
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56-Lead TSOP
Standard Pinout
WE#
RST#
A21
14 mm x 20 mm
Top View
VPP/WP#
RY/BY#
A18
A17
A7
A6
A5
A4
A3
A2
A1
CE#
A0
RFU
VCCQ
A26
RFU
1. A-1 is the least significant address bit in x8 mode.
2. A23 is valid for 256-Mbit density and above; otherwise, it is a RFU.
3. A24 is valid for 512-Mbit density and above; otherwise, it is a RFU.
4. A25 is valid for 1-Gbit density and above; otherwise, it is a RFU.
5. A26 is valid for 2-Gbit (1-Gbit/1-Gbit stack) density only; otherwise it’s a RFU.
6. RFU stands for Reserved for Future Use and should be not connect.
208045-07
9
Description
Figure 3.
Numonyx™ Axcell™ M29EW
Fortified BGA connections (top and bottom views)
5
8
8
5
1
2
3
4
6
7
7
6
4
3
2
1
A
B
C
D
A
RFU A3 A7 RY/BY# WE# A9 A13 RFU
Vpp /
RFU A13 A9 WE# RY/BY# A7
Vpp/
A3 RFU
B
C
D
E
A26 A4
A17
RST# A8 A12 A22
A22 A12 A8 RST#
A17 A4 A26
WP#
WP#
RFU A2
A6 A18 A21 A10 A14 A23
A23 A14 A10 A21 A18 A6
Vccq A15 A11 A19 A20 A5
A2 RFU
A1 RFU
A0 RFU
RFU A1 A5 A20 A19 A11 A15 Vccq
E
F
RFU A0 D0
D2
D5 D7 A16 Vss
Vss A16 D7 D5
D2
D0
F
Vccq CE# D8 D10 D12 D14 BYTE#A24
A24 BYTE# D14 D12 D10 D8 CE# Vccq
G
G
D15/ A25
A-1
A25 D15/
D13 Vcc D11 D9 OE# RFU
RFU OE# D9 D11 Vcc D13
A-1
H
H
RFU Vss D1
D3
D4
D6 Vss RFU
RFU Vss D6 D4
D3 D1 Vss RFU
Fortified BGA
Top View - Ball side down
Fortified BGA
Bottom View- Ball side up
1. A-1 is the least significant address bit in x8 mode.
2. A23 is valid for 256-Mbit density and above; otherwise, it is a RFU.
3. A24 is valid for 512-Mbit density and above; otherwise, it is a RFU.
4. A25 is valid for 1-Gbit density and above; otherwise, it is a RFU.
5. A26 is valid for 2-Gbit (1-Gbit/1-Gbit stack) density only; otherwise it’s a RFU.
6. RFU stands for Reserved for Future Use and should be not connect.
10
208045-07
Numonyx™ Axcell™ M29EW
Description
Figure 4.
Block addresses
A[26:0] 2-Gbit
A[25:0] 1-Gbit
A[24:0] 512-Mbit
A[23:0] 256-Mbit
A[26:-1] 2-Gbit
A[25:-1] 1-Gbit
A[24:-1] 512-Mbit
A[23:-1] 256-Mbit
FFFFFFFh
7FFFFFFh
2047
2047
128-KB Array Block
64-KW Array Block
FFE0000 h
7FF0000 h
7FFFFFFh
7FE0000 h
3FFFFFFh
3FF0000 h
128-KB Array Block 1023
64-KW Array Block 1023
3FFFFFFh
3FE0000 h
1FFFFFFh
1FF0000 h
511
511
128-KB Array Block
64-KW Array Block
1FFFFFFh
1FE0000 h
0FFFFFFh
0FF0000 h
255
255
128-KB Array Block
64-KW Array Block
001FFFFh
003FFFFh
1
1
128-KB Array Block
64-KW Array Block
0020000 h
001FFFFh
0010000 h
000FFFFh
0
0
128-KB Array Block
64-KW Array Block
0000000 h
0000000 h
208045-07
11
Signal Descriptions
Numonyx™ Axcell™ M29EW
2
Signal Descriptions
See Figure 1: Logic diagram, and Table 1: Signal Descriptions, for a brief overview of the
signals connected to this device.
2.1
2.2
2.3
Address inputs (A0-Amax)
The Address inputs select the cells in the memory array to access during Bus Read
operations. During Bus Write operations they control the commands sent to the command
interface of the Program/Erase controller.
Data inputs/outputs (DQ0-DQ7)
The Data I/O outputs the data stored at the selected address during a Bus Read operation.
During Bus Write operations they represent the commands sent to the command interface
of the internal state machine.
Data inputs/outputs (DQ8-DQ14)
The Data I/O outputs the data stored at the selected address during a Bus Read operation
when BYTE# is High, V . When BYTE# is Low, V , these pins are not used and are high
IH
IL
impedance. During Bus Write operations the Command Register does not use these bits.
When reading the Status Register these bits should be ignored.
2.4
Data input/output or address input (DQ15/A−1)
When the device operates in x16 bus mode, this pin behaves as a Data input/output pin,
together with DQ8-DQ14. When the device operates in x8 bus mode, this pin behaves as
the least significant bit of the address. Throughout the text consider references to the Data
input/output to include this pin when the device operates in x16 bus mode and references to
the Address inputs to include this pin when the device operates in x8 bus mode except
when stated explicitly otherwise.
2.5
2.6
Chip Enable (CE#)
The Chip Enable pin, CE#, activates the memory, allowing Bus Read and Bus Write
operations to be performed. When Chip Enable is High, V , all other pins are ignored.
IH
Output Enable (OE#)
The Output Enable pin, OE#, controls the Bus Read operation of the memory.
12
208045-07
Numonyx™ Axcell™ M29EW
Signal Descriptions
2.7
Write Enable (WE#)
The Write Enable pin, WE#, controls the Bus Write operation of the memory’s command
interface.
2.8
VPP/Write Protect (VPP/WP#)
The V /Write Protect pin provides two functions, Write Protect function and the V
PP
PPH
function, which protect the lowest or highest block and allow the memory to enter unlock
bypass mode respectively.
The Write Protect function provides a hardware method of protecting the highest or lowest
block (see Section 1: Description). When V /Write Protect is Low, V , the highest or
PP
IL
lowest block is protected. Program and Erase operations on this block are ignored while
/Write Protect is Low.
V
PP
When V /Write Protect is High, V , the memory reverts to the previous protection status
PP
IH
of the highest or lowest block. Program and Erase operations can now modify the data in
this block unless the block is protected using Block protection.
When V /Write Protect is raised to V
the memory automatically enters the Unlock
PP
PPH
Bypass mode (see Section 6.2.4).
When V /Write Protect returns to V or V normal operation resumes. See the description
PP
IH
IL
of the Unlock Bypass command in the command interface section. The transitions from V
IH
to V
and from V
to V must be slower than t
(see Figure 26: Accelerated
PPH
PPH
IH
VHVPP
program timing waveforms).
Never raise V /Write Protect to V
from any mode except Read mode, otherwise the
PPH
PP
memory may be left in an indeterminate state. A 0.1 µF capacitor should be connected
between the VPP/Write Protect pin and the V ground pin to decouple the current surges
SS
from the power supply. The PCB track widths must be sufficient to carry the currents
required during Unlock Bypass Program (see I
, I
, I
, I
in Table 22: DC
PP1 PP2 PP3 PP4
characteristics).
The V /Write Protect pin may be left floating or unconnected because it features an
PP
internal pull-up.
Note:
For 2-Gbit (1-Gbit/1-Gbit stack) device, When VPP/WP# pin is low, both the highest block
and the lowest block are hardware-protected, namely block 0 and block 2047.
Refer to Table 2 for a summary of V /WP# functions.
PP
Table 2.
V
/WP# functions
PP
VPP/WP#
Function
VIL
Highest block protected or lowest block protected.(1)
Highest and lowest block unprotected unless a software protection is activated (see
Section 4: Hardware Protection).
VIH
VPPH
Unlock bypass mode.
1. For 2-Gbit (1-Gbit/1-Gbit stack) device, both the highest block and the lowest block are hardware-protected, namely block
0 and block 2047.
208045-07
13
Signal Descriptions
Numonyx™ Axcell™ M29EW
2.9
Reset (RST#)
The Reset pin can be used to apply a Hardware Reset to the memory. A Hardware Reset is
achieved by holding Reset Low, V , for at least t
. After Reset goes High, V , the
IL
PLPX
IH
memory will be ready for Bus Read and Bus Write operations after t
or t
,
PHEL
RHEL
whichever occurs last. See Section 2.10: Ready/Busy output (RY/BY#), Table 26: Reset AC
characteristics, Figure 24 and Figure 25 for more details.
2.10
Ready/Busy output (RY/BY#)
The Ready/Busy pin is an open-drain output that can be used to identify when the device is
performing a program or erase operation. During program or erase operations Ready/Busy
is Low, V (see Table 17: Status Register bits). Ready/Busy is high-impedance during
OL
Read mode, Auto Select mode and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See Table 26: Reset AC characteristics, Figure 24 and
Figure 25.
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A low value will then indicate that one, or more, of the
memories is busy. The 10Kohm or bigger resistor is recommended as pull-up resistor to
achieve 0.1V V
.
OL
2.11
2.12
Byte/Word organization select (BYTE#)
The BYTE# pin is used to switch between the x8 and x16 Bus modes of the memory. When
Byte/Word organization select is Low, V , the memory is in x8 mode, when it is High, V ,
IL
IH
the memory is in x16 mode.
VCC supply voltage
V
provides the power supply for all operations (Read, Program and Erase). The
CC
command interface is disabled when the V supply voltage is less than the Lockout
CC
voltage, V
. This prevents Bus Write operations from accidentally damaging the data
LKO
during power-up, power-down and power surges. If the Program/Erase controller is
programming or erasing during this time then the operation aborts and the memory contents
being altered will be invalid.
A 0.1 µF capacitor should be connected between the V supply voltage pin and the V
CC
SS
ground pin to decouple the current surges from the power supply. The PCB track widths
must be sufficient to carry the currents required during program and erase operations (see
I
, I
, I
in Table 22: DC characteristics).
CC1 CC2 CC3
2.13
VCCQ input/output supply voltage
V
provides the power supply to the I/O pins and enables all outputs to be powered
CCQ
independently from V
.
CC
14
208045-07
Numonyx™ Axcell™ M29EW
Signal Descriptions
2.14
VSS ground
V
is the reference for all voltage measurements. The device features two V pins; both
SS
SS
of which must be connected to the system ground.
208045-07
15
Bus Operations
Numonyx™ Axcell™ M29EW
3
Bus Operations
There are five standard bus operations that control the device. These are Bus Read
(Random and Page modes), Bus Write, Output Disable, Standby and Automatic Standby.
See Table 3: Bus operations, 8-bit mode and Table 4: Bus operations, 16-bit mode for a
summary. Typical glitches of less than 5ns on Chip Enable, Write Enable, and Reset pins
are ignored by the memory and do not affect bus operations.
3.1
Bus Read
Bus Read operations read from the memory cells, or specific registers in the command
interface. To speed up the read operation the memory array can be read in Page mode
where data is internally read and stored in a page buffer. The page has a size of 16 words
(or 32bytes) and is addressed by the address inputs A3-A0 in x16 bus mode and A3-A0 plus
DQ15/A−1 in x8 bus mode.The page read mode is not supported for reading Extended
Memory Blocks and CFI information.
A valid Bus Read operation involves setting the desired address on the Address inputs,
applying a Low signal, V , to Chip Enable and Output Enable and keeping Write Enable
IL
High, V . The Data inputs/outputs will output the value, see Figure 16: Random Read AC
IH
waveforms (8-bit mode), Figure 18: Page Read AC waveforms (16-bit mode), and Table 23:
Read AC characteristics, for details of when the output becomes valid.
3.2
Bus Write
Bus Write operations write to the command interface. A valid Bus Write operation begins by
setting the desired address on the Address inputs. The Address inputs are latched by the
command interface on the falling edge of Chip Enable or Write Enable, whichever occurs
last. The Data inputs/outputs are latched by the command interface on the rising edge of
Chip Enable or Write Enable, whichever occurs first. Output Enable must remain High, V ,
IH
during the whole Bus Write operation. See Figure 19, and Figure 20, Write AC waveforms,
and Table 24 and Table 25, Write AC characteristics, for details of the timing requirements.
3.3
3.4
Output Disable
The Data inputs/outputs are in the high impedance state when Output Enable is High, V .
IH
Standby
Driving Chip Enable High in Read mode, causes the memory to enter Standby mode and
the data inputs/outputs pins are placed in the high-impedance state. To reduce the Supply
current to the Standby Supply current, I
, Chip Enable should be held within V ± 0.3 V.
CC2
CC
For the Standby current level see Table 22: DC characteristics.
During program or erase operations the memory will continue to use the Program/Erase
Supply current, I
, for Program or Erase operations until the operation completes.
CC3
16
208045-07
Numonyx™ Axcell™ M29EW
Bus Operations
3.5
Reset
During Reset mode the memory is deselected and the outputs are high impedance. The
memory is in Reset mode when RST# is at VIL. The power consumption is reduced to the
standby level, independently from the Chip Enable, Output Enable or Write Enable inputs.
3.6
Auto Select mode
The Auto Select mode allows the system or the programming equipment to read the
electronic signature, verify the protection status of the Extended Memory Block, and
apply/remove Block protection. For example, this mode can be used by programming
equipment to automatically match a device and the application code to be programmed.
At power-up, the device is in Read mode, and can then be put in Auto Select mode by
issuing the Auto Select command (see Section 6.1.2).
The device cannot enter Auto Select mode when a program or erase operation is in
progress (RY/BY# Low). However, Auto Select mode can be entered if the program or erase
operation has been suspended by issuing a Program Suspend or Erase Suspend command
(see Section 6.1.6).
The Auto Select mode is exited by performing a reset. The device is returned to Read mode,
except if the Auto Select mode was entered after an Erase Suspend or a Program Suspend
command. In this case, it returns to the Erase or Program Suspend mode.
3.6.1
Read electronic signature
The memory has two codes, the manufacturer code and the device code used to identify the
memory. These codes can be accessed by performing read operations with control signals
and addresses set as shown in Table 5: Read electronic signature - auto select mode -
programmer method (8-bit mode) and Table 6: Read electronic signature - auto select mode
- programmer method (16-bit mode).
These codes can also be accessed by issuing an Auto Select command (see Section 6.1.2:
Auto Select command).
3.6.2
Verify Extended Memory Block protection indicator
The Extended Memory Block is either Numonyx pre-locked or customer-lockable.
The protection status of the Extended Memory Block (pre-locked or customer-lockable) can
be accessed by reading the Extended Memory Block protection indicator. It can be read in
Auto Select mode using either the programmer (see Table 7 and Table 8) or the in-system
method (see Table 9 and Table 10).
The protection status of the Extended Memory Block is then output on bit DQ7 of the Data
input/outputs (see Table 3 and Table 4, Bus operations in 8-bit and 16-bit mode).
3.6.3
Verify block protection status
The protection status of a block can be determined by performing a read operation with
control signals and addresses set as shown in Table 7 and Table 8.
If the block is protected, then 01h (in x 8 mode) is output on Data input/outputs DQ0-DQ7,
otherwise 00h is output.
208045-07
17
Bus Operations
Numonyx™ Axcell™ M29EW
3.6.4
Hardware Block Protect
The V /WP# pin can be used to protect the highest or lowest block. When V /WP# is at
PP
PP
V , the highest block (M29EWH) or the lowest block (M29EWL) is protected and the other
IL
blocks remain with their own protection status.
18
208045-07
Numonyx™ Axcell™ M29EW
Bus Operations
M
Table 3.
Bus operations, 8-bit mode
CE# OE# WE# RST# VPP/WP#
Address Inputs
Data Inputs/Outputs
Operation(1)
Amax-A0, DQ15/A-1
DQ14-DQ8
DQ7-DQ0
Bus Read
Bus Write
VIL VIL VIH
VIL VIH VIL
VIH
VIH
VIH
VIH
VIL
X
Cell address
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Data output
Data input(3)
Hi-Z
(2)
VIH
VIH
Command address
Standby
VIH
X
X
X
X
X
Output Disable
Reset
VIL VIH VIH
X
X
Hi-Z
X
X
X
Hi-Z
1. X = VIL or VIH
.
2. If WP# is Low, VIL, the outermost block remains protected.
3. Data input as required when issuing a command sequence, performing data polling or block protection.
Table 4.
Bus operations, 16-bit mode
CE# OE# WE# RST# VPP/WP#
Address Inputs
Amax-A0
Data Inputs/Outputs
DQ15/A-1, DQ14-DQ0
Operation(1)
Bus Read
Bus Write
VIL VIL VIH
VIL VIH VIL
VIH
VIH
VIH
VIH
VIL
X
Cell address
Data output
Data input(3)
Hi-Z
(2)
VIH
VIH
Command address
Standby
VIH
X
X
X
X
X
Output Disable
Reset
VIL VIH VIH
X
X
Hi-Z
X
X
X
Hi-Z
1. X = VIL or VIH
.
2. If WP# is Low, VIL, the outermost block remains protected.
3. Data input as required when issuing a command sequence, performing data polling or block protection.
208045-07
19
Bus Operations
Numonyx™ Axcell™ M29EW
Table 5.
Read electronic signature - auto select mode - programmer method (8-bit mode)
Address inputs Data inputs/outputs
Read
CE# OE# WE#
cycle(1)
Amax-A7 A6 A5-A4 A3 A2 A1 A0 DQ15/A-1 DQ14-DQ8
DQ7-DQ0
Manufacturer
code
VIL VIL VIL VIL
VIL VIL VIL VIH
X
X
X
X
89h
Device code
(cycle 1)
7Eh
22h (256-Mbit)
23h (512-Mbit)
28h (1-Gbit)
VIL VIL VIH
X
VIL
X
Device code
(cycle 2)
VIH VIH VIH VIL
X
X
X
X
48h (2-Gbit)
Device code
(cycle 3)
VIH VIH VIH VIH
01h
1. X = VIL or VIH
.
Table 6.
Read electronic signature - auto select mode - programmer method (16-bit mode)
Address inputs Data inputs/outputs
Read
CE# OE# WE#
cycle(1)
Amax-A7 A6 A5-A4 A3 A2 A1 A0 DQ15/A-1, DQ14-DQ0
Manufacturer
code
VIL VIL VIL VIL
0089h
227Eh
Device code
(cycle 1)
VIL VIL VIL VIH
2222h (256-Mbit)
2223h (512-Mbit)
2228h (1-Gbit)
2248h (2-Gbit)
VIL
VIL
VIH
X
VIL
X
Device code
(cycle 2)
VIH VIH VIH VIL
Device code
(cycle 3)
VIH VIH VIH VIH
2201h
1. X = VIL or VIH
.
20
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Numonyx™ Axcell™ M29EW
Bus Operations
Table 7.
Block protection - auto select mode - programmer method (8-bit mode)
Address inputs
Data inputs/outputs
Operation(1)
CE# OE# WE#
A5- A3-
A4 A2
DQ14
-DQ8
Amax-A15 A14-A7 A6
A1 A0 DQ15/A-1
DQ7-DQ0
89h (Numonyx pre-
locked)
09h (customer-
lockable)
Verify
M29EWL
M29EWH
Extended
Memory
Block
protection
indicator
(bit DQ7)
X
VIH
99h (Numonyx pre-
locked)
VIL VIL VIH
X
VIL
X
VIL VIH
X
X
19h (customer-
lockable)
Verify block protection
status
01h (protected)
00h (unprotected)
BAd
VIL
1. X = VIL or VIH. BAd = any address in the block.
Table 8.
Block protection - auto select mode - programmer method (16-bit mode)
Address inputs
Data inputs/outputs
Operation(1)
CE# OE# WE#
Amax-A15 A14-A7 A6 A5-A4 A3-A2 A1 A0
DQ15/A-1, DQ14-DQ0
0089h (Numonyx pre-
locked)
Verify
M29EWL
M29EWH
Extended
Memory
Block
indicator
(bit DQ7)
0009h (customer-lockable)
X
VIH
0099h (Numonyx pre-
locked)
VIL
VIL
VIH
X
VIL
X
VIL
VIH
0019h (customer-lockable)
0001h (protected)
Verify block protection
status
VIL
BAd
0000h (unprotected)
1. X = VIL or VIH. BAd = any address in the block.
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Hardware Protection
Numonyx™ Axcell™ M29EW
4
Hardware Protection
The M29EW features a V /WP# pin that protects the highest or lowest block. Refer to
PP
Section 2: Signal Descriptions for a detailed description of the signal.
5
Software Protection
The M29EW has four different software protection modes:
–
–
–
–
Volatile Protection
Non-Volatile Protection
Password Protection
Password Access
On first use all parts default to operate in non-volatile Protection mode and the customer is
free to activate the non-volatile or the password protection mode.
The desired protection mode is activated by setting either the one-time programmable Non-
Volatile Protection Mode Lock bit, or the Password Protection Mode Lock bit of the Lock
Register (see Section 7.1: Lock Register). Programming the Non-Volatile Protection Mode
Lock bit or the Password Protection Mode Lock bit, to ‘0’ will permanently activate the Non-
volatile or the Password Protection mode, respectively. These two bits are one-time
programmable and non-volatile: once the protection mode has been programmed, it cannot
be changed and the device will permanently operate in the selected protection mode. It is
recommended to activate the desired software protection mode when first programming the
device.
The Non-volatile and Password Protection modes both provide non-volatile Protection.
Volatilely protected blocks and non-volatilely protected blocks can co-exist within the
memory array. However, the volatile Protection only control the protection scheme for blocks
that are not protected using the non-volatile or password protection.
If the user attempts to program or erase a protected block, the device ignores the command
and returns to read mode.
The device is shipped with all blocks unprotected. The block protection status can be read
either by performing a read electronic signature (see Table 5 and Table 6) or by issuing an
Auto Select command (see Table 16: Block Protection Status).
For the lowest and highest blocks, an even higher level of block protection can be achieved
by locking the blocks using the non-volatile Protection and then by holding the V /WP# pin
PP
Low.
Password Access is a security enhancement offered on the M29EW device. This feature
protects information stored in the main-array blocks by preventing content alteration or
reads until a valid 64-bit password is received. Password Access may be combined with
Non-Volatile and/or Volatile Protection to create a multi-tiered solution.
Please contact your Numonyx Sales for further details concerning Password Access
feature.
22
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Numonyx™ Axcell™ M29EW
Software Protection
5.1
Volatile Protection mode
The volatile Protection allows the software application to easily protect blocks against
inadvertent change. However, the protection can be easily disabled when changes are
needed. Volatile Protection bits, VPBs, are volatile and unique for each block and can be
individually modified. VPBs only control the protection scheme for unprotected blocks that
have their non-volatile Protection bits, NVPBs, cleared (erased to ‘1’) (see Section 5.2: Non-
Volatile Protection mode and Section 6.3.5: Non-Volatile Protection mode command set).
By issuing the VPB Program or VPB Clear commands, the VPBs are set (programmed to
‘0’) or cleared (erased to ‘1’), thus placing associated blocks in the protected or unprotected
state respectively. The VPBs can be set (programmed to ‘0’) or cleared (erased to ‘1’) as
often as needed.
When the parts are first shipped, or after a power-up or hardware reset, the VPBs default to
be cleared.
Refer to Section 6.3.7 for a description of the volatile Protection mode command set.
5.2
Non-Volatile Protection mode
5.2.1
Non-Volatile Protection bits
A non-volatile Protection bit (NVPB) is assigned to each block.
When a NVPB is set to ‘0’, the associated block is protected, preventing any program or
erase operations in this block.
The NVPB bits can be set individually by issuing a NVPB Program command. They are non-
volatile and will remain set through a hardware reset or a power-down/power-up sequence.
The NVPBs cannot be cleared individually, they can only be all cleared at the same time by
issuing a Clear all Non-Volatile Protection bits command.
The NVPBs can be protected all at a time by setting a volatile bit, the NVPB Lock bit (see
Section 5.2.2: Non-Volatile Protection Bit Lock bit).
If one of the non-volatile protected blocks needs to be unprotected (corresponding NVPB
set to ‘1’), a few more steps are required:
1. First, the NVPB Lock bit must be ‘1’ by either putting the device through a power cycle,
or hardware reset.
2. The NVPBs can then be changed to reflect the desired settings.
3. The NVPB Lock bit must be set to ‘0’ once again to lock the NVPBs by associated
command. The device operates normally again.
Note:
1
2
To achieve the best protection, it is recommended to execute the NVPB Lock Bit Program
command early in the boot code and to protect the boot code by holding V /WP# Low, V .
PP
IL
The NVPBs and VPBs have the same function when V /WP# pin is High, V , as they do
PP
IH
when V /WP# pin is at the voltage for program acceleration (V
).
PP
PPH
Refer to Table 16: Block Protection Status and Figure 5: Software protection scheme for
details on the block protection mechanism, and to Section 6.3.5 for a description of the Non-
Volatile Protection mode command set.
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Software Protection
Numonyx™ Axcell™ M29EW
5.2.2
Non-Volatile Protection Bit Lock bit
The Non-Volatile Protection Bit Lock bit (NVPB Lock bit) is a global volatile bit for all NVPBs.
When set (programmed to ‘0’), it prevents changing the state of the NVPBs. When reset to
‘1’, the NVPBs can be set and reset using the NVPB Program command and Clear all
NVPBs command, respectively.
There is only one NVPB Lock bit per device.
Refer to Section 6.3.6 for a description of the NVPB Lock bit command set.
Note:
1
2
No software command unlocks this bit unless the device is in password protection mode; in
standard non-volatile Protection mode, it can be cleared only by taking the device through a
hardware reset or a power-up.
The NVPB Lock bit must be set (programmed to ‘0’) only after all NVPBs are configured to
the desired settings.
5.3
Password Protection mode
The password protection mode provides an even higher level of security than the Non-
Volatile Protection mode by requiring a 64-bit password for unlocking the device NVPB Lock
bit.
In addition to this password requirement, the NVPB Lock bit is set ‘0’ after power-up and
reset to maintain the device in password protection mode. Successful execution of the
Password Unlock command by entering the correct password clears the NVPB Lock bit,
allowing for block NVPBs to be modified.
If the password provided is incorrect, the NVPB Lock bit remains locked and the state of the
NVPBs cannot be modified.
To place the device in password protection mode, the following steps are required:
1. Prior to activating the password protection mode, it is necessary to set a 64-bit
password and to verify it (see Password Program command and Password Read
command). Password verification is only allowed before the password protection mode
is activated.
2. The password protection mode is then activated by programming the Password
Protection Mode Lock bit to ‘0’. This operation is not reversible and once the bit is
programmed it cannot be erased, the device permanently remains in password
protection mode, and the 64-bit password can neither be retrieved nor reprogrammed.
Moreover, all commands to the address where the password is stored, are disabled.
Refer to Table 16: Block Protection Status and Figure 5: Software protection scheme
for details on the block protection scheme.
Refer to Section 6.3.4 for a description of the Password Protection mode command set.
Note:
There is no means to verify the password after Password Protection mode is enabled. If the
password is lost after enabling the Password Protection mode, there is no way to clear the
NVPB Lock bit.
24
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Numonyx™ Axcell™ M29EW
Software Protection
Figure 5.
Software protection scheme
(2)
VPB
(1)
NVPB
Array block
(3)
NVPBLock bit
Volatileprotection
Non-volatileprotection
Non-volatile
protection mode
Password protection
mode
AI13676
1. NVPBs default to ‘1’ (block unprotected) when shipped from Numonyx. A block is protected or unprotected when its NVPB
is set to ‘0’ and ‘1’, respectively. NVPBs are programmed individually and cleared collectively.
2. VPB default status depends on ordering option. A block is protected or unprotected when its VPB is set to ‘0’ and ‘1’,
respectively. VPBs can be programmed and cleared individually.
3. The NVPB Lock bit is volatile and default to ‘1’ (NVPB bits unlocked) after power-up or hardware reset. NVPB bits are
locked by setting the NVPB Lock bit to ‘0’. Once programmed to ‘0’, the NVPB Lock bit can only be reset to ‘1’ by taking the
device through a power-up or hardware reset.
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Command Interface
Numonyx™ Axcell™ M29EW
6
Command Interface
All Bus Write operations to the memory are interpreted by the command interface.
Commands consist of one or more sequential Bus Write operations. Failure to observe a
valid sequence of Bus Write operations will result in the memory returning to Read mode.
The long command sequences are imposed to maximize data security.
The address used for the commands changes depending on whether the memory is in 16-
bit or 8-bit mode.
Note:
For 2-Gbit (1-Gbit/1-Gbit) device, all the set-up command should be re-issued to the device
when different die is selected.
6.1
Standard commands
See either Table 9, or Table 10, depending on the configuration that is being used, for a
summary of the standard commands.
6.1.1
Read/Reset command
The device enters read mode of main array memory after a reset or power-up sequence.
The Read/Reset command returns the memory to Read mode. It also resets the errors in
the Status Register. Either one or three Bus Write operations can be used to issue the
Read/Reset command.
The Read/Reset command can be issued, between Bus Write cycles before the start of a
program or erase operation, to return the device to Read mode. If the Read/Reset command
is issued during the time-out of a Block erase operation, the memory will take up to 10 µs to
abort. During the abort period no valid data can be read from the memory.
The Read/Reset command will not abort an Erase operation when issued while in Erase
Suspend.
6.1.2
Auto Select command
The Auto Select command puts the device in Auto Select mode, once in Auto Select mode,
the system can read the manufacturer code, the device code, the protection status of each
block (Block Protection status) and the Extended Memory Block protection indicator.
Three consecutive Bus Write operations are required to issue the Auto Select command.
Once the Auto Select command is issued Bus Read operations to specific addresses output
the manufacturer code, the device code, the Extended Memory Block protection indicator
and a block protection status (see Table 9 and Table 10 in conjunction with Table 5, Table 6,
Table 7, and Table 8). The memory remains in Auto Select mode until a Read/Reset or CFI
Query command is issued.
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Numonyx™ Axcell™ M29EW
Command Interface
6.1.3
Read CFI Query command
The memory contains an information area, named CFI data structure, which contains a
description of various electrical and timing parameters, density information and functions
supported by the memory. See Appendix B, Table 34, Table 35, Table 36, Table 37 and
Table 38 for details on the information contained in the Common Flash Interface (CFI)
memory area.
The Read CFI Query command is used to put the memory in Read CFI Query mode. Once
in Read CFI Query mode, Bus Read operations to the memory will output data from the
Common Flash Interface (CFI) memory area. One Bus Write cycle is required to issue the
Read CFI Query command. This command is valid only when the device is in the Read
Array or Auto Select mode.
The Read/Reset command must be issued to return the device to the previous mode (the
Read Array mode or Auto Select mode). A second Read/Reset command is required to put
the device in Read Array mode from Auto Select mode.
6.1.4
Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations
are required to issue the Chip Erase command and start the Program/Erase controller.
If some block are protected, then these are ignored and all the other blocks are erased. If all
of the blocks are protected the Chip Erase operation appears to start but will terminate
within about 100 µs, leaving the data unchanged. No error condition is given when protected
blocks are ignored.
During the Erase operation the memory will ignore all commands, including the Erase
Suspend command. It is not possible to issue any command to abort the operation. Typical
Chip Erase times are given in Table 28. All Bus Read operations during the Chip Erase
operation will output the Status Register on the Data inputs/outputs. See Section 7.2: Status
Register for more details.
After the Chip Erase operation has completed the memory will return to the Read mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
The Chip Erase command sets all of the bits in unprotected blocks of the memory to ‘1’. All
previous data is lost.
The Chip Erase operation is aborted by performing a reset or powering down the device. In
this case, data integrity cannot be ensured, and it is recommended to erase again the entire
chip.
6.1.5
Block Erase command
The Block Erase command can be used to erase a list of one or more blocks. It sets all of
the bits in the unprotected selected blocks to ‘1’. All previous data in the selected blocks is
lost.
Six Bus Write operations are required to select the first block in the list. Each additional
block in the list can be selected by repeating the sixth Bus Write operation using the address
of the additional block. After the command sequence is written, a Block Erase time-out
occurs. During the time-out period, additional sector addresses and sector erase commands
may be written. Once the Program/Erase controller has started, it is not possible to select
208045-07
27
Command Interface
Numonyx™ Axcell™ M29EW
any more blocks. Each additional block must therefore be selected within the time-out
period of the last block. The time-out timer restarts when an additional block is selected.
After the sixth Bus Write operation, a Bus Read operation outputs the Status Register. See
Figure 19: Write Enable Controlled Program waveforms (8-bit mode) and Figure 20: Write
Enable Controlled Program waveforms (16-bit mode) for details on how to identify if the
Program/Erase controller has started the Block Erase operation.
After the Block Erase operation has completed, the memory returns to the Read mode,
unless an error has occurred. When an error occurs, Bus Read operations will continue to
output the Status Register. A Read/Reset command must be issued to reset the error
condition and return to Read mode.
If any selected blocks are protected then these are ignored and all the other selected blocks
are erased. If all of the selected blocks are protected the Block Erase operation appears to
start but will terminate within about 100 µs, leaving the data unchanged. No error condition
is given when protected blocks are ignored.
During the Block Erase operation the memory ignores all commands except the Erase
Suspend command and the Read/Reset command which is only accepted during the time-
out period. Typical Block Erase time and Block Erase time-out are given in Table 28:
Programming and Erase Performance.
The Block Erase operation is aborted by performing a reset or powering down the device. In
this case, data integrity cannot be ensured, and it is recommended to erase again the
blocks aborted.
6.1.6
Erase Suspend command
The Erase Suspend command can be used to temporarily suspend a Block Erase
operation. One Bus Write operation is required to issue the command together with the
block address.
After the command sequence is written, a minimum Block Erase time-out occurs (see
Section 6.1.6: Erase Suspend command). During the time-out period, additional block
addresses and block erase commands can be written.
The Program/Erase controller suspends the erase operation within the Erase Suspend
Latency time of the Erase Suspend command being issued. However, when the Erase
Suspend command is written during the Block Erase time-out, the device immediately
terminates the time-out period and suspends the erase operation.
Once the Program/Erase controller has stopped, the memory operates in Read mode and
the Erase is suspended.
During Erase Suspend it is possible to read and execute Program or Write to Buffer
Program operations in blocks that are not suspended; both read and program operations
behave as normal on these blocks. Reading from blocks that are suspended will output the
Status Register. If any attempt is made to program in a protected block or in the suspended
block then the Program command is ignored and the data remains unchanged. In this case
the Status Register is not read and no error condition is given.
It is also possible to issue the Auto Select, Read CFI Query and Unlock Bypass commands
during an Erase Suspend. The Read/Reset command must be issued to return the device to
Read Array mode before the Resume command will be accepted.
During Erase Suspend a Bus Read operation to the Extended Memory Block will output the
Extended Memory Block data. Once in the Extended Memory Block mode, the Exit
28
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
Extended Memory Block command must be issued before the erase operation can be
resumed.
The Erase Suspend command is ignored if written during Chip Erase operations.
Refer to Table 28: Programming and Erase Performance for the values of Block Erase time-
out and Block Erase Suspend latency time.
If the Erase Suspend operation is aborted by performing a reset or powering down the
device, data integrity cannot be ensured, and it is recommended to erase again the blocks
suspended.
6.1.7
6.1.8
Erase Resume command
The Erase Resume command is used to restart the Program/Erase controller after an Erase
Suspend.
The device must be in Read Array mode before the Resume command will be accepted. An
erase can be suspended and resumed more than once.
Program Suspend command
The Program Suspend command allows the system to interrupt a program operation so that
data can be read from any block. When the Program Suspend command is issued during a
program operation, the device suspends the program operation within the Program
Suspend latency time (see Table 28: Programming and Erase Performance) and updates
the Status Register bits.
After the program operation has been suspended, the system can read array data from any
address. However, data read from program-suspended addresses is not valid.
The Program Suspend command may also be issued during a program operation while an
erase is suspended. In this case, data may be read from any addresses not in Erase
Suspend or Program Suspend. If a read is needed from the Extended Memory Block area
(one-time program area), the user must use the proper command sequences to enter and
exit this region.
The system may also issue the Auto Select command sequence when the device is in the
Program Suspend mode. The system can read as many Auto Select codes as required.
When the device exits the Auto Select mode, the device reverts to the Program Suspend
mode, and is ready for another valid operation. See Auto Select command sequence for
more information.
If the Program Suspend operation is aborted by performing a reset or powering down the
device, data integrity cannot be ensured, and it is recommended to program again the
words or bytes aborted.
6.1.9
Program Resume command
After the Program Resume command is issued, the device reverts to programming. The
controller can determine the status of the program operation using the DQ7 or DQ6 status
bits, just as in the standard program operation. Refer to Figure 19: Write Enable Controlled
Program waveforms (8-bit mode) and Figure 20: Write Enable Controlled Program
waveforms (16-bit mode) for details.
The system must issue a Program Resume command, to exit the Program Suspend mode
and to continue the programming operation.
208045-07
29
Command Interface
Numonyx™ Axcell™ M29EW
Further issuing of the Resume command is ignored. Another Program Suspend command
can be written after the device has resumed programming.
6.1.10
Program command
The Program command can be used to program a value to one address in the memory
array at a time. The command requires four Bus Write operations, the final write operation
latches the address and data in the internal state machine and starts the Program/Erase
controller.
Programming can be suspended and then resumed by issuing a Program Suspend
command and a Program Resume command, respectively (see Section 6.1.8: Program
Suspend command and Section 6.1.9: Program Resume command).
If the address falls in a protected block then the Program command is ignored, the data
remains unchanged. The Status Register is never read and no error condition is given.
After programming has started, Bus Read operations output the Status Register content.
See Figure 19: Write Enable Controlled Program waveforms (8-bit mode) and Figure 20:
Write Enable Controlled Program waveforms (16-bit mode) for more details. Typical
program times are given in Table 28: Programming and Erase Performance.
After the program operation has completed the memory will return to the Read mode, unless
an error has occurred. When an error occurs, Bus Read operations to the memory continue
to output the Status Register. A Read/Reset command must be issued to reset the error
condition and return to Read mode.
One of the Erase commands must be used to set all the bits in a block or in the whole
memory from ‘0’ to ‘1’.
The Program operation is aborted by performing a reset or powering-down the device. In
this case data integrity cannot be ensured, and it is recommended to reprogram the word or
byte aborted.
30
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
Table 9.
Standard commands, 8-bit mode
Bus operations(1)
3rd 4th
Add Data Add Data Add Data Add Data Add Data Add Data
Command
1st
2nd
5th
6th
1
3
X
F0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Read/Reset
Manufacturer code
AAA
AA 555 55
X
F0
Device code
Extended Memory
Block protection
indicator
Auto
Select
(2)(3) (2)(3)
3
AAA
AA 555 55
AAA
90
-
-
-
-
-
-
-
-
Block protection
status
Program(4)
4
6
AAA
AAA
AA 555 55
AA 555 55
AA 555 55
AAA A0
PA
PD
Chip Erase
AAA
80 AAA AA 555 55 AAA 10
80 AAA AA 555 55 BAd 30
Block Erase
6+ AAA
AAA
Erase/Program Suspend
Erase/Program Resume
Read CFI Query
1
1
1
X
X
B0
30
98
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
AA
1. X = Don’t care, PA = Program Address, PD = Program Data, BAd = Any address in the Block. All values in the table are in
hexadecimal.
2. These cells represent Read cycles. The other cells are Write cycles.
3. The Auto Select addresses and data are given in Table 5: Read electronic signature - auto select mode - programmer
method (8-bit mode), and Table 7: Block protection - auto select mode - programmer method (8-bit mode), except for A9
that is ‘Don’t care’.
4. In Unlock Bypass, the first two unlock cycles are no more needed (see Table 11: Fast Program commands, 8-bit mode and
Table 12: Fast Program commands, 16-bit mode).
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Command Interface
Numonyx™ Axcell™ M29EW
Table 10. Standard commands, 16-bit mode
Bus operations(1)
3rd 4th
Add Data Add Data Add Data Add Data Add Data Add Data
Command
1st
2nd
5th
6th
1
3
X
F0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Read/Reset
555
AA 2AA 55
X
F0
Manufacturer code
Device code
Extended Memory
Block protection
indicator
Auto
Select
(2)(3) (2)(3)
3
555
AA 2AA 55
555
90
-
-
-
-
-
-
-
-
Block protection
status
Program(4)
4
6
555
555
AA 2AA 55
AA 2AA 55
AA 2AA 55
555
A0
PA
PD
Chip Erase
555
80 555 AA 2AA 55 555 10
80 555 AA 2AA 55 BAd 30
Block Erase
6+ 555
555
Erase/Program Suspend
Erase/Program Resume
Read CFI Query
1
1
1
X
X
B0
30
98
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
55
1. X = Don’t care, PA = Program Address, PD = Program Data, BAd = any address in the Block. All values in the table are in
hexadecimal.
2. These cells represent Read cycles. The other cells are Write cycles.
3. The Auto Select addresses and data are given in Table 6: Read electronic signature - auto select mode - programmer
method (16-bit mode), and Table 8: Block protection - auto select mode - programmer method (16-bit mode), except for A9
that is ‘Don’t care’.
4. In Unlock Bypass, the first two unlock cycles are no more needed (see Table 11 and Table 12 Fast Program commands, 8-
bit and 16-bit mode).
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Command Interface
6.2
Fast Program commands
The M29EW offers a set of Fast Program commands to improve the programming
throughput:
–
–
Write to Buffer Program
Unlock Bypass
See either Table 11: Fast Program commands, 8-bit mode on page 39 or Table 12: Fast
Program commands, 16-bit mode on page 39 depending on the configuration that is being
used, for a summary of the Fast Program commands.
When V
is applied to the V /Write Protect pin the memory automatically enters Unlock
PP
PPH
Bypass mode (see Section 6.2.4: Unlock Bypass command).
After programming has started, Bus Read operations in the memory output the Status
Register content. Write to Buffer Program command can be suspended and then resumed
by issuing a Program Suspend command and a Program Resume command, respectively
(see Section 6.1.8: Program Suspend command and Section 6.1.9: Program Resume
command).
After the fast program operation has completed, the memory will return to the Read mode,
unless an error has occurred. When an error occurs Bus Read operations to the memory
will continue to output the Status Register. A Read/Reset command must be issued to reset
the error condition and return to Read mode. One of the Erase commands must be used to
set all the bits in a block or in the whole memory from ‘0’ to ‘1’.
Typical program times are given in Table 28: Programming and Erase Performance.
6.2.1
Write to Buffer Program command
The Write to Buffer Program command makes use of the device’s 512-word program buffer
to speed up programming. A maximum of 512 words can be loaded into the program buffer.
The Write to Buffer Program command dramatically reduces system programming time
compared to the standard non-buffered Program command.
When issuing a Write to Buffer Program command, the V /WP# pin can be either held
PP
High, V , or raised to V
.
IH
PPH
See Table 28 for details on typical Write to Buffer Program times in both cases.
Five successive steps are required to issue the Write to Buffer Program command:
1. The Write to Buffer Program command starts with two unlock cycles.
2. The third Bus Write cycle sets up the Write to Buffer Program command. The set-up
code can be addressed to any location within the targeted block.
3. The fourth Bus Write cycle sets up the number of words/bytes to be programmed.
Value N is written to the same block address, where N+1 is the number of words/bytes
to be programmed. N+1 must not exceed the size of the program buffer or the
operation will abort.
4. The fifth cycle loads the first address and data to be programmed.
5. Use N Bus Write cycles to load the address and data for each word/byte into the
program buffer. Addresses must lie within the range from the start address+1 to the
start address + N-1. Optimum programming performance and lower power usage are
obtained by aligning the starting address at the beginning of a 512-word boundary
(A[8:0] = 0x000h). The maximum buffer size would be 256-word if the misaligned
address range is crossing a 512-word boundary during programming. All the addresses
208045-07
33
Command Interface
Numonyx™ Axcell™ M29EW
used in the Write to Buffer Program operation must lie within the block boundary. See
Figure 6 for details of the available program buffer size.
To program the content of the program buffer, this command must be followed by a Write to
Buffer Program Confirm command.
If an address is written several times during a Write to Buffer Program operation, the
address/data counter will be decremented at each data load operation and the data will be
programmed to the last word loaded into the buffer.
Invalid address combinations or failing to follow the correct sequence of Bus Write cycles
will abort the Write to Buffer Program.
The Status Register bits DQ1, DQ5, DQ6, DQ7 can be used to monitor the device status
during a Write to Buffer Program operation.
It is possible to detect Program operation fails when changing programmed data from ‘0’ to
‘1’, that is when reprogramming data in a portion of memory already programmed. The
resulting data will be the logical OR between the previous value and the current value.
See Figure 7: Write to Buffer Program fletcher and pseudo code, for a suggested flow chart
on using the Write to Buffer Program command.
Figure 6.
Boundary condition of program buffer size
0000h
511
Words
or less
program
buffer is
allowed
512
Words
program
buffer is
allowed
512 Words
256
Words
or less
program
buffer is
allowed
0200h
512
Words
512 Words
program
buffer is
allowed
0400h
34
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
Figure 7.
Write to Buffer Program fletcher and pseudo code
Start
Write to Buffer
command,
block address
Write n(1)
block address
,
First three cycles of the
Write to Buffer and Program command
Write Buffer Data,
start address
X=n
YES
X = 0
NO
YES
Write to a different
block address
Abort Write
to Buffer
NO
Write to Buffer and
Program Aborted(2)
Write Next Data,(3)
Program Address Pair
X = X-1
Write to Buffer Program
Confirm, block address
Read Status Register
(DQ1, DQ5, DQ7) at
last loaded address
YES
DQ7 = Data
NO
NO
NO
DQ1 = 1
DQ5 = 1
YES
YES
Check Status Register
(DQ5, DQ7) at
last loaded address
YES
DQ7 = Data(4)
NO
FAIL OR ABORT(5)
END
AI08968b
1. n+1 is the number of addresses to be programmed.
2. A Write to Buffer Program Abort and Reset must be issued to return the device in Read mode.
3. When the block address is specified, any address in the selected block address space is acceptable. However when
208045-07
35
Command Interface
Numonyx™ Axcell™ M29EW
loading program buffer address with data, all addresses must fall within the selected program buffer page.
4. DQ7 must be checked since DQ5 and DQ7 may change simultaneously.
5. If this flow chart location is reached because DQ5=’1’, then the Write to Buffer Program command failed. If this flow chart
location is reached because DQ1=’1’, then the Write to Buffer Program command aborted. In both cases, the appropriate
reset command must be issued to return the device in Read mode: a Reset command if the operation failed, a Write to
Buffer Program Abort and Reset command if the operation aborted.
6. See Table 9 and Table 10, for details on Write to Buffer Program command sequence.
6.2.2
Buffered Program Abort and Reset command
A Buffered Program Abort and Reset command must be issued to abort the Buffer Program
operation and reset the device in Read mode.
The buffer programming sequence can be aborted in the following ways:
–
–
–
–
Load a value that is greater than the page buffer size during the number of
locations to program step in the Write to Buffer Program command.
Write to an address in a block different than the one specified during the write-
buffer-load command.
Write an address/data pair to a different write-buffer-page than the one selected by
the starting address during the program buffer data loading stage of the operation.
Write data other than the Confirm command after the specified number of data
load cycles.
The abort condition is indicated by DQ1 = 1, DQ7 = DQ7 (for the last address location
loaded), DQ6 = toggle, and DQ5 = 0 (all of which are Status Register bits). A Buffered
Program Abort and Reset command sequence must be written to reset the device for the
next operation. Note that the full 3-cycle Buffered Program Abort and Reset command
sequence is required when using Buffer Programming features in Unlock Bypass mode.
36
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
6.2.3
Write to Buffer Program Confirm command
The Write to Buffer Program Confirm command is used to confirm a Write to Buffer Program
command and to program the N+1 words/bytes loaded in the program buffer by this
command.
6.2.4
Unlock Bypass command
The Unlock Bypass command is used to place the device in Unlock Bypass mode. When
the device enters the Unlock Bypass mode, the two initial unlock cycles required in the
standard program command sequence are no more needed, and only two write cycles are
required to program data, instead of the normal four cycles (see Note 4 below Table 9 and
Table 10). This results in a faster total programming time.
Unlock Bypass command is consequently used in conjunction with the Unlock Bypass
Program command to program the memory faster than with the standard program
commands. When the cycle time to the device is long, considerable time saving can be
made by using these commands. Three Bus Write operations are required to issue the
Unlock Bypass command.
When in Unlock Bypass mode, only the Unlock Bypass Program, Unlock Bypass Block
Erase, Unlock Bypass Chip Erase, and Unlock Bypass Reset commands are valid:
–
–
–
–
–
The Unlock Bypass Program command can be issued to program addresses
within the memory.
The Unlock Bypass Block Erase command can then be issued to erase one or
more memory blocks.
The Unlock Bypass Chip Erase command can be issued to erase the whole
memory array.
The Unlock Bypass Write to Buffer Program command can be issued to speed up
programming operation.
The Unlock Bypass Reset command can be issued to return the memory to Read
mode.
In Unlock Bypass mode the memory can be read as if in Read mode.
6.2.5
Unlock Bypass Program command
The Unlock Bypass Program command can be used to program one address in the memory
array at a time. The command requires two Bus Write operations, the final write operation
latches the address and data and starts the Program/Erase controller.
The Program operation using the Unlock Bypass Program command behaves identically to
the Program operation using the Program command. The operation cannot be aborted, a
Bus Read operation to the memory outputs the Status Register. See the program command
in Table 11.: Fast Program commands, 8-bit mode and Table 12.: Fast Program commands,
16-bit mode for more details.
6.2.6
Unlock Bypass Block Erase command
The Unlock Bypass Block Erase command can be used to Erase one or more memory
blocks at a time. The command requires two Bus Write operations instead of six using the
standard Block Erase command. The final Bus Write operation latches the address of the
block and starts the Program/Erase controller.
208045-07
37
Command Interface
Numonyx™ Axcell™ M29EW
To erase multiple block (after the first two Bus Write operations have selected the first block
in the list), each additional block in the list can be selected by repeating the second Bus
Write operation using the address of the additional block.
The Unlock Bypass Block Erase command behaves in the same way as the Block Erase
command: the operation cannot be aborted, and a Bus Read operation to the memory
outputs the Status Register (see Section 6.1.5: Block Erase command for details).
6.2.7
6.2.8
Unlock Bypass Chip Erase command
The Unlock Bypass Chip Erase command can be used to erase all memory blocks at a time.
The command requires two Bus Write operations only instead of six using the standard Chip
Erase command. The final Bus Write operation starts the Program/Erase controller.
The Unlock Bypass Chip Erase command behaves in the same way as the Chip Erase
command: the operation cannot be aborted, and a Bus Read operation to the memory
outputs the Status Register (see Section 6.1.4: Chip Erase command for details).
Unlock Bypass Write to Buffer Program command
The Unlock Bypass Write to Buffer command can be used to program the memory in Fast
Program mode. The command requires two Bus Write operations less than the standard
Write to Buffer Program command.
The Unlock Bypass Write to Buffer Program command behaves in the same way as the
Write to Buffer Program command: the operation cannot be aborted and a Bus Read
operation to the memory outputs the Status Register (see Section 6.2.1: Write to Buffer
Program command for details).
The Write to Buffer Program Confirm command is used to confirm an Unlock Bypass Write
to Buffer Program command and to program the N+1 words/bytes loaded in the program
buffer by this command.
6.2.9
Unlock Bypass Reset command
The Unlock Bypass Reset command can be used to return to Read/Reset mode from
Unlock Bypass mode. Two Bus Write operations are required to issue the Unlock Bypass
Reset command. Read/Reset command does not exit from Unlock Bypass mode.
38
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
Table 11.
Command
Fast Program commands, 8-bit mode
Bus Write operations(1)
3rd
1st
2nd
Data
4th
5th
Add
Data
Add
Add
Data
Add
Data
Add
Data
Write to Buffer
Program
N+5
1
AAA
AA
555
55
-
BAd
25
BAd
N(2)
PA(3)
PD
Write to Buffer
Program Confirm
BAd(4)
29
-
-
-
-
-
-
-
Buffered Program
Abort and Reset
3
3
2
AAA
AAA
X
AA
AA
A0
555
555
PA
55
55
AAA
AAA
-
F0
20
-
-
-
-
-
-
-
-
-
-
-
-
-
Unlock Bypass
Unlock Bypass
Program
PD
Unlock Bypass
Block Erase
2+
2
X
X
80
80
BAd
X
30
10
-
-
-
-
-
-
-
-
-
-
-
-
Unlock Bypass
Chip Erase
Unlock Bypass
Write to Buffer
Program
N+3
2
BAd
X
25
90
BAd
X
N(2)
00
PA(3)
PD
-
-
-
-
-
-
-
-
-
Unlock Bypass
Reset
-
1. X = Don’t care, PA = Program Address, PD = Program Data, BAd = Any address in the Block. All values in the
table are in hexadecimal.
2. The maximum number of cycles in the buffer program command sequence is 261. The maximum number of
cycles in the unlock bypass buffer program command sequence is 259. N+1 is the number of bytes to be
programmed during the Write to Buffer Program operation.
3. Amax-A7 address pin should be consistently unchanged. A0-A6 and A-1 pins are used to select a byte within
the N+1 byte page.
4. BAd must be identical to the address loaded during the Write to Buffer Program 3rd and 4th cycles.
Table 12. Fast Program commands, 16-bit mode
Bus Write operations(1)
Command
1st
2nd
Data
3rd
4th
5th
Add
Data
Add
Add
Data
Add
Data
Add
Data
Write to Buffer
Program
N+5
1
555
AA
2AA
55
-
BAd
25
BAd
N(2)
PA(3)
PD
Write to Buffer
Program Confirm
BAd(4)
29
-
-
-
-
-
-
-
Buffered Program
Abort and Reset
3
3
555
555
AA
AA
2AA
2AA
55
55
555
555
F0
20
-
-
-
-
-
-
-
-
Unlock Bypass
208045-07
39
Command Interface
Numonyx™ Axcell™ M29EW
Table 12. Fast Program commands, 16-bit mode
Bus Write operations(1)
3rd
Command
1st
2nd
Data
4th
5th
Add
Data
Add
Add
Data
Add
Data
Add
Data
Unlock Bypass
Program
2
2+
2
X
A0
PA
PD
30
10
-
-
-
-
-
-
Unlock Bypass Block
Erase
X
X
80
80
BAd
X
-
-
-
-
-
-
-
-
-
-
-
-
Unlock Bypass Chip
Erase
Unlock Bypass Write
to Buffer Program
N+3
2
BAd
X
25
90
BAd
X
N(2)
00
PA(3)
-
PD
-
-
-
-
-
-
-
-
-
Unlock Bypass Reset
1. X = Don’t care, PA = Program Address, PD = Program Data, BAd = Any address in the Block. All values in the
table are in hexadecimal.
2. The maximum number of cycles in the buffer program command sequence is 517. The maximum number of
cycles in the unlock bypass buffer program command sequence is 515. N+1 is the number of bytes to be
programmed during the Write to Buffer Program operation.
3. Amax-A9 address pins should be consistently unchanged. A0-A8 pins are used to select a word within the
N+1 word page.
4. BAd must be identical to the address loaded during the Write to Buffer Program 3rd and 4th cycles.
40
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
6.3
Protection commands
Blocks can be protected individually against accidental program, erase or read operations.
The device block protection scheme is shown in Figure 5: Software protection scheme. See
either Table 13, or Table 14, depending on the configuration that is being used, for a
summary of the Block Protection commands.
Block protection commands are available both in 8-bit and 16-bit configuration.
The protections of both memory blocks and Extended Memory Block protection are
configured through the Lock register (see Section 7.1: Lock Register).
6.3.1
Enter Extended Memory Block command
The M29EW has one extra 128-word Extended Memory Block that can only be accessed
using the Enter Extended Memory Block command.
Three Bus Write cycles are required to issue the Enter Extended Memory Block command.
Once the command has been issued the device enters the Extended Memory Block mode
where all Bus Read or Program operations are conducted on the Extended Memory Block.
Once the device is in the Extended Memory Block mode, the Extended Memory Block is
addressed by using the addresses occupied by block 0 in the other operating modes (see
Figure 4: Block addresses on page 11).
The device remains in Extended Memory Block mode until the Exit Extended Memory Block
command is issued or power is removed from the device. After a power-up sequence or
hardware reset, the device will revert to reading from memory blocks in the main array.
The Extended Memory Block cannot be erased, and each bit of the Extended Memory Block
can only be programmed once.
In Extended Memory Block mode, Erase, Chip Erase, Erase Suspend and Erase Resume
commands are not allowed.
To exit from the Extended Memory Block mode the Exit Extended Memory Block command
must be issued.
The Extended Memory Block is protected from further modification by programming Lock
Register bit 0 (see Section 7.1: Lock Register). Once invoked, this protection cannot be
undone.
6.3.2
Exit Extended Memory Block command
The Exit Extended Memory Block command is used to exit from the Extended Memory
Block mode and return the device to Read mode. Four Bus Write operations are required to
issue the command.
208045-07
41
Command Interface
Numonyx™ Axcell™ M29EW
6.3.3
Lock Register command set
The M29EW offers a set of commands to access the Lock Register and to configure and
verify its content. See the following sections in conjunction with Section 7.1: Lock Register,
Table 13 and Table 14.
Enter Lock Register Command Set command
Three Bus Write cycles are required to issue the Enter Lock Register Command Set
command. Once the command has been issued, all Bus Read or Program operations are
issued to the Lock Register.
Lock Register Program and Lock Register Read command
The Lock Register Program command allows to configure the Lock Register. The
programmed data can then be checked by issuing a Lock Register Read command.
An Exit Protection Command Set command must then be issued to return the device to
Read mode (see Section 6.3.8: Exit Protection command set).
6.3.4
Password Protection mode command set
Enter Password Protection Command Set command
Three Bus Write cycles are required to issue the Enter Password Protection Command Set
command. Once the command has been issued, the commands related to the Password
Protection mode can be issued to the device.
Password Program command
The Password Program command is used to program the 64-bit password used in the
Password Protection mode.
To program the 64-bit password, the complete command sequence must be entered eight
times at eight consecutive addresses selected by A1-A0 plus DQ15/A-1 in 8-bit mode, or
four times at four consecutive addresses selected by A1-A0 in 16-bit mode.
The password can be checked by issuing a Password Read command.
Once Password Program operation has completed, an Exit Protection Command Set
command must be issued to return the device to Read mode. The Password Protection
mode can then be selected.
By default, all Password bits are set to ‘1’.
Note:
In order to use password protection feature on 2-Gbit (1-Gbit/1-Gbit stack) device, the
password must be programmed to both upper die and bottom die respectively.
Password Read command
The Password Read command is used to verify the Password used in Password Protection
mode.
To verify the 64-bit password, the complete command sequence must be entered eight
times at eight consecutive addresses selected by A1-A0 plus DQ15/A-1 in 8-bit mode, or
four times at four consecutive addresses selected by A1-A0 in 16-bit mode.
If the Password Mode Lock bit is programmed and the user attempts to read the password,
the device will output FFh onto the I/O data bus.
42
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
An Exit Protection Command Set command must be issued to return the device to Read
mode.
Password Unlock command
The Password Unlock command is used to clear the NVPB Lock bit allowing to modify the
NVPBs.
The Password Unlock command must be issued along with the correct password.
There must be a 1 µs delay between successive Password Unlock commands in order to
prevent hackers from cracking the password by trying all possible 64-bit combinations. If
this delay is not respected, the latest command will be ignored.
Approximately 1 µs is required for unlocking the device after the valid 64-bit password has
been provided.
6.3.5
Non-Volatile Protection mode command set
Enter Non-Volatile Protection Command Set command
Three Bus Write cycles are required to issue the Enter Non-Volatile Protection Command
Set command. Once the command has been issued, the commands related to the Non-
Volatile Protection mode can be issued to the device.
Non-Volatile Protection Bit Program command (NVPB Program)
A block can be protected from program or erase by issuing a Non-Volatile Protection Bit
command along with the block address. This command sets the NVPB to ‘1’ for a given
block.
Read Non-Volatile Protection Bit Status command (Read NVPB Status)
The status of a NVPB for a given block or group of blocks can be read by issuing a Read
Non-Volatile Modify Protection Bit command along with the block address.
Clear all Non-Volatile Protection Bits command (Clear all NVPBs)
The NVPBs are erased simultaneously by issuing a Clear all Non-Volatile Protection Bits
command. No specific block address is required. If the NVPB Lock bit is set to ‘0’, the
command fails.
208045-07
43
Command Interface
Figure 8.
Numonyx™ Axcell™ M29EW
NVPB Program/Erase algorithm
En t er NVPB
command set.
Program NVPB
Addr = BAd
Read Bytetwice
Addr = BAd
NO
DQ6=
Toggle
YES
NO
DQ5=1
YES
Wait 500 μs
Read Bytetwice
Addr = BAd
NO
Read Bytetwice
Addr = BAd
DQ6=
Toggle
YES
DQ0=
NO
'1'(Erase)
'0'(Program)
YES
Fail
Reset
Pass
Exi t NVPB
command set
AI14242
44
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
6.3.6
NVPB Lock Bit command set
Enter NVPB Lock Bit Command Set command
Three bus Write cycles are required to issue the Enter NVPB Lock Bit Command Set
command. Once the command has been issued, the commands allowing to set the NVPB
Lock bit can be issued to the device.
NVPB Lock Bit Program command
This command is used to set the NVPB Lock bit to ‘0’ thus locking the NVPBs, and
preventing them from being modified.
Read NVPB Lock Bit Status command
This command is used to read the status of the NVPB Lock bit.
6.3.7
Volatile Protection mode command set
Enter Volatile Protection Command Set command
Three bus Write cycles are required to issue the Enter Volatile Protection Command Set
command. Once the command has been issued, the commands related to the Volatile
Protection mode can be issued to the device.
Volatile Protection Bit Program command (VPB Program)
The VPB Program command individually sets a VPB to ‘0’ for a given block.
If the NVPB for the same block is set, the block is locked regardless of the value of the VPB
bit. (see Table 16: Block Protection Status).
Read VPB Status command
The status of a VPB for a given block can be read by issuing a Read VPB Status command
along with the block address.
VPB Clear command
The VPB Clear command individually clears (sets to ‘1’) the VPB for a given block.
If the NVPB for the same block is set, the block is locked regardless of the value of the VPB
bit. (see Table 16: Block Protection Status).
6.3.8
Exit Protection command set
The Exit Protection Command Set command is used to exit from the Lock Register,
Password Protection, Non-Volatile Protection, Volatile Protection, and NVPB Lock Bit
Command Set mode. It return the device to Read mode.
208045-07
45
Command Interface
Numonyx™ Axcell™ M29EW
(1)(2)(3)
Table 13. Block Protection commands, 8-bit mode
Bus operations
5th 6th
Data Ad Data Ad Data Ad Data Ad Data Ad Data Ad Data Ad Data Ad Data
Command
1st
Data
2nd
Data
3rd
4th
7th
8th
9th
10th
11th
Ad
Ad
Ad
Enter Lock
Register
3
AAA
AA
A0
555
55
AAA
40
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Command
(4)
Set
Lock Register
Program
DAT
2
1
X
X
X
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(5)
A
Lock Register
Read
DATA
(5)
-
Enter
Password
Protection
Command
3
AAA
AA
A0
555
55
AAA
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(4)
Set
Password
PWA PWD
n
2
8
X
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(6)(7)
Program
n
Password
Read
PWD
0
PWD
1
PW
D2
PW
D3
PW
D4
PW
D5
PW
D6
PW
D7
00
00
01
02
00
03
01
04
02
05
03
06
04
07
05
Password
1
1
PW
D0
PW
D1
PW
D2
PW
D3
PW
D4
PW
D5
PW
D6
PW
D7
25
00
03
06
07
00
29
(7)
Unlock
Enter Non-
Volatile
Protection
Command
Set
3
AAA
AA
555
55
AAA
C0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(4)
NVPB
Program
2
2
1
X
X
A0
80
BAd
00
-
00
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(8)
Clear all
NVPBs
(9)
Read NVPB
Status
BAd RD(0)
(8)
Enter NVPB
Lock Bit
Command
Set
3
AAA
AA
555
55
AAA
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
NVPB Lock
Bit Program
2
1
X
X
A0
X
-
00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(8)
Read NVPB
Lock Bit
RD(0)
(8)
Status
Enter Volatile
Protection
Command
Set
3
2
AAA
X
AA
A0
555
55
00
AAA
-
E0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VPB
BAd
(8)
Program
Read VPB
Status
1
2
BAd RD(0)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(8)
VPB Clear
X
X
A0
90
BAd
01
Exit Protection
Command Set
2
X
00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(10)
Enter Extended
Memory Block
3
4
AAA
AAA
AA
AA
555
555
55
55
AAA
AAA
88
90
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(4)
Exit Extended
Memory Block
X
00
46
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
1. Ad = address; Dat = data; BAd = Any address in the Block; RD = Read data; PWDn = Password byte 0 to 7; PWAn =
Password Address (n = 0 to 7); X = Don’t care. All values in the table are in hexadecimal.
2. Grey cells represent Read cycles. The other cells are Write cycles.
3. DQ15 to DQ8 are ‘Don’t care’ during unlock and command cycles. Amax to A16 are ‘Don’t care’ during unlock and
command cycles unless an address is required.
4. An Enter command sequence must be issued prior to any operation. It disables read and write operations from and to block
0. Read and write operations from any other block are allowed.
5. DATA = Lock Register content.
6. Only one portion of password can be programmed or read by each Password Program command.
7. The password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
8. Protected and unprotected states correspond to 00 and 01, respectively.
9. The Clear all NVPBs command programs all NVPBs before erasure in order to prevent the over-erasure of previously
cleared Non Volatile Modify Protection bits.
10. If an Entry Command Set command is issued, an Exit Protection Command Set command must be issued to return the
device to Read mode.
208045-07
47
Command Interface
Numonyx™ Axcell™ M29EW
(1)(2)(3)
Table 14. Block Protection commands, 16-bit mode
Bus operations
4th
Command
1st
2nd
3rd
5th
Data
6th
Data
7th
Data
Ad
Data
Ad
Data
Ad
Data
Ad
Data
Ad
Ad
Ad
Enter Lock
Register
3
555
AA
2AA
55
555
40
-
-
-
-
-
-
-
-
Command
(4)
Set
Lock Register
Program
(5)
2
1
X
X
A0
X
-
DATA
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Lock Register
Read
DATA
(5)
Enter
Password
Protection
Command
3
555
AA
2AA
55
555
60
-
-
-
-
-
-
-
-
(4)
Set
Password
Program
2
4
7
X
A0
PWD0
25
PWAn
01
PWDn
PWD1
03
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(6)(7)
Password
Read
00
00
02
00
PWD2
PWD0
03
01
PWD3
PWD1
Password
00
02
PWD2 03 PWD3
00
29
(7)
Unlock
Enter Non-
Volatile
Protection
Command
Set
3
555
AA
2AA
55
555
C0
-
-
-
-
-
-
-
-
(4)
NVPB
Program
2
2
1
X
X
A0
80
BAd
00
-
00
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(8)
Clear all
NVPBs
(9)
Read NVPB
Status
BAd
RD(0)
Enter NVPB
Lock Bit
3
555
AA
2AA
55
555
50
-
-
-
-
-
-
-
-
Command Set
NVPB Lock Bit
Program
2
1
X
X
A0
X
-
00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Read NVPB
Lock Bit Status
RD(0)
Enter Volatile
Protection
3
555
AA
2AA
55
555
E0
-
-
-
-
-
-
-
-
Command Set
VPB Program
2
1
2
2
X
BAd
X
A0
RD(0)
A0
BAd
-
00
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Read VPB
Status
VPB Clear
BAd
X
01
00
Exit Protection
Command Set
X
90
(10)
Enter Extended
Memory Block
3
4
555
555
AA
AA
2AA
2AA
55
55
555
555
88
90
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(4)
Exit Extended
Memory Block
X
00
48
208045-07
Numonyx™ Axcell™ M29EW
Command Interface
1. Ad = address; Dat = data; BAd = Any address in the Block; RD = Read data; PWDn = Password byte 0 to 3; PWAn =
Password Address (n = 0 to 3); X = Don’t care. All values in the table are in hexadecimal.
2. Grey cells represent Read cycles. The other cells are Write cycles.
3. DQ15 to DQ8 are ‘Don’t care’ during unlock and command cycles. Amax to A16 are ‘Don’t care’ during unlock and
command cycles unless an address is required.
4. An Enter command sequence must be issued prior to any operation. It disables read and write operations from and to block
0. Read and write operations from any other block are allowed.
5. DATA = Lock Register content.
6. Only one portion of password can be programmed or read by each Password Program command.
7. The password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
8. Protected and unprotected states correspond to 00 and 01, respectively.
9. The Clear all NVPBs command programs all NVPBs before erasure in order to prevent the over-erasure of previously
cleared Non-volatile Modify Protection bits.
10. If an Entry Command Set command is issued, an Exit Protection Command Set command must be issued to return the
device to Read mode.
208045-07
49
Registers
Numonyx™ Axcell™ M29EW
7
Registers
The device feature two registers:
1. A Lock Register that allows to configure the memory blocks and Extended Memory
Block protection (see Table 16: Block Protection Status)
2. A Status Register that provides information on the current or previous Program or
Erase operations.
7.1
Lock Register
The Lock Register is a 16-bit one-time programmable register. The bits in the Lock Register
are summarized in Table 15: Lock Register bits.
See Section 6.3.3: Lock Register command set for a description of the commands allowing
to read and program the Lock Register.
7.1.1
Password Protection Mode Lock bit (DQ2)
The Password Protection Mode Lock bit, DQ0, is one-time programmable. Programming
(setting to ‘0’) this bit permanently places the device in Password Protection mode.
Any attempt to program the Password Protection mode Lock bit when the Non-Volatile
Protection Mode bit is programmed causes the operation to abort and the device to return to
Read mode.
7.1.2
Non-Volatile Protection Mode Lock bit (DQ1)
The Non-Volatile Protection Mode Lock bit, DQ1, is one-time programmable. Programming
(setting to ‘0’) this bit permanently places the device in Non-Volatile Protection mode.
When shipped from Numonyx factory, all parts default to operate in Non-Volatile Protection
mode. The memory blocks are unprotected (NVPBs set to ‘1’).
Any attempt to program the Non-Volatile Protection mode Lock bit when the Password
Protection Mode bit is programmed causes the operation to abort and the device to return to
Read mode.
7.1.3
Extended Memory Block Protection bit (DQ0)
If the device is shipped with the Extended Memory Block unlocked, the block can be
protected by setting the Extended Memory Block Protection bit, DQ0, to ‘0’. However, this bit
is one-time programmable and once protected the Extended Memory Block cannot be
unprotected any more.
The Extended Memory Block protection status can be read in Auto Select mode either by
applying V to A9 (see Table 7 and Table 8) or by issuing an Auto Select command (see
ID
Table 9 and Table 10).
50
208045-07
Numonyx™ Axcell™ M29EW
Registers
(1)
Table 15. Lock Register bits
DQ15-3(2)
DQ2
DQ1
DQ0
Password Protection Mode Lock Non-Volatile Protection Mode
bit Lock bit
Extended Memory
Block Protection bit
Reserved
1. DQ0, DQ1 and DQ2 Lock Register bits are set to ‘1’ when shipped from the Numonyx.
2. DQ15 to DQ3 are reserved and default to ‘1’.
Table 16. Block Protection Status
Block
Block
Block
NVPB Lock bit(1)
protection
status
Block Protection Status
NVPB(2)
VPB(3)
1
1
1
1
1
0
1
0
1
00h
01h
01h
Block unprotected (NVPB changeable)
Block protected by VPB (NVPB changeable)
Block protected by NVPB (NVPB changeable)
Block protected by NVPB and VPB (NVPB
changeable)
1
0
0
01h
0
0
1
1
1
0
00h
01h
Block unprotected (NVPB unchangeable)
Block protected by VPB (NVPB unchangeable)
Block protected by NVPB (NVPB
unchangeable)
0
0
0
0
1
0
01h
01h
Block protected by NVPB and VPB (NVPB
unchangeable)
1. If the NVPB Lock bit is set to ‘0’, all NVPBs are locked. If the NVPB Lock bit is set to ‘1’, all NVPBs are unlocked.
2. If the Block NVPB is set to ‘0’, the block is protected, if set to ‘1’, it is unprotected.
3. If the Block VPB is set to ‘0’, the block is protected, if set to ‘1’, it is unprotected.
208045-07
51
Registers
Figure 9.
Numonyx™ Axcell™ M29EW
Lock Register program flowchart
START
Write Unlock cycles:
Add 555h, Data AAh
Add 2AAh, Data 55h
Unlock cycle 1
unlock cycle 2
Write
Enter Lock Register command set:
Add 555h, Data 40h
Program Lock Register Data:
Add Dont' care, Data A0h
(1)
Add Dont' care , Data PDh
Polling algorithm
YES
Done
NO
NO
DQ5 = 1
YES
PASS:
FAIL
Reset to return
the device to Read mode
Write Lock Register Exit command:
Add Dont' care, Data 90h
Device returned
to Read mode
Add Dont' care, Data 00h
ai13677
1. PD is the programmed data (see Table 15: Lock Register bits).
2. Each bit of the Lock Register can only be programmed once.
52
208045-07
Numonyx™ Axcell™ M29EW
Registers
7.2
Status Register
The M29EW discrete device has one Status Register. The various bits convey information
and errors on the current and previous program/erase operation. Bus Read operations from
any address within the memory, always read the Status Register during Program and Erase
operations. It is also read during Erase Suspend when an address within a block being
erased is accessed.
The bits in the Status Register are summarized in Table 17: Status Register bits.
7.2.1
Data Polling bit (DQ7)
The Data Polling bit can be used to identify whether the Program/Erase controller has
successfully completed its operation or if it has responded to an Erase Suspend. The Data
Polling bit is output on DQ7 when the Status Register is read.
During Program operations the Data Polling bit outputs the complement of the bit being
programmed to DQ7. After successful completion of the Program operation the memory
returns to Read mode and Bus Read operations, from the address just programmed, output
DQ7, not its complement.
During Erase operations the Data Polling bit outputs ‘0’, the complement of the erased state
of DQ7. After successful completion of the Erase operation the memory returns to Read
mode.
In Erase Suspend mode the Data Polling bit will output a ‘1’ during a Bus Read operation
within a block being erased. The Data Polling bit will change from ‘0’ to ‘1’ when the
Program/Erase controller has suspended the Erase operation.
Figure 10: Data polling flow chart, gives an example of how to use the Data Polling bit. A
Valid Address is the address being programmed or an address within the block being
erased.
7.2.2
Toggle bit (DQ6)
The Toggle bit can be used to identify whether the Program/Erase controller has
successfully completed its operation or if it has responded to an Erase Suspend. The Toggle
bit is output on DQ6 when the Status Register is read.
During a Program/Erase operation the Toggle bit changes from ‘0’ to ‘1’ to ‘0’, etc., with
successive Bus Read operations at any address. After successful completion of the
operation the memory returns to Read mode.
During Erase Suspend mode the Toggle bit will output when addressing a cell within a block
being erased. The Toggle bit will stop toggling when the Program/Erase controller has
suspended the Erase operation.
Figure 11: Toggle flow chart, gives an example of how to use the Data Toggle bit.
7.2.3
Error bit (DQ5)
The Error bit can be used to identify errors detected by the Program/Erase controller. The
Error bit is set to ‘1’ when a Program, Block Erase or Chip Erase operation fails to write the
correct data to the memory. If the Error bit is set a Read/Reset command must be issued
208045-07
53
Registers
Numonyx™ Axcell™ M29EW
before other commands are issued. The Error bit is output on DQ5 when the Status Register
is read.
Note that the Program command cannot change a bit set to ‘0’ back to ‘1’ and attempting to
do so will set DQ5 to ‘1’. A Bus Read operation to that address will show the bit is still ‘0’.
One of the Erase commands must be used to set all the bits in a block or in the whole
memory from ‘0’ to ‘1’.
7.2.4
7.2.5
Erase Timer bit (DQ3)
The Erase Timer bit can be used to identify the start of Program/Erase controller operation
during a Block Erase command. Once the Program/Erase controller starts erasing the Erase
Timer bit is set to ‘1’. Before the Program/Erase controller starts the Erase Timer bit is set to
‘0’ and additional blocks to be erased may be written to the command interface. The Erase
Timer bit is output on DQ3 when the Status Register is read.
Alternative Toggle bit (DQ2)
The Alternative Toggle bit can be used to monitor the Program/Erase controller during Erase
operations. The Alternative Toggle bit is output on DQ2 when the Status Register is read.
During Chip Erase and Block Erase operations the Toggle bit changes from ‘0’ to ‘1’ to ‘0’,
etc., with successive Bus Read operations from addresses within the blocks being erased.
A protected block is treated the same as a block not being erased. Once the operation
completes the memory returns to Read mode.
During Erase Suspend the Alternative Toggle bit changes from ‘0’ to ‘1’ to ‘0’, etc. with
successive Bus Read operations from addresses within the blocks being erased. Bus Read
operations to addresses within blocks not being erased will output the memory array data as
if in Read mode.
After an Erase operation that causes the Error bit to be set, the Alternative Toggle bit can be
used to identify which block or blocks have caused the error. The Alternative Toggle bit
changes from ‘0’ to ‘1’ to ‘0’, etc. with successive Bus Read Operations from addresses
within blocks that have not erased correctly. The Alternative Toggle bit does not change if
the addressed block has erased correctly.
7.2.6
Buffered Program Abort bit (DQ1)
The Buffered Program Abort bit, DQ1, is set to ‘1’ when a Buffer Program operation aborts.
The Buffered Program Abort and Reset command must be issued to return the device to
Read mode (see Write to Buffer Program in Section 6.1: Standard commands).
For the complete polling flow chart, please refer to Figure 12.: Status Register Polling Flow
Chart.
54
208045-07
Numonyx™ Axcell™ M29EW
Registers
(1)
Table 17. Status Register bits
Operation
Address
DQ7
DQ6
DQ5 DQ3
DQ2
DQ1 RY/BY#
No
Toggle
Program(2)
Any address
DQ7
Toggle
0
–
0
0
Program During Erase Suspend
Buffered Program Abort(2)
Program Error
Any address
Any address
Any address
Any address
Erasing block
DQ7
DQ7
DQ7
0
Toggle
Toggle
Toggle
Toggle
Toggle
0
0
1
0
0
–
–
–
1
0
–
–
–
1
–
–
–
0
0
–
Hi-Z
0
Chip Erase
Toggle
Toggle
0
0
Block Erase before timeout
Block Erase
Non-erasing
block
No
toggle
0
0
0
1
Toggle
Toggle
0
0
0
0
0
1
1
–
–
–
–
–
–
0
0
Erasing block
Toggle
Non-erasing
block
No
toggle
Toggle
0
Erasing block
No Toggle
Toggle
Hi-Z
Hi-Z
Erase Suspend
Non-erasing
block
Data read as normal
Good block
address
No
toggle
0
0
Toggle
Toggle
1
1
1
1
–
–
Hi-Z
Hi-Z
Erase Error
Faulty Block
address
Toggle
1. Unspecified data bits should be ignored.
2. DQ7 for Buffer Program is related to the last address location loaded.
208045-07
55
Registers
Numonyx™ Axcell™ M29EW
Figure 10. Data polling flow chart
START
READ DQ5 & DQ7
at VALID ADDRESS
DQ7
=
DATA
YES
NO
NO
NO
DQ = 1
DQ5 = 1
YES
YES
READ DQ7
at VALID ADDRESS
DQ7
=
DATA
NO
YES
FAIL
PASS
AI07760
56
208045-07
Numonyx™ Axcell™ M29EW
Registers
Figure 11. Toggle flow chart
START
READ DQ6 at
Valid Address
READ
DQ5 & DQ6
at Valid Address
DQ6
=
NO
TOGGLE
YES
NO
DQ5
= 1
YES
READ DQ6
TWICE
at Valid Address
DQ6
=
NO
TOGGLE
YES
FAIL
PASS
AI11530
208045-07
57
Registers
Numonyx™ Axcell™ M29EW
Figure 12. Status Register Polling Flow Chart
Start
Read 1
DQ7=Valid
Data?
Programming
Operation?
Read3 correct
data?
Yes
Yes
Read 2
Read 3
Yes
Yes
Programming
Operation
Complete
No
No
No
Programming
Operation Failed
DQ5=1?
Read 2
Read 3
Read2.DQ6 ≠
Read3.DQ6
DQ6
toggling?
Invalid state use
RESET comand
Yes
DEVICE ERROR
No
Read2.DQ2 ≠
Read3.DQ2
DQ2
toggling?
Device in Erase/
Suspend Mode
Yes
No
DQ6
toggling?
Yes Timeout failure
No
Read1.DQ6 ≠
Read2.DQ6
No
Erase Complete
Device Busy , Re-
Poll
Write Buffer
Programming
Write Buffer
Program Abort
Yes
DQ1=1?
No
Yes
Device Busy , Re-
Poll
No
58
208045-07
Numonyx™ Axcell™ M29EW
Maximum Ratings
8
Maximum Ratings
Stressing the device above the rating listed in Table 18: Absolute maximum ratings may
cause permanent damage to the device. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability. These are stress ratings only and
operation of the device at these or any other conditions above those indicated in the
operating sections of this specification is not implied. Refer also to the relevant quality
documents from Numonyx.
Table 18. Absolute maximum ratings
Symbol
Parameter
Min
Max
Unit
TBIAS
TSTG
VIO
Temperature under bias
Storage temperature
Input or output voltage(1)(2)
Supply voltage
−50
−65
125
°C
°C
V
150
−0.6
−0.6
−0.6
−0.6
VCC + 0.6
VCC
4
4
V
VCCQ
Input/output supply voltage
Program voltage
V
(3)
VPPH
14.5
V
1. Minimum voltage may undershoot to −2 V during transition and for less than 20ns during transitions.
2. Maximum voltage may overshoot to VCC + 2 V during transition and for less than 20ns during transitions.
3. VPPH must not remain at 12 V for more than a total of 80hrs.
208045-07
59
DC and AC Parameters
Numonyx™ Axcell™ M29EW
9
DC and AC Parameters
This section summarizes the operating measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC characteristics tables that
follow, are derived from tests performed under the measurement conditions summarized in
Table 19: Operating and AC measurement conditions. Designers should check that the
operating conditions in their circuit match the operating conditions when relying on the
quoted parameters.
Table 19. Operating and AC measurement conditions
Parameter
CC supply voltage
Min
Max
Unit
V
2.7
1.65
-2.0
− 40
3.6
3.6
V
V
VCCQ supply voltage (VCCQ ≤ VCC
VPP supply voltage
)
12.5
85
V
Ambient operating temperature
Load capacitance (CL)
°C
pF
ns
V
30
Input rise and fall times
Input pulse voltages
10
0 to VCCQ
VCCQ/2
Input and output timing ref. voltages
V
Figure 13. AC measurement load circuit
V
V
V
PP
CC
CCQ
25 kΩ
DEVICE
UNDER
TEST
25 kΩ
C
L
0.1 µF
0.1 µF
C
includes JIG capacitance
L
AI05558b
Figure 14. AC measurement I/O waveform
V
CCQ
V
/2
CCQ
0 V
AI05557b
60
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Table 20. Power-up wait timings
Symbol
Alt.
Parameter
VCC(1) High to VCCQ(1) High
Min
Unit
tVCHVCQH
-
0
300
0
µs
µs
µs
ns
ns
(2)
tVCHPH
tVCS
tVIOS
tRH
-
VCC High to rising edge of RST#
VCCQ High to rising edge of RST#
RST# High to Chip Enable Low
RST# High to Write Enable Low
(2)
tVCQHPH
tPHEL
tPHWL
50
150
1. VCC and VCCQ ramps must be synchronized during power-up.
2. If RST# is not stable for tVCHRH or tVCQHRH, the device does not permit any Read and Write operations and a hardware
reset is required.
Figure 15. Power-up wait timings
t
VCHVCQH
VCC
VCCQ
t
PHEL
CE#
t
VCQHPH
RST#
WE#
t
VCHPH
t
PHWL
AI14247
208045-07
61
DC and AC Parameters
Numonyx™ Axcell™ M29EW
(1)
Table 21. Device capacitance
Symbol
Parameter
Test condition
Min
Max
Unit
Input capacitance for 256-Mbit and 512-Mbit
Input capacitance for 1-Gbit
3
4
8
3
8
9
CIN
VIN = 0 V
pF
Input capacitance for 2-Gbit (1-Gbit/1-Gbit)
Output capacitance
18
6
COUT
VOUT = 0 V
1. Sampled only, not 100% tested.
Table 22. DC characteristics
Symbol
Parameter
Test condition
0 V ≤ VIN ≤ VCC
Min
Typ
Max
Unit
(1)
ILI
Input leakage current
Output leakage current
-
-
-
-
±1
±1
µA
µA
ILO
0 V ≤ VOUT ≤ VCC
CE# = VIL, OE# = VIH,
f = 5 MHz
Random Read
-
-
26
12
31
16
mA
mA
ICC1
Read current
CE# = VIL, OE# = VIH,
f = 13 MHz
Page Read
256-Mbit
512-Mbit
1-Gbit
-
-
-
-
65
70
210
225
240
480
CE# = VCCQ ± 0.2 V,
RST# = VCCQ ± 0.2 V
Supply current
(Standby)
ICC2
µA
75
2-Gbit
150
VPP/WP# =
VIL or VIH
-
35
50
mA
Program/Erase
controller active
(2)
ICC3
Supply current (Program/Erase)
Read
VPP/WP#=VPPH
-
-
-
-
-
35
0.2
2
50
5
mA
µA
µA
µA
mA
VPP/WP# ≤ VCC
VPP/WP# ≤ VCC
IPP1
IPP2
IPP3
Standby
Program
15
5
Reset
RST# = VSS ± 0.2 V
0.2
0.05
current
(Program)
Program
operation
ongoing
VPP/WP# = 12 V ± 5%
0.10
V
PP/WP# = VCC
VPP/WP# = 12 V ± 5%
PP/WP# = VCC
-
0.05
0.05
0.05
-
0.10
0.10
0.10
0.8
mA
mA
mA
V
Erase
operation
ongoing
-
-
Program
current (Erase)
IPP4
V
VIL
VIH
Input Low voltage
VCC ≥ 2.7 V
VCC ≥ 2.7 V
−0.5
V
CCQ+0.
4
Input High voltage
0.7VCCQ
-
-
-
V
V
IOL = 100 µA, VCC = VCC(min)
VCCQ = VCCQ(min)
,
VOL
VOH
Output Low voltage
Output High voltage
0.15VCCQ
IOH = 100 µA, VCC = VCC(min)
VCCQ = VCCQ(min)
,
0.85VCCQ
-
-
-
-
V
V
VPPLK VPP Lock-Out voltage
-
0.4
62
208045-07
Numonyx™ Axcell™ M29EW
Table 22. DC characteristics
DC and AC Parameters
Symbol
Parameter
Test condition
Min
Typ
Max
Unit
Voltage for VPP/WP# Program
acceleration
VPPH
-
11.5
-
12.5
V
Program/Erase lockout supply
voltage
(2)
VLKO
-
2.3
-
-
V
1. The maximum input leakage current is ±5 µA on the VPP/WP# pin.
2. Sampled only, not 100% tested.
Figure 16. Random Read AC waveforms (8-bit mode)
tAVAV
A0-AMAX/A–1
CE#
VALID
tAVQV
tAXQX
tELQV
tELQX
tEHQX
tEHQZ
OE#
tGLQX
tGLQV
tGHQX
tGHQZ
DQ0-DQ7
BYTE#
VALID
tBLQV
tELBH
AI08970
208045-07
63
DC and AC Parameters
Numonyx™ Axcell™ M29EW
Figure 17. Random Read AC waveforms (16-bit mode)
tAVAV
VALID
A0-AMAX
CE#
tAVQV
tAXQX
tELQV
tELQX
tEHQX
tEHQZ
OE#
tGLQX
tGLQV
tGHQX
tGHQZ
DQ0-DQ15
BYTE#
VALID
tBHQV
tELBL
tBLQZ
AI13698
Figure 18. Page Read AC waveforms (16-bit mode)
A3-A22
A0-A2
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
tAVQV
E
tELQV
tEHQX
tEHQZ
G
tGLQV
VALID
tGHQX
tGHQZ
tAVQV1
VALID
DQ0-DQ15
DQ15A-1
VALID
VALID
VALID
VALID
VALID
VALID
AI08971c
Table 23. Read AC characteristics
M29EW
Test
condition
Symbol Alt.
Parameter
Limit
Unit
Fortified BGA
TSOP
Address Valid to Next
Address Valid
CE# = VIL,
OE# = VIL
tAVAV
tAVQV
tRC
Min
100
110
ns
ns
Address Valid to Output
Valid
CE# = VIL,
OE# = VIL
tACC
Max
100
110
64
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Table 23. Read AC characteristics
M29EW
Unit
Test
condition
Symbol Alt.
Parameter
Limit
Fortified BGA
TSOP
Address Valid to Output
Valid (Page)
CE# = VIL,
OE# = VIL
tAVQV1 tPAGE
Max
Min
25
0
ns
ns
ns
ns
ns
ns
ns
Chip Enable Low to Output
Transition
(1)
tELQX
tLZ
tE
OE# = VIL
OE# = VIL
CE# = VIL
CE# = VIL
OE# = VIL
CE# = VIL
Chip Enable Low to Output
Valid
tELQV
Max
Min
100
110
Output Enable Low to
Output Transition
(1)
tGLQX
tOLZ
tOE
tHZ
tDF
0
Output Enable Low to
Output Valid
tGLQV
Max
Max
Max
25
20
15
Chip Enable High to Output
Hi-Z
(1)
tEHQZ
Output Enable High to
Output Hi-Z
(1)
tGHQZ
tEHQX
tGHQX
tAXQX
Chip Enable, Output Enable
tOH or Address Transition to
Output Transition
-
-
Min
0
ns
ns
tELBL
tELFL Chip Enable to BYTE# Low
Max
10
tELBH tELFH or High
tBLQV tFLQV BYTE# Low to Output Valid
tBHQV tFHQV BYTE# High to Output Valid
1. Sampled only, not 100% tested.
-
-
Max
Max
1
1
µs
µs
208045-07
65
DC and AC Parameters
Numonyx™ Axcell™ M29EW
Figure 19. Write Enable Controlled Program waveforms (8-bit mode)
3rd cycle
4th cycle
PA
Read cycle
DataPolling
PA
tAVAV
tAVAV
A0-A22/
A–1
AAAh
tAVWL
tWLAX
tELQV
tGLQV
tELWL
tWHEH
E
tGHWL
G
tWLWH
tWHWL
W
tDVWH
tWHWH1
DQ7
tGHQZ
tAXQX
D
AOh
PD
tWHDX
D
OUT
DQ0-DQ7
OUT
AI13333
1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check
of Status Register Data Polling bit and by a read operation that outputs the data, DOUT, programmed by the previous
Program command.
2. PA is the address of the memory location to be programmed. PD is the data to be programmed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (see Section 7.2.1: Data Polling bit (DQ7)).
4. SeeTable 24: Write AC characteristics, Write Enable Controlled, Table 25: Write AC characteristics, Chip Enable
Controlled and Table 23: Read AC characteristics for details on the timings.
66
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Figure 20. Write Enable Controlled Program waveforms (16-bit mode)
3rd cycle
4th cycle
PA
Read cycle
Data Polling
PA
tAVAV
tAVAV
A0-Amax
555h
tAVWL
tWLAX
tELQV
tGLQV
tELWL
tWHEH
CE#
OE#
tGHWL
tWLWH
tWHWL
WE#
tDVWH
tGHQZ
tAXQX
D
AOh
PD
tWHDX
DQ7
D
OUT
DQ0-DQ15
OUT
AI13699
1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check
of Status Register Data Polling bit and by a read operation that outputs the data, DOUT, programmed by the previous
Program command.
2. PA is the address of the memory location to be programmed. PD is the data to be programmed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (see Section 7.2.1: Data Polling bit (DQ7)).
4. SeeTable 24: Write AC characteristics, Write Enable Controlled, Table 25: Write AC characteristics, Chip Enable
Controlled and Table 23: Read AC characteristics for details on the timings.
208045-07
67
DC and AC Parameters
Numonyx™ Axcell™ M29EW
M
Table 24. Write AC characteristics, Write Enable Controlled
Symbol
Alt
Parameter
Limit Fortified BGA
100
TSOP
Unit
tAVAV
tELWL
tWLWH
tDVWH
tWHDX
tWHEH
tWHWL
tAVWL
tWLAX
tGHWL
tWHGL
tWC
tCS
tWP
tDS
Address Valid to Next Address Valid
Chip Enable Low to Write Enable Low
Write Enable Low to Write Enable High
Input Valid to Write Enable High
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Max
Min
110
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
0
35
30
0
tDH
Write Enable High to Input Transition
Write Enable High to Chip Enable High
Write Enable High to Write Enable Low
Address Valid to Write Enable Low
Write Enable Low to Address Transition
Output Enable High to Write Enable Low
Write Enable High to Output Enable Low
Program/Erase Valid to RY/BY# Low
VCC High to Chip Enable Low
tCH
0
tWPH
tAS
20
0
tAH
45
0
-
tOEH
tBUSY
tVCS
0
(1)
tWHRL
30
300
tVCHEL
1. Sampled only, not 100% tested.
68
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Figure 21. Chip Enable Controlled Program waveforms (8-bit mode)
3rd cycle
4th cycle
PA
DataPolling
PA
tAVAV
A0-A22/
A–1
AAAh
tAVEL
tELAX
tWLEL
tGHEL
tEHWH
W
G
tELEH
tEHEL1
E
tDVEH
tWHWH1
DQ7
D
AOh
PD
tEHDX
DQ0-DQ7
OUT
AI13334
1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check
of Status Register Data Polling bit.
2. PA is the address of the memory location to be programmed. PD is the data to be programmed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (see Section 7.2.1: Data Polling bit (DQ7)).
4. See Table 24: Write AC characteristics, Write Enable Controlled, Table 25: Write AC characteristics, Chip Enable
Controlled and Table 23: Read AC characteristics for details on the timings.
208045-07
69
DC and AC Parameters
Numonyx™ Axcell™ M29EW
Figure 22. Chip Enable Controlled Program waveforms (16-bit mode)
3rd cycle
4th cycle
Data Polling
tAVAV
A0-Amax
555h
PA
PA
tAVEL
tELAX
tWLEL
tGHEL
tEHWH
WE#
OE#
tELEH
tEHEL1
CE#
tDVEH
D
AOh
PD
tEHDX
DQ7
DQ0-DQ15
OUT
AI14100
1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check
of Status Register Data Polling bit.
2. PA is the address of the memory location to be programmed. PD is the data to be programmed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (see Section 7.2.1: Data Polling bit (DQ7)).
4. See Table 24: Write AC characteristics, Write Enable Controlled, Table 25: Write AC characteristics, Chip Enable
Controlled and Table 23: Read AC characteristics for details on the timings.
70
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Figure 23. Chip/Block Erase waveforms (8-bit mode)
tAVAV
555h/BAd
(1)
555h
2AAh
555h
555h
2AAh
A0-Amax/A-1
tAVWL
tWLAX
tELWL
tWHEH
CE#
tGHWL
OE#
tWLWH
tWHWL
WE#
tDVWH
10h/
30h
AAh
55h
AAh
55h
tWHDX
80h
DQ0-DQ7
AI13335
1. For a Chip Erase command, addresses and data are 555h and 10h, respectively, while they are BAd and 30h for a Block
Erase command.
2. BAd is the block address.
3. See Table 24: Write AC characteristics, Write Enable Controlled, Table 25: Write AC characteristics, Chip Enable
Controlled and Table 23: Read AC characteristics for details on the timings.
Table 25. Write AC characteristics, Chip Enable Controlled
Symbol
Alt.
Parameter
Limit Fortified BGA
TSOP
Unit
tAVAV
tWLEL
tELEH
tDVEH
tEHDX
tEHWH
tEHEL
tAVEL
tELAX
tGHEL
tWC
tWS
tCP
tDS
tDH
tWH
Address Valid to Next Address Valid
Write Enable Low to Chip Enable Low
Chip Enable Low to Chip Enable High
Input Valid to Chip Enable High
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
100
110
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
35
30
0
Chip Enable High to Input Transition
Chip Enable High to Write Enable High
0
tCPH Chip Enable High to Chip Enable Low
20
0
tAS
tAH
-
Address Valid to Chip Enable Low
Chip Enable Low to Address Transition
Output Enable High Chip Enable Low
45
0
208045-07
71
DC and AC Parameters
Numonyx™ Axcell™ M29EW
Figure 24. Reset AC waveforms (no program/erase in progress)
RY/ BY#
CE#, OE#
tPHEL,
tPHGL
RST#
tPLPH
AI11300b
Figure 25. Reset during program/erase operation AC waveforms
tPLRH
RY/ BY#
tRHEL,tRHGL
CE#,OE#
RST#
tPLPH
AI11301b
Table 26. Reset AC characteristics
Symbol
Alt.
Parameter
Min
Max
Unit
(1)
tPLRH
tREADY RST# Low to Read mode, during Program or Erase
-
25
-
µs
ns
tPLPH
tRP
tRH
RST# Pulse width
100
RST# High to Write Enable Low, Chip Enable Low,
Output Enable Low
(1)
tPHEL, PHGL
t
50
-
ns
RST# Low to Standby mode, during Read mode
10
50
-
-
µs
µs
-
tRPD
RST# Low to Standby mode, during Program or Erase
RY/BY# High to Write Enable Low, Chip Enable Low,
Output Enable Low
(1)
tRHEL, RHGL
t
tRB
0
-
ns
1. Sampled only, not 100% tested.
72
208045-07
Numonyx™ Axcell™ M29EW
DC and AC Parameters
Figure 26. Accelerated program timing waveforms
V
PPH
V
/WP#
PP
V
or V
IH
IL
tVHVPP
tVHVPP
AI05563
Figure 27. Data polling AC waveforms
tEHQZ
tGHQZ
tELQV
tWHEH
CE#
tGLQV
OE#
tWHGL2
WE#
DQ7
DATA
DATA
DQ7
Valid DQ7 Data
DQ7
Valid DQ6-DQ0
Data
DQ6-DQ0
Output Flag
Output Flag
tWHRL
RY/BY#
AI13336c
1. DQ7 returns valid data bit when the ongoing Program or Erase command is completed.
2. See Table 27: Accelerated Program and Data Polling/Data Toggle AC characteristics and Table 23: Read AC
characteristics for details on the timings.
208045-07
73
DC and AC Parameters
Numonyx™ Axcell™ M29EW
Figure 28. Toggle/Alternative Toggle bit polling AC waveforms (8-bit mode)
A0-Amax/A-1
tGHAX
tAXGL
CE#
tWHGL2
tAVEL
tEHAX
WE#
tEHEL2
tGHGL2
tGHGL2
OE#
tGLQV
Toggle
tWHDX
tELQV
Stop
Output
Valid
DQ6/DQ2
Data
Toggle
Toggle
toggling
tWHRL
RY/BY#
AI13337
1. DQ6 stops toggling when the ongoing Program or Erase command is completed. DQ2 stops toggling when the in-progress
Chip Erase or Block Erase command is completed.
2. See Table 27: Accelerated Program and Data Polling/Data Toggle AC characteristics and Table 23: Read AC
characteristics for details on the timings.
Table 27. Accelerated Program and Data Polling/Data Toggle AC characteristics
Symbol
Alt
Parameter
Min
Max
Unit
tVHVPP
-
VPP/WP# raising or falling time
250
-
ns
Address setup time to Output Enable Low during
Toggle bit polling
tAXGL
tASO
tAHT
15
-
ns
tGHAX,
tEHAX
Address hold time from Output Enable during
Toggle bit polling
0
30
20
-
-
-
ns
ns
ns
ns
tEHEL2
tEPH Chip Enable High during Toggle bit polling
tOEH Output Hold time during Data and Toggle bit polling
tBUSY Program/Erase Valid to RY/BY# Low
tWHGL2,
tGHGL2
-
tWHRL
90
74
208045-07
Numonyx™ Axcell™ M29EW
Programming and Erase Performance
10
Programming and Erase Performance
Table 28. Programming and Erase Performance
Buffer
Parameter
Byte
Word
Min
Typ(1)(2)
Max(2)
Unit
Size
Block Erase (128 kbytes)
Erase Suspend latency time
Block Erase time-out
-
-
-
-
-
-
-
-
-
-
-
0.8
20
-
4
25
-
s
µs
µs
50
Single Byte
Program
-
-
-
-
150
456
µs
64
64
128
256
1
-
-
-
-
-
-
-
-
-
-
-
-
176
216
272
2.75
1.70
1.06
716
900
Byte Write to
Buffer Program
128
256
64
µs
Byte Program
1140
11.2
7.00
4.45
Effective Write to
Buffer Program
per Byte
128
256
1
µs
µs
1
Single Word
Program
-
-
-
-
150
456
32
64
128
256
512
32
64
128
256
512
-
-
-
-
-
-
-
-
-
-
-
-
-
-
32
64
128
256
512
1
-
176
216
272
396
700
5.50
3.38
2.13
1.55
1.37
20
716
900
1140
1690
3016
22.4
14.1
8.90
6.60
5.89
25
-
Word Write to
Buffer Program
-
µs
µs
-
Word Program
-
-
1
-
Effective Write to
Buffer Program
per Word
1
-
1
-
1
-
Program Suspend latency time
Program/Erase cycles (per block)
Data retention
-
-
µs
-
-
100,000
20
-
-
Cycles
Years
-
-
-
-
1. Typical values measured at room temperature and nominal voltages.
2. Sampled, but not 100% tested.
208045-07
75
Package Mechanical Specifications
Numonyx™ Axcell™ M29EW
11
Package Mechanical Specifications
Numonyx offers these devices in both lead-free and leaded packages, except that 1-Gbit
device is only available in lead-free package. The category of second level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
Figure 29. TSOP56 – 56 lead thin small-outline package, 14 x 20 mm, package
outline
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-b
1. Drawing is not to scale.
A1
α
L
Table 29. TSOP56 – 56 lead thin small-outline package, 14 x 20 mm, package mechanical data
Millimeters
Min
Inches
Min
Symbol
Typ
Max
Typ
Max
A
A1
A2
B
–
–
1.20
0.15
1.05
0.27
0.21
0.10
14.10
20.20
18.50
–
–
–
0.047
0.006
0.041
0.011
0.008
0.004
0.555
0.795
0.728
–
0.10
1.00
0.22
–
0.05
0.95
0.10
0.10
–
0.004
0.039
0.009
–
0.002
0.037
0.007
0.004
–
C
CP
E
–
–
14.00
20.00
18.40
0.50
0.60
3
13.90
19.80
18.30
–
0.551
0.787
0.724
0.020
0.024
3
0.547
0.780
0.720
–
D
D1
e
L
0.50
0
0.70
5
0.020
0
0.028
5
α
76
208045-07
Numonyx™ Axcell™ M29EW
Package Mechanical Specifications
Figure 30. Fortified BGA64 11 x 13 mm - 8 x 8 active ball array, package outline
D
D1
FD
FE
SD
SE
E
E1
ddd
BALL "A1"
A
e
b
A2
A1
BGA-Z23
1. Drawing is not to scale.
2. Drawing is bottom view.
Table 30. Fortified BGA64 11 x 13 mm - 8 x 8 active ball array, package mechanical
data
millimeters
Symbol
Typ
Min
Max
A
A1
A2
b
–
–
1.40
0.49
0.80
0.60
11.00
7.00
–
0.40
–
–
–
0.55
0.65
D
10.90
11.10
D1
ddd
e
–
–
–
0.10
1.00
13.00
7.00
2.00
3.00
0.50
0.50
–
–
E
12.90
13.10
E1
FD
FE
SD
SE
–
–
–
–
–
–
–
–
–
–
208045-07
77
Ordering Information
Numonyx™ Axcell™ M29EW
12
Ordering Information
Table 31. Ordering information scheme
Example:
RC 28F 256 M29EW H
Package
RC = Fortified BGA64: 11 x 13 mm, leaded
JS = TSOP56: 14 x 20 mm, lead free, halogen free, RoHS compliant
PC = Fortified BGA64: 11 x 13 mm, lead free, halogen free, RoHS compliant
Discrete/SCSP
28F= Discrete Parallel Interface
Device Density
256=256-Mbit
512=512-Mbit
00A=1-Gbit
00B=2-Gbit
Device Type
M29EW = 3V core, page, uniform block flash memory
Device function
H = highest block protected by VPP/WP#
L = lowest block protected by VPP/WP#
Note:
This product is also available with the Extended Memory Block Numonyx pre-locked. For
further details and ordering information contact your nearest Numonyx sales office.
Devices are shipped from Numonyx factory with the memory content bits erased to ‘1’. For a
list of available options (package, High/Low protect, etc.) or for further information on any
aspect of the device, please contact your nearest Numonyx Sales Office.
Table 32. Valid Combinations of M29EW Part Numbers
256-Mbit
512-Mbit
1-Gbit
2-Gbit
JS28F256M29EWH
JS28F256M29EWL
PC28F256M29EWH
PC28F256M29EWL
RC28F256M29EWH
RC28F256M29EWL
JS28F512M29EWH
JS28F512M29EWL
PC28F512M29EWH
PC28F512M29EWL
RC28F512M29EWH
RC28F512M29EWL
JS28F00AM29EWH
JS28F00AM29EWL
JS28F00BM29EWH
JS28F00BM29EWL
PC28F00AM29EWH PC28F00BM29EWH
PC28F00AM29EWL PC28F00BM29EWL
RC28F00AM29EWH RC28F00BM29EWH
RC28F00AM29EWL RC28F00BM29EWL
78
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
Appendix A Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
0
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
0000000-001FFFF
0020000-003FFFF
0040000-005FFFF
0060000-007FFFF
0080000-009FFFF
00A0000-00BFFFF
00C0000-00DFFFF
00E0000-00FFFFF
0100000-011FFFF
0120000-013FFFF
0140000-015FFFF
0160000-017FFFF
0180000-019FFFF
01A0000-01BFFFF
01C0000-01DFFFF
01E0000-01FFFFF
0200000-021FFFF
0220000-023FFFF
0240000-025FFFF
0260000-027FFFF
0280000-029FFFF
02A0000-02BFFFF
02C0000-02DFFFF
02E0000-02FFFFF
0300000-031FFFF
0320000-033FFFF
0340000-035FFFF
0360000-037FFFF
0380000-039FFFF
03A0000-03BFFFF
03C0000-03DFFFF
0000000-000FFFF
0010000-001FFFF
0020000-002FFFF
0030000-003FFFF
0040000-004FFFF
0050000-005FFFF
0060000-006FFFF
0070000-007FFFF
0080000-008FFFF
0090000-009FFFF
00A0000-00AFFFF
00B0000-00BFFFF
00C0000-00CFFFF
00D0000-00DFFFF
00E0000-00EFFFF
00F0000-00FFFFF
0100000-010FFFF
0110000-011FFFF
0120000-012FFFF
0130000-013FFFF
0140000-014FFFF
0150000-015FFFF
0160000-016FFFF
0170000-017FFFF
0180000-018FFFF
0190000-019FFFF
01A0000-01AFFFF
01B0000-01BFFFF
01C0000-01CFFFF
01D0000-01DFFFF
01E0000-01EFFFF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
208045-07
79
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
03E0000-03FFFFF
0400000-041FFFF
0420000-043FFFF
0440000-045FFFF
0460000-047FFFF
0480000-049FFFF
04A0000-04BFFFF
04C0000-04DFFFF
04E0000-04FFFFF
0500000-051FFFF
0520000-053FFFF
0540000-055FFFF
0560000-057FFFF
0580000-059FFFF
05A0000-05BFFFF
05C0000-05DFFFF
05E0000-05FFFFF
0600000-061FFFF
0620000-063FFFF
0640000-065FFFF
0660000-067FFFF
0680000-069FFFF
06A0000-06BFFFF
06C0000-06DFFFF
06E0000-06FFFFF
0700000-071FFFF
0720000-073FFFF
0740000-075FFFF
0760000-077FFFF
0780000-079FFFF
07A0000-07BFFFF
07C0000-07DFFFF
07E0000-07FFFFF
0800000-081FFFF
01F0000-01FFFFF
0200000-020FFFF
0210000-021FFFF
0220000-022FFFF
0230000-023FFFF
0240000-024FFFF
0250000-025FFFF
0260000-026FFFF
0270000-027FFFF
0280000-028FFFF
0290000-029FFFF
02A0000-02AFFFF
02B0000-02BFFFF
02C0000-02CFFFF
02D0000-02DFFFF
02E0000-02EFFFF
02F0000-02FFFFF
0300000-030FFFF
0310000-031FFFF
0320000-032FFFF
0330000-033FFFF
0340000-034FFFF
0350000-035FFFF
0360000-036FFFF
0370000-037FFFF
0380000-038FFFF
0390000-039FFFF
03A0000-03AFFFF
03B0000-03BFFFF
03C0000-03CFFFF
03D0000-03DFFFF
03E0000-03EFFFF
03F0000-03FFFFF
0400000-040FFFF
80
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
0820000-083FFFF
0840000-085FFFF
0860000-087FFFF
0880000-089FFFF
08A0000-08BFFFF
08C0000-08DFFFF
08E0000-08FFFFF
0900000-091FFFF
0920000-093FFFF
0940000-095FFFF
0960000-097FFFF
0980000-099FFFF
09A0000-09BFFFF
09C0000-09DFFFF
09E0000-09FFFFF
0A00000-0A1FFFF
0A20000-0A3FFFF
0A40000-0A5FFFF
0A60000-0A7FFFF
0A80000-0A9FFFF
0AA0000-0ABFFFF
0AC0000-0ADFFFF
0AE0000-0AFFFFF
0B00000-0B1FFFF
0B20000-0B3FFFF
0B40000-0B5FFFF
0B60000-0B7FFFF
0B80000-0B9FFFF
0BA0000-0BBFFFF
0BC0000-0BDFFFF
0BE0000-0BFFFFF
0C00000-0C1FFFF
0C20000-0C3FFFF
0C40000-0C5FFFF
0410000-041FFFF
0420000-042FFFF
0430000-043FFFF
0440000-044FFFF
0450000-045FFFF
0460000-046FFFF
0470000-047FFFF
0480000-048FFFF
0490000-049FFFF
04A0000-04AFFFF
04B0000-04BFFFF
04C0000-04CFFFF
04D0000-04DFFFF
04E0000-04EFFFF
04F0000-04FFFFF
0500000-050FFFF
0510000-051FFFF
0520000-052FFFF
0530000-053FFFF
0540000-054FFFF
0550000-055FFFF
0560000-056FFFF
0570000-057FFFF
0580000-058FFFF
0590000-059FFFF
05A0000-05AFFFF
05B0000-05BFFFF
05C0000-05CFFFF
05D0000-05DFFFF
05E0000-05EFFFF
05F0000-05FFFFF
0600000-060FFFF
0610000-061FFFF
0620000-062FFFF
208045-07
81
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
99
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
0C60000-0C7FFFF
0C80000-0C9FFFF
0CA0000-0CBFFFF
0CC0000-0CDFFFF
0CE0000-0CFFFFF
0D00000-0D1FFFF
0D20000-0D3FFFF
0D40000-0D5FFFF
0D60000-0D7FFFF
0D80000-0D9FFFF
0DA0000-0DBFFFF
0DC0000-0DDFFFF
0DE0000-0DFFFFF
0E00000-0E1FFFF
0E20000-0E3FFFF
0E40000-0E5FFFF
0E60000-0E7FFFF
0E80000-0E9FFFF
0EA0000-0EBFFFF
0EC0000-0EDFFFF
0EE0000-0EFFFFF
0F00000-0F1FFFF
0F20000-0F3FFFF
0F40000-0F5FFFF
0F60000-0F7FFFF
0F80000-0F9FFFF
0FA0000-0FBFFFF
0FC0000-0FDFFFF
0FE0000-0FFFFFF
1000000-101FFFF
1020000-103FFFF
1040000-105FFFF
1060000-107FFFF
1080000-109FFFF
0630000-063FFFF
0640000-064FFFF
0650000-065FFFF
0660000-066FFFF
0670000-067FFFF
0680000-068FFFF
0690000-069FFFF
06A0000-06AFFFF
06B0000-06BFFFF
06C0000-06CFFFF
06D0000-06DFFFF
06E0000-06EFFFF
06F0000-06FFFFF
0700000-070FFFF
0710000-071FFFF
0720000-072FFFF
0730000-073FFFF
0740000-074FFFF
0750000-075FFFF
0760000-076FFFF
0770000-077FFFF
0780000-078FFFF
0790000-079FFFF
07A0000-07AFFFF
07B0000-07BFFFF
07C0000-07CFFFF
07D0000-07DFFFF
07E0000-07EFFFF
07F0000-07FFFFF
0800000-080FFFF
0810000-081FFFF
0820000-082FFFF
0830000-083FFFF
0840000-084FFFF
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
82
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
10A0000-10BFFFF
10C0000-10DFFFF
10E0000-10FFFFF
1100000-111FFFF
1120000-113FFFF
1140000-115FFFF
1160000-117FFFF
1180000-119FFFF
11A0000-11BFFFF
11C0000-11DFFFF
11E0000-11FFFFF
1200000-121FFFF
1220000-123FFFF
1240000-125FFFF
1260000-127FFFF
1280000-129FFFF
12A0000-12BFFFF
12C0000-12DFFFF
12E0000-12FFFFF
1300000-131FFFF
1320000-133FFFF
1340000-135FFFF
1360000-137FFFF
1380000-139FFFF
13A0000-13BFFFF
13C0000-13DFFFF
13E0000-13FFFFF
1400000-141FFFF
1420000-143FFFF
1440000-145FFFF
1460000-147FFFF
1480000-149FFFF
14A0000-14BFFFF
14C0000-14DFFFF
0850000-085FFFF
0860000-086FFFF
0870000-087FFFF
0880000-088FFFF
0890000-089FFFF
08A0000-08AFFFF
08B0000-08BFFFF
08C0000-08CFFFF
08D0000-08DFFFF
08E0000-08EFFFF
08F0000-08FFFFF
0900000-090FFFF
0910000-091FFFF
0920000-092FFFF
0930000-093FFFF
0940000-094FFFF
0950000-095FFFF
0960000-096FFFF
0970000-097FFFF
0980000-098FFFF
0990000-099FFFF
09A0000-09AFFFF
09B0000-09BFFFF
09C0000-09CFFFF
09D0000-09DFFFF
09E0000-09EFFFF
09F0000-09FFFFF
0A00000-0A0FFFF
0A10000-0A1FFFF
0A20000-0A2FFFF
0A30000-0A3FFFF
0A40000-0A4FFFF
0A50000-0A5FFFF
0A60000-0A6FFFF
208045-07
83
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
14E0000-14FFFFF
1500000-151FFFF
1520000-153FFFF
1540000-155FFFF
1560000-157FFFF
1580000-159FFFF
15A0000-15BFFFF
15C0000-15DFFFF
15E0000-15FFFFF
1600000-161FFFF
1620000-163FFFF
1640000-165FFFF
1660000-167FFFF
1680000-169FFFF
16A0000-16BFFFF
16C0000-16DFFFF
16E0000-16FFFFF
1700000-171FFFF
1720000-173FFFF
1740000-175FFFF
1760000-177FFFF
1780000-179FFFF
17A0000-17BFFFF
17C0000-17DFFFF
17E0000-17FFFFF
1800000-181FFFF
1820000-183FFFF
1840000-185FFFF
1860000-187FFFF
1880000-189FFFF
18A0000-18BFFFF
18C0000-18DFFFF
18E0000-18FFFFF
1900000-191FFFF
0A70000-0A7FFFF
0A80000-0A8FFFF
0A90000-0A9FFFF
0AA0000-0AAFFFF
0AB0000-0ABFFFF
0AC0000-0ACFFFF
0AD0000-0ADFFFF
0AE0000-0AEFFFF
0AF0000-0AFFFFF
0B00000-0B0FFFF
0B10000-0B1FFFF
0B20000-0B2FFFF
0B30000-0B3FFFF
0B40000-0B4FFFF
0B50000-0B5FFFF
0B60000-0B6FFFF
0B70000-0B7FFFF
0B80000-0B8FFFF
0B90000-0B9FFFF
0BA0000-0BAFFFF
0BB0000-0BBFFFF
0BC0000-0BCFFFF
0BD0000-0BDFFFF
0BE0000-0BEFFFF
0BF0000-0BFFFFF
0C00000-0C0FFFF
0C10000-0C1FFFF
0C20000-0C2FFFF
0C30000-0C3FFFF
0C40000-0C4FFFF
0C50000-0C5FFFF
0C60000-0C6FFFF
0C70000-0C7FFFF
0C80000-0C8FFFF
84
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
1920000-193FFFF
1940000-195FFFF
1960000-197FFFF
1980000-199FFFF
19A0000-19BFFFF
19C0000-19DFFFF
19E0000-19FFFFF
1A00000-1A1FFFF
1A20000-1A3FFFF
1A40000-1A5FFFF
1A60000-1A7FFFF
1A80000-1A9FFFF
1AA0000-1ABFFFF
1AC0000-1ADFFFF
1AE0000-1AFFFFF
1B00000-1B1FFFF
1B20000-1B3FFFF
1B40000-1B5FFFF
1B60000-1B7FFFF
1B80000-1B9FFFF
1BA0000-1BBFFFF
1BC0000-1BDFFFF
1BE0000-1BFFFFF
1C00000-1C1FFFF
1C20000-1C3FFFF
1C40000-1C5FFFF
1C60000-1C7FFFF
1C80000-1C9FFFF
1CA0000-1CBFFFF
1CC0000-1CDFFFF
1CE0000-1CFFFFF
1D00000-1D1FFFF
1D20000-1D3FFFF
1D40000-1D5FFFF
0C90000-0C9FFFF
0CA0000-0CAFFFF
0CB0000-0CBFFFF
0CC0000-0CCFFFF
0CD0000-0CDFFFF
0CE0000-0CEFFFF
0CF0000-0CFFFFF
0D00000-0D0FFFF
0D10000-0D1FFFF
0D20000-0D2FFFF
0D30000-0D3FFFF
0D40000-0D4FFFF
0D50000-0D5FFFF
0D60000-0D6FFFF
0D70000-0D7FFFF
0D80000-0D8FFFF
0D90000-0D9FFFF
0DA0000-0DAFFFF
0DB0000-0DBFFFF
0DC0000-0DCFFFF
0DD0000-0DDFFFF
0DE0000-0DEFFFF
0DF0000-0DFFFFF
0E00000-0E0FFFF
0E10000-0E1FFFF
0E20000-0E2FFFF
0E30000-0E3FFFF
0E40000-0E4FFFF
0E50000-0E5FFFF
0E60000-0E6FFFF
0E70000-0E7FFFF
0E80000-0E8FFFF
0E90000-0E9FFFF
0EA0000-0EAFFFF
208045-07
85
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
1D60000-1D7FFFF
1D80000-1D9FFFF
1DA0000-1DBFFFF
1DC0000-1DDFFFF
1DE0000-1DFFFFF
1E00000-1E1FFFF
1E20000-1E3FFFF
1E40000-1E5FFFF
1E60000-1E7FFFF
1E80000-1E9FFFF
1EA0000-1EBFFFF
1EC0000-1EDFFFF
1EE0000-1EFFFFF
1F00000-1F1FFFF
1F20000-1F3FFFF
1F40000-1F5FFFF
1F60000-1F7FFFF
1F80000-1F9FFFF
1FA0000-1FBFFFF
1FC0000-1FDFFFF
1FE0000-1FFFFFF
2000000-201FFFF
2020000-203FFFF
2040000-205FFFF
2060000-207FFFF
2080000-209FFFF
20A0000-20BFFFF
20C0000-20DFFFF
20E0000-20FFFFF
2100000-211FFFF
2120000-213FFFF
2140000-215FFFF
2160000-217FFFF
2180000-219FFFF
0EB0000-0EBFFFF
0EC0000-0ECFFFF
0ED0000-0EDFFFF
0EE0000-0EEFFFF
0EF0000-0EFFFFF
0F00000-0F0FFFF
0F10000-0F1FFFF
0F20000-0F2FFFF
0F30000-0F3FFFF
0F40000-0F4FFFF
0F50000-0F5FFFF
0F60000-0F6FFFF
0F70000-0F7FFFF
0F80000-0F8FFFF
0F90000-0F9FFFF
0FA0000-0FAFFFF
0FB0000-0FBFFFF
0FC0000-0FCFFFF
0FD0000-0FDFFFF
0FE0000-0FEFFFF
0FF0000-0FFFFFF
1000000-100FFFF
1010000-101FFFF
1020000-102FFFF
1030000-103FFFF
1040000-104FFFF
1050000-105FFFF
1060000-106FFFF
1070000-107FFFF
1080000-108FFFF
1090000-109FFFF
10A0000-10AFFFF
10B0000-10BFFFF
10C0000-10CFFFF
86
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
21A0000-21BFFFF
21C0000-21DFFFF
21E0000-21FFFFF
2200000-221FFFF
2220000-223FFFF
2240000-225FFFF
2260000-227FFFF
2280000-229FFFF
22A0000-22BFFFF
22C0000-22DFFFF
22E0000-22FFFFF
2300000-231FFFF
2320000-233FFFF
2340000-235FFFF
2360000-237FFFF
2380000-239FFFF
23A0000-23BFFFF
23C0000-23DFFFF
23E0000-23FFFFF
2400000-241FFFF
2420000-243FFFF
2440000-245FFFF
2460000-247FFFF
2480000-249FFFF
24A0000-24BFFFF
24C0000-24DFFFF
24E0000-24FFFFF
2500000-251FFFF
2520000-253FFFF
2540000-255FFFF
2560000-257FFFF
2580000-259FFFF
25A0000-25BFFFF
25C0000-25DFFFF
10D0000-10DFFFF
10E0000-10EFFFF
10F0000-10FFFFF
1100000-110FFFF
1110000-111FFFF
1120000-112FFFF
1130000-113FFFF
1140000-114FFFF
1150000-115FFFF
1160000-116FFFF
1170000-117FFFF
1180000-118FFFF
1190000-119FFFF
11A0000-11AFFFF
11B0000-11BFFFF
11C0000-11CFFFF
11D0000-11DFFFF
11E0000-11EFFFF
11F0000-11FFFFF
1200000-120FFFF
1210000-121FFFF
1220000-122FFFF
1230000-123FFFF
1240000-124FFFF
1250000-125FFFF
1260000-126FFFF
1270000-127FFFF
1280000-128FFFF
1290000-129FFFF
12A0000-12AFFFF
12B0000-12BFFFF
12C0000-12CFFFF
12D0000-12DFFFF
12E0000-12EFFFF
208045-07
87
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
25E0000-25FFFFF
2600000-261FFFF
2620000-263FFFF
2640000-265FFFF
2660000-267FFFF
2680000-269FFFF
26A0000-26BFFFF
26C0000-26DFFFF
26E0000-26FFFFF
2700000-271FFFF
2720000-273FFFF
2740000-275FFFF
2760000-277FFFF
2780000-279FFFF
27A0000-27BFFFF
27C0000-27DFFFF
27E0000-27FFFFF
2800000-281FFFF
2820000-283FFFF
2840000-285FFFF
2860000-287FFFF
2880000-289FFFF
28A0000-28BFFFF
28C0000-28DFFFF
28E0000-28FFFFF
2900000-291FFFF
2920000-293FFFF
2940000-295FFFF
2960000-297FFFF
2980000-299FFFF
29A0000-29BFFFF
29C0000-29DFFFF
29E0000-29FFFFF
2A00000-2A1FFFF
12F0000-12FFFFF
1300000-130FFFF
1310000-131FFFF
1320000-132FFFF
1330000-133FFFF
1340000-134FFFF
1350000-135FFFF
1360000-136FFFF
1370000-137FFFF
1380000-138FFFF
1390000-139FFFF
13A0000-13AFFFF
13B0000-13BFFFF
13C0000-13CFFFF
13D0000-13DFFFF
13E0000-13EFFFF
13F0000-13FFFFF
1400000-140FFFF
1410000-141FFFF
1420000-142FFFF
1430000-143FFFF
1440000-144FFFF
1450000-145FFFF
1460000-146FFFF
1470000-147FFFF
1480000-148FFFF
1490000-149FFFF
14A0000-14AFFFF
14B0000-14BFFFF
14C0000-14CFFFF
14D0000-14DFFFF
14E0000-14EFFFF
14F0000-14FFFFF
1500000-150FFFF
88
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
2A20000-2A3FFFF
2A40000-2A5FFFF
2A60000-2A7FFFF
2A80000-2A9FFFF
2AA0000-2ABFFFF
2AC0000-2ADFFFF
2AE0000-2AFFFFF
2B00000-2B1FFFF
2B20000-2B3FFFF
2B40000-2B5FFFF
2B60000-2B7FFFF
2B80000-2B9FFFF
2BA0000-2BBFFFF
2BC0000-2BDFFFF
2BE0000-2BFFFFF
2C00000-2C1FFFF
2C20000-2C3FFFF
2C40000-2C5FFFF
2C60000-2C7FFFF
2C80000-2C9FFFF
2CA0000-2CBFFFF
2CC0000-2CDFFFF
2CE0000-2CFFFFF
2D00000-2D1FFFF
2D20000-2D3FFFF
2D40000-2D5FFFF
2D60000-2D7FFFF
2D80000-2D9FFFF
2DA0000-2DBFFFF
2DC0000-2DDFFFF
2DE0000-2DFFFFF
2E00000-2E1FFFF
2E20000-2E3FFFF
2E40000-2E5FFFF
1510000-151FFFF
1520000-152FFFF
1530000-153FFFF
1540000-154FFFF
1550000-155FFFF
1560000-156FFFF
1570000-157FFFF
1580000-158FFFF
1590000-159FFFF
15A0000-15AFFFF
15B0000-15BFFFF
15C0000-15CFFFF
15D0000-15DFFFF
15E0000-15EFFFF
15F0000-15FFFFF
1600000-160FFFF
1610000-161FFFF
1620000-162FFFF
1630000-163FFFF
1640000-164FFFF
1650000-165FFFF
1660000-166FFFF
1670000-167FFFF
1680000-068FFFF
1690000-169FFFF
16A0000-16AFFFF
16B0000-16BFFFF
16C0000-16CFFFF
16D0000-16DFFFF
16E0000-16EFFFF
16F0000-16FFFFF
1700000-170FFFF
1710000-171FFFF
1720000-172FFFF
208045-07
89
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
2E60000-2E7FFFF
2E80000-2E9FFFF
2EA0000-2EBFFFF
2EC0000-2EDFFFF
2EE0000-2EFFFFF
2F00000-2F1FFFF
2F20000-2F3FFFF
2F40000-2F5FFFF
2F60000-2F7FFFF
2F80000-2F9FFFF
2FA0000-2FBFFFF
2FC0000-2FDFFFF
2FE0000-2FFFFFF
3000000-301FFFF
3020000-303FFFF
3040000-305FFFF
3060000-307FFFF
3080000-309FFFF
30A0000-30BFFFF
30C0000-30DFFFF
30E0000-30FFFFF
3100000-311FFFF
3120000-313FFFF
3140000-315FFFF
3160000-317FFFF
3180000-319FFFF
31A0000-31BFFFF
31C0000-31DFFFF
31E0000-31FFFFF
3200000-321FFFF
3220000-323FFFF
3240000-325FFFF
3260000-327FFFF
3280000-329FFFF
1730000-173FFFF
1740000-174FFFF
1750000-175FFFF
1760000-176FFFF
1770000-177FFFF
1780000-178FFFF
1790000-179FFFF
17A0000-17AFFFF
17B0000-17BFFFF
17C0000-17CFFFF
17D0000-17DFFFF
17E0000-17EFFFF
17F0000-17FFFFF
1800000-180FFFF
1810000-181FFFF
1820000-182FFFF
1830000-183FFFF
1840000-184FFFF
1850000-185FFFF
1860000-186FFFF
1870000-187FFFF
1880000-188FFFF
1890000-189FFFF
18A0000-18AFFFF
18B0000-18BFFFF
18C0000-18CFFFF
18D0000-18DFFFF
18E0000-18EFFFF
18F0000-18FFFFF
1900000-190FFFF
1910000-191FFFF
1920000-192FFFF
1930000-193FFFF
1940000-194FFFF
90
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
32A0000-32BFFFF
32C0000-32DFFFF
32E0000-32FFFFF
3300000-331FFFF
3320000-333FFFF
3340000-335FFFF
3360000-337FFFF
3380000-339FFFF
33A0000-33BFFFF
33C0000-33DFFFF
33E0000-33FFFFF
3400000-341FFFF
3420000-343FFFF
3440000-345FFFF
3460000-347FFFF
3480000-349FFFF
34A0000-34BFFFF
34C0000-34DFFFF
34E0000-34FFFFF
3500000-351FFFF
3520000-353FFFF
3540000-355FFFF
3560000-357FFFF
3580000-359FFFF
35A0000-35BFFFF
35C0000-35DFFFF
35E0000-35FFFFF
3600000-361FFFF
3620000-363FFFF
3640000-365FFFF
3660000-367FFFF
3680000-369FFFF
36A0000-36BFFFF
36C0000-36DFFFF
1950000-195FFFF
1960000-196FFFF
1970000-197FFFF
1980000-198FFFF
1990000-199FFFF
19A0000-19AFFFF
19B0000-19BFFFF
19C0000-19CFFFF
19D0000-19DFFFF
19E0000-19EFFFF
19F0000-19FFFFF
1A00000-1A0FFFF
1A10000-1A1FFFF
1A20000-1A2FFFF
1A30000-1A3FFFF
1A40000-1A4FFFF
1A50000-1A5FFFF
1A60000-1A6FFFF
1A70000-1A7FFFF
1A80000-1A8FFFF
1A90000-1A9FFFF
1AA0000-1AAFFFF
1AB0000-1ABFFFF
1AC0000-1ACFFFF
1AD0000-1ADFFFF
1AE0000-1AEFFFF
1AF0000-1AFFFFF
1B00000-1B0FFFF
1B10000-1B1FFFF
1B20000-1B2FFFF
1B30000-1B3FFFF
1B40000-1B4FFFF
1B50000-1B5FFFF
1B60000-1B6FFFF
208045-07
91
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
36E0000-36FFFFF
3700000-371FFFF
3720000-373FFFF
3740000-375FFFF
3760000-377FFFF
3780000-379FFFF
37A0000-37BFFFF
37C0000-37DFFFF
37E0000-37FFFFF
3800000-381FFFF
3820000-383FFFF
3840000-385FFFF
3860000-387FFFF
3880000-389FFFF
38A0000-38BFFFF
38C0000-38DFFFF
38E0000-38FFFFF
3900000-391FFFF
3920000-393FFFF
3940000-395FFFF
3960000-397FFFF
3980000-399FFFF
39A0000-39BFFFF
39C0000-39DFFFF
39E0000-39FFFFF
3A00000-3A1FFFF
3A20000-3A3FFFF
3A40000-3A5FFFF
3A60000-3A7FFFF
3A80000-3A9FFFF
3AA0000-3ABFFFF
3AC0000-3ADFFFF
3AE0000-3AFFFFF
3B00000-3B1FFFF
1B70000-1B7FFFF
1B80000-1B8FFFF
1B90000-1B9FFFF
1BA0000-1BAFFFF
1BB0000-1BBFFFF
1BC0000-1BCFFFF
1BD0000-1BDFFFF
1BE0000-1BEFFFF
1BF0000-1BFFFFF
1C00000-1C0FFFF
1C10000-1C1FFFF
1C20000-1C2FFFF
1C30000-1C3FFFF
1C40000-1C4FFFF
1C50000-1C5FFFF
1C60000-1C6FFFF
1C70000-1C7FFFF
1C80000-1C8FFFF
1C90000-1C9FFFF
1CA0000-1CAFFFF
1CB0000-1CBFFFF
1CC0000-1CCFFFF
1CD0000-1CDFFFF
1CE0000-1CEFFFF
1CF0000-1CFFFFF
1D00000-1D0FFFF
1D10000-1D1FFFF
1D20000-1D2FFFF
1D30000-1D3FFFF
1D40000-1D4FFFF
1D50000-1D5FFFF
1D60000-1D6FFFF
1D70000-1D7FFFF
1D80000-1D8FFFF
92
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
3B20000-3B3FFFF
3B40000-3B5FFFF
3B60000-3B7FFFF
3B80000-3B9FFFF
3BA0000-3BBFFFF
3BC0000-3BDFFFF
3BE0000-3BFFFFF
3C00000-3C1FFFF
3C20000-3C3FFFF
3C40000-3C5FFFF
3C60000-3C7FFFF
3C80000-3C9FFFF
3CA0000-3CBFFFF
3CC0000-3CDFFFF
3CE0000-3CFFFFF
3D00000-3D1FFFF
3D20000-3D3FFFF
3D40000-3D5FFFF
3D60000-3D7FFFF
3D80000-3D9FFFF
3DA0000-3DBFFFF
3DC0000-3DDFFFF
3DE0000-3DFFFFF
3E00000-3E1FFFF
3E20000-3E3FFFF
3E40000-3E5FFFF
3E60000-3E7FFFF
3E80000-3E9FFFF
3EA0000-3EBFFFF
3EC0000-3EDFFFF
3EE0000-3EFFFFF
3F00000-3F1FFFF
3F20000-3F3FFFF
3F40000-3F5FFFF
1D90000-1D9FFFF
1DA0000-1DAFFFF
1DB0000-1DBFFFF
1DC0000-1DCFFFF
1DD0000-1DDFFFF
1DE0000-1DEFFFF
1DF0000-1DFFFFF
1E00000-1E0FFFF
1E10000-1E1FFFF
1E20000-1E2FFFF
1E30000-1E3FFFF
1E40000-1E4FFFF
1E50000-1E5FFFF
1E60000-1E6FFFF
1E70000-1E7FFFF
1E80000-1E8FFFF
1E90000-1E9FFFF
1EA0000-1EAFFFF
1EB0000-1EBFFFF
1EC0000-1ECFFFF
1ED0000-1EDFFFF
1EE0000-1EEFFFF
1EF0000-1EFFFFF
1F00000-1F0FFFF
1F10000-1F1FFFF
1F20000-1F2FFFF
1F30000-1F3FFFF
1F40000-1F4FFFF
1F50000-1F5FFFF
1F60000-1F6FFFF
1F70000-1F7FFFF
1F80000-1F8FFFF
1F90000-1F9FFFF
1FA0000-1FAFFFF
208045-07
93
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
3F60000-3F7FFFF
3F80000-3F9FFFF
3FA0000-3FBFFFF
3FC0000-3FDFFFF
3FE0000-3FFFFFF
4000000-401FFFF
4020000-403FFFF
4040000-405FFFF
4060000-407FFFF
4080000-409FFFF
40A0000-40BFFFF
40C0000-40DFFFF
40E0000-40FFFFF
4100000-411FFFF
4120000-413FFFF
4140000-415FFFF
4160000-417FFFF
4180000-419FFFF
41A0000-41BFFFF
41C0000-41DFFFF
41E0000-41FFFFF
4200000-421FFFF
4220000-423FFFF
4240000-425FFFF
4260000-427FFFF
4280000-429FFFF
42A0000-42BFFFF
42C0000-42DFFFF
42E0000-42FFFFF
4300000-431FFFF
4320000-433FFFF
4340000-435FFFF
4360000-437FFFF
4380000-439FFFF
1FB0000-1FBFFFF
1FC0000-1FCFFFF
1FD0000-1FDFFFF
1FE0000-1FEFFFF
1FF0000-1FFFFFF
2000000-200FFFF
2010000-201FFFF
2020000-202FFFF
2030000-203FFFF
2040000-204FFFF
2050000-205FFFF
2060000-206FFFF
2070000-207FFFF
2080000-208FFFF
2090000-209FFFF
20A0000-20AFFFF
20B0000-20BFFFF
20C0000-20CFFFF
20D0000-20DFFFF
20E0000-20EFFFF
20F0000-20FFFFF
2100000-210FFFF
2110000-211FFFF
2120000-212FFFF
2130000-213FFFF
2140000-214FFFF
2150000-215FFFF
2160000-216FFFF
2170000-217FFFF
2180000-218FFFF
2190000-219FFFF
21A0000-21AFFFF
21B0000-21BFFFF
21C0000-21CFFFF
94
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
43A0000-43BFFFF
43C0000-43DFFFF
43E0000-43FFFFF
4400000-441FFFF
4420000-443FFFF
4440000-445FFFF
4460000-447FFFF
4480000-449FFFF
44A0000-44BFFFF
44C0000-44DFFFF
44E0000-44FFFFF
4500000-451FFFF
4520000-453FFFF
4540000-455FFFF
4560000-457FFFF
4580000-459FFFF
45A0000-45BFFFF
45C0000-45DFFFF
45E0000-45FFFFF
4600000-461FFFF
4620000-463FFFF
4640000-465FFFF
4660000-467FFFF
4680000-469FFFF
46A0000-46BFFFF
46C0000-46DFFFF
46E0000-46FFFFF
4700000-471FFFF
4720000-473FFFF
4740000-475FFFF
4760000-477FFFF
4780000-479FFFF
47A0000-47BFFFF
47C0000-47DFFFF
21D0000-21DFFFF
21E0000-21EFFFF
21F0000-21FFFFF
2200000-220FFFF
2210000-221FFFF
2220000-222FFFF
2230000-223FFFF
2240000-224FFFF
2250000-225FFFF
2260000-226FFFF
2270000-227FFFF
2280000-228FFFF
2290000-229FFFF
22A0000-22AFFFF
22B0000-22BFFFF
22C0000-22CFFFF
22D0000-22DFFFF
22E0000-22EFFFF
22F0000-22FFFFF
2300000-230FFFF
2310000-231FFFF
2320000-232FFFF
2330000-233FFFF
2340000-234FFFF
2350000-235FFFF
2360000-236FFFF
2370000-237FFFF
2380000-238FFFF
2390000-239FFFF
23A0000-23AFFFF
23B0000-23BFFFF
23C0000-23CFFFF
23D0000-23DFFFF
23E0000-23EFFFF
208045-07
95
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
47E0000-47FFFFF
4800000-481FFFF
4820000-483FFFF
4840000-485FFFF
4860000-487FFFF
4880000-489FFFF
48A0000-48BFFFF
48C0000-48DFFFF
48E0000-48FFFFF
4900000-491FFFF
4920000-493FFFF
4940000-495FFFF
4960000-497FFFF
4980000-499FFFF
49A0000-49BFFFF
49C0000-49DFFFF
49E0000-49FFFFF
4A00000-4A1FFFF
4A20000-4A3FFFF
4A40000-4A5FFFF
4A60000-4A7FFFF
4A80000-4A9FFFF
4AA0000-4ABFFFF
4AC0000-4ADFFFF
4AE0000-4AFFFFF
4B00000-4B1FFFF
4B20000-4B3FFFF
4B40000-4B5FFFF
4B60000-4B7FFFF
4B80000-4B9FFFF
4BA0000-4BBFFFF
4BC0000-4BDFFFF
4BE0000-4BFFFFF
4C00000-4C1FFFF
23F0000-23FFFFF
2400000-240FFFF
2410000-241FFFF
2420000-242FFFF
2430000-243FFFF
2440000-244FFFF
2450000-245FFFF
2460000246FFFF
2470000-247FFFF
2480000-248FFFF
2490000-249FFFF
24A0000-24AFFFF
24B0000-24BFFFF
24C0000-24CFFFF
24D0000-24DFFFF
24E0000-24EFFFF
24F0000-24FFFFF
2500000-250FFFF
2510000-251FFFF
2520000-252FFFF
2530000-253FFFF
2540000-254FFFF
2550000-255FFFF
2560000-256FFFF
2570000-257FFFF
2580000-258FFFF
2590000-259FFFF
25A0000-25AFFFF
25B0000-25BFFFF
25C0000-25CFFFF
25D0000-25DFFFF
25E0000-25EFFFF
25F0000-25FFFFF
2600000-260FFFF
96
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
4C20000-4C3FFFF
4C40000-4C5FFFF
4C60000-4C7FFFF
4C80000-4C9FFFF
4CA0000-4CBFFFF
4CC0000-4CDFFFF
4CE0000-4CFFFFF
4D00000-4D1FFFF
4D20000-4D3FFFF
4D40000-4D5FFFF
4D60000-4D7FFFF
4D80000-4D9FFFF
4DA0000-4DBFFFF
4DC0000-4DDFFFF
4DE0000-4DFFFFF
4E00000-4E1FFFF
4E20000-4E3FFFF
4E40000-4E5FFFF
4E60000-4E7FFFF
4E80000-4E9FFFF
4EA0000-4EBFFFF
4EC0000-4EDFFFF
4EE0000-4EFFFFF
4F00000-4F1FFFF
4F20000-4F3FFFF
4F40000-4F5FFFF
4F60000-4F7FFFF
4F80000-4F9FFFF
4FA0000-4FBFFFF
4FC0000-4FDFFFF
4FE0000-4FFFFFF
5000000-501FFFF
5020000-503FFFF
5040000-505FFFF
2610000-261FFFF
2620000-262FFFF
2630000-263FFFF
2640000-264FFFF
2650000-265FFFF
2660000-266FFFF
2670000-267FFFF
2680000-268FFFF
2690000-269FFFF
26A0000-26AFFFF
26B0000-26BFFFF
26C0000-26CFFFF
26D0000-26DFFFF
26E0000-26EFFFF
26F0000-26FFFFF
2700000-270FFFF
2710000-271FFFF
2720000-272FFFF
2730000-273FFFF
2740000-274FFFF
2750000-275FFFF
2760000-276FFFF
2770000-277FFFF
2780000-278FFFF
2790000-279FFFF
27A0000-27AFFFF
27B0000-27BFFFF
27C0000-27CFFFF
27D0000-27DFFFF
27E0000-27EFFFF
27F0000-27FFFFF
2800000-280FFFF
2810000-281FFFF
2820000-282FFFF
208045-07
97
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
5060000-507FFFF
5080000-509FFFF
50A0000-50BFFFF
50C0000-50DFFFF
50E0000-50FFFFF
5100000-511FFFF
5120000-513FFFF
5140000-515FFFF
5160000-517FFFF
5180000-519FFFF
51A0000-51BFFFF
51C0000-51DFFFF
51E0000-51FFFFF
5200000-521FFFF
5220000-523FFFF
5240000-525FFFF
5260000-527FFFF
5280000-529FFFF
52A0000-52BFFFF
52C0000-52DFFFF
52E0000-52FFFFF
5300000-531FFFF
5320000-533FFFF
5340000-535FFFF
5360000-537FFFF
5380000-539FFFF
53A0000-53BFFFF
53C0000-53DFFFF
53E0000-53FFFFF
5400000-541FFFF
5420000-543FFFF
5440000-545FFFF
5460000-547FFFF
5480000-549FFFF
2830000-283FFFF
2840000-284FFFF
2850000-285FFFF
2860000-286FFFF
2870000-287FFFF
2880000-288FFFF
2890000-289FFFF
28A0000-28AFFFF
28B0000-28BFFFF
28C0000-28CFFFF
28D0000-28DFFFF
28E0000-28EFFFF
28F0000-28FFFFF
2900000-290FFFF
2910000-291FFFF
2920000-292FFFF
2930000-293FFFF
2940000-294FFFF
2950000-295FFFF
2960000-296FFFF
2970000-297FFFF
2980000-298FFFF
2990000-299FFFF
29A0000-29AFFFF
29B0000-29BFFFF
29C0000-29CFFFF
29D0000-29DFFFF
29E0000-29EFFFF
29F0000-29FFFFF
2A00000-2A0FFFF
2A10000-2A1FFFF
2A20000-2A2FFFF
2A30000-2A3FFFF
2A40000-2A4FFFF
98
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
54A0000-54BFFFF
54C0000-54DFFFF
54E0000-54FFFFF
5500000-551FFFF
5520000-553FFFF
5540000-555FFFF
5560000-557FFFF
5580000-559FFFF
55A0000-55BFFFF
55C0000-55DFFFF
55E0000-55FFFFF
5600000-561FFFF
5620000-563FFFF
5640000-565FFFF
5660000-567FFFF
5680000-569FFFF
56A0000-56BFFFF
56C0000-56DFFFF
56E0000-56FFFFF
5700000-571FFFF
5720000-573FFFF
5740000-575FFFF
5760000-577FFFF
5780000-579FFFF
57A0000-57BFFFF
57C0000-57DFFFF
57E0000-57FFFFF
5800000-581FFFF
5820000-583FFFF
5840000-585FFFF
5860000-587FFFF
5880000-589FFFF
58A0000-58BFFFF
58C0000-58DFFFF
2A50000-2A5FFFF
2A60000-2A6FFFF
2A70000-2A7FFFF
2A80000-2A8FFFF
2A90000-2A9FFFF
2AA0000-2AAFFFF
2AB0000-2ABFFFF
2AC0000-2ACFFFF
2AD0000-2ADFFFF
2AE0000-2AEFFFF
2AF0000-2AFFFFF
2B00000-2B0FFFF
2B10000-2B1FFFF
2B20000-2B2FFFF
2B30000-2B3FFFF
2B40000-2B4FFFF
2B50000-2B5FFFF
2B60000-2B6FFFF
2B70000-2B7FFFF
2B80000-2B8FFFF
2B90000-2B9FFFF
2BA0000-2BAFFFF
2BB0000-2BBFFFF
2BC0000-2BCFFFF
2BD0000-2BDFFFF
2BE0000-2BEFFFF
2BF0000-2BFFFFF
2C00000-2C0FFFF
2C10000-2C1FFFF
2C20000-2C2FFFF
2C30000-2C3FFFF
2C40000-2C4FFFF
2C50000-2C5FFFF
2C60000-2C6FFFF
208045-07
99
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
58E0000-58FFFFF
5900000-591FFFF
5920000-593FFFF
5940000-595FFFF
5960000-597FFFF
5980000-599FFFF
59A0000-59BFFFF
59C0000-59DFFFF
59E0000-59FFFFF
5A00000-5A1FFFF
5A20000-5A3FFFF
5A40000-5A5FFFF
5A60000-5A7FFFF
5A80000-5A9FFFF
5AA0000-5ABFFFF
5AC0000-5ADFFFF
5AE0000-5AFFFFF
5B00000-5B1FFFF
5B20000-5B3FFFF
5B40000-5B5FFFF
5B60000-5B7FFFF
5B80000-5B9FFFF
5BA0000-5BBFFFF
5BC0000-5BDFFFF
5BE0000-5BFFFFF
5C00000-5C1FFFF
5C20000-5C3FFFF
5C40000-5C5FFFF
5C60000-5C7FFFF
5C80000-5C9FFFF
5CA0000-5CBFFFF
5CC0000-5CDFFFF
5CE0000-5CFFFFF
5D00000-5D1FFFF
2C70000-2C7FFFF
2C80000-2C8FFFF
2C90000-2C9FFFF
2CA0000-2CAFFFF
2CB0000-2CBFFFF
2CC0000-2CCFFFF
2CD0000-2CDFFFF
2CE0000-2CEFFFF
2CF0000-2CFFFFF
2D00000-2D0FFFF
2D10000-2D1FFFF
2D20000-2D2FFFF
2D30000-2D3FFFF
2D40000-2D4FFFF
2D50000-2D5FFFF
2D60000-2D6FFFF
2D70000-2D7FFFF
2D80000-2D8FFFF
2D90000-2D9FFFF
2DA0000-2DAFFFF
2DB0000-2DBFFFF
2DC0000-2DCFFFF
2DD0000-2DDFFFF
2DE0000-2DEFFFF
2DF0000-2DFFFFF
2E00000-2E0FFFF
2E10000-2E1FFFF
2E20000-2E2FFFF
2E30000-2E3FFFF
2E40000-2E4FFFF
2E50000-2E5FFFF
2E60000-2E6FFFF
2E70000-2E7FFFF
2E80000-2E8FFFF
100
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
5D20000-5D3FFFF
5D40000-5D5FFFF
5D60000-5D7FFFF
5D80000-5D9FFFF
5DA0000-5DBFFFF
5DC0000-5DDFFFF
5DE0000-5DFFFFF
5E00000-5E1FFFF
5E20000-5E3FFFF
5E40000-5E5FFFF
5E60000-5E7FFFF
5E80000-5E9FFFF
5EA0000-5EBFFFF
5EC0000-5EDFFFF
5EE0000-5EFFFFF
5F00000-5F1FFFF
5F20000-5F3FFFF
5F40000-5F5FFFF
5F60000-5F7FFFF
5F80000-5F9FFFF
5FA0000-5FBFFFF
5FC0000-5FDFFFF
5FE0000-5FFFFFF
6000000-601FFFF
6020000-603FFFF
6040000-605FFFF
6060000-607FFFF
6080000-609FFFF
60A0000-60BFFFF
60C0000-60DFFFF
60E0000-60FFFFF
6100000-611FFFF
6120000-613FFFF
6140000-615FFFF
2E90000-2E9FFFF
2EA0000-2EAFFFF
2EB0000-2EBFFFF
2EC0000-2ECFFFF
2ED0000-2EDFFFF
2EE0000-2EEFFFF
2EF0000-2EFFFFF
2F00000-2F0FFFF
2F10000-2F1FFFF
2F20000-2F2FFFF
2F30000-2F3FFFF
2F40000-2F4FFFF
2F50000-2F5FFFF
2F60000-2F6FFFF
2F70000-2F7FFFF
2F80000-2F8FFFF
2F90000-2F9FFFF
22FA00002FAFFFF
2FB0000-2FBFFFF
2FC0000-2FCFFFF
2FD0000-2FDFFFF
2FE0000-2FEFFFF
2FF0000-2FFFFFF
3000000-300FFFF
3010000-301FFFF
3020000-302FFFF
3030000-303FFFF
3040000-304FFFF
3050000-305FFFF
3060000-306FFFF
3070000-307FFFF
3080000-308FFFF
3090000-309FFFF
30A0000-30AFFFF
208045-07
101
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
6160000-617FFFF
6180000-619FFFF
61A0000-61BFFFF
61C0000-61DFFFF
61E0000-61FFFFF
6200000-621FFFF
6220000-623FFFF
6240000-625FFFF
6260000-627FFFF
6280000-629FFFF
62A0000-62BFFFF
62C0000-62DFFFF
62E0000-62FFFFF
6300000-631FFFF
6320000-633FFFF
6340000-635FFFF
6360000-637FFFF
6380000-639FFFF
63A0000-63BFFFF
63C0000-63DFFFF
63E0000-63FFFFF
6400000-641FFFF
6420000-643FFFF
6440000-645FFFF
6460000-647FFFF
6480000-649FFFF
64A0000-64BFFFF
64C0000-64DFFFF
64E0000-64FFFFF
6500000-651FFFF
6520000-653FFFF
6540000-655FFFF
6560000-657FFFF
6580000-659FFFF
30B0000-30BFFFF
30C0000-30CFFFF
30D0000-30DFFFF
30E0000-30EFFFF
30F0000-30FFFFF
3100000-310FFFF
3110000-311FFFF
3120000-312FFFF
3130000-313FFFF
3140000-314FFFF
3150000-315FFFF
3160000-316FFFF
3170000-317FFFF
3180000-318FFFF
3190000-319FFFF
31A0000-31AFFFF
31B0000-31BFFFF
31C0000-31CFFFF
31D0000-31DFFFF
31E0000-31EFFFF
31F0000-31FFFFF
3200000-320FFFF
3210000-321FFFF
3220000-322FFFF
3230000-323FFFF
3240000-324FFFF
3250000-325FFFF
3260000-326FFFF
3270000-327FFFF
3280000-328FFFF
3290000-329FFFF
32A0000-32AFFFF
32B0000-32BFFFF
32C0000-32CFFFF
102
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
65A0000-65BFFFF
65C0000-65DFFFF
65E0000-65FFFFF
6600000-661FFFF
6620000-663FFFF
6640000-665FFFF
6660000-667FFFF
6680000-669FFFF
66A0000-66BFFFF
66C0000-66DFFFF
66E0000-66FFFFF
6700000-671FFFF
6720000-673FFFF
6740000-675FFFF
6760000-677FFFF
6780000-679FFFF
67A0000-67BFFFF
67C0000-67DFFFF
67E0000-67FFFFF
6800000-681FFFF
6820000-683FFFF
6840000-685FFFF
6860000-687FFFF
6880000-689FFFF
68A0000-68BFFFF
68C0000-68DFFFF
68E0000-68FFFFF
6900000-691FFFF
6920000-693FFFF
6940000-695FFFF
6960000-697FFFF
6980000-699FFFF
69A0000-69BFFFF
69C0000-69DFFFF
32D0000-32DFFFF
32E0000-32EFFFF
32F0000-32FFFFF
3300000-330FFFF
3310000-331FFFF
3320000-332FFFF
3330000-333FFFF
3340000-334FFFF
3350000-335FFFF
3360000-336FFFF
3370000-337FFFF
3380000-338FFFF
3390000-339FFFF
33A0000-33AFFFF
33B0000-33BFFFF
33C0000-33CFFFF
33D0000-33DFFFF
33E0000-33EFFFF
33F0000-33FFFFF
3400000-340FFFF
3410000-341FFFF
3420000-342FFFF
3430000-343FFFF
3440000-344FFFF
3450000-345FFFF
3460000-346FFFF
3470000-347FFFF
3480000-348FFFF
3490000-349FFFF
34A0000-34AFFFF
34B0000-34BFFFF
34C0000-34CFFFF
34D0000-34DFFFF
34E0000-34EFFFF
208045-07
103
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
69E0000-69FFFFF
6A00000-6A1FFFF
6A20000-6A3FFFF
6A40000-6A5FFFF
6A60000-6A7FFFF
6A80000-6A9FFFF
6AA0000-6ABFFFF
6AC0000-6ADFFFF
6AE0000-6AFFFFF
6B00000-6B1FFFF
6B20000-6B3FFFF
6B40000-6B5FFFF
6B60000-6B7FFFF
6B80000-6B9FFFF
6BA0000-6BBFFFF
6BC0000-6BDFFFF
6BE0000-6BFFFFF
6C00000-6C1FFFF
6C20000-6C3FFFF
6C40000-6C5FFFF
6C60000-6C7FFFF
6C80000-6C9FFFF
6CA0000-6CBFFFF
6CC0000-6CDFFFF
6CE0000-6CFFFFF
6D00000-6D1FFFF
6D20000-6D3FFFF
6D40000-6D5FFFF
6D60000-6D7FFFF
6D80000-6D9FFFF
6DA0000-6DBFFFF
6DC0000-6DDFFFF
6DE0000-6DFFFFF
6E00000-6E1FFFF
34F0000-34FFFFF
3500000-350FFFF
3510000-351FFFF
3520000-352FFFF
3530000-353FFFF
3540000-354FFFF
3550000-355FFFF
3560000-356FFFF
3570000-357FFFF
3580000-358FFFF
3590000-359FFFF
35A0000-35AFFFF
35B0000-35BFFFF
35C0000-35CFFFF
35D0000-35DFFFF
35E0000-35EFFFF
35F0000-35FFFFF
3600000-360FFFF
3610000-361FFFF
3620000-362FFFF
3630000-363FFFF
3640000-364FFFF
3650000-365FFFF
3660000-366FFFF
3670000-367FFFF
3680000-368FFFF
3690000-369FFFF
36A0000-36AFFFF
36B0000-36BFFFF
36C0000-36CFFFF
36D0000-36DFFFF
36E0000-36EFFFF
36F0000-36FFFFF
3700000-370FFFF
104
208045-07
Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
6E20000-6E3FFFF
6E40000-6E5FFFF
6E60000-6E7FFFF
6E80000-6E9FFFF
6EA0000-6EBFFFF
6EC0000-6EDFFFF
6EE0000-6EFFFFF
6F00000-6F1FFFF
6F20000-6F3FFFF
6F40000-6F5FFFF
6F60000-6F7FFFF
6F80000-6F9FFFF
6FA0000-6FBFFFF
6FC0000-6FDFFFF
6FE0000-6FFFFFF
7000000-701FFFF
7020000-703FFFF
7040000-705FFFF
7060000-707FFFF
7080000-709FFFF
70A0000-70BFFFF
70C0000-70DFFFF
70E0000-70FFFFF
7100000-711FFFF
7120000-713FFFF
7140000-715FFFF
7160000-717FFFF
7180000-719FFFF
71A0000-71BFFFF
71C0000-71DFFFF
71E0000-71FFFFF
7200000-721FFFF
7220000-723FFFF
7240000-725FFFF
3710000-371FFFF
3720000-372FFFF
3730000-373FFFF
3740000-374FFFF
3750000-375FFFF
3760000-376FFFF
3770000-377FFFF
3780000-378FFFF
3790000-379FFFF
37A0000-37AFFFF
37B0000-37BFFFF
37C0000-37CFFFF
37D0000-37DFFFF
37E0000-37EFFFF
37F0000-37FFFFF
3800000-380FFFF
3810000-381FFFF
3820000-382FFFF
3830000-383FFFF
3840000-384FFFF
3850000-385FFFF
3860000-386FFFF
3870000-387FFFF
3880000-388FFFF
3890000-389FFFF
38A0000-38AFFFF
38B0000-38BFFFF
38C0000-38CFFFF
38D0000-38DFFFF
38E0000-38EFFFF
38F0000-38FFFFF
3900000-390FFFF
3910000-391FFFF
3920000-392FFFF
208045-07
105
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
7260000-727FFFF
7280000-729FFFF
72A0000-72BFFFF
72C0000-72DFFFF
72E0000-72FFFFF
7300000-731FFFF
7320000-733FFFF
7340000-735FFFF
7360000-737FFFF
7380000-739FFFF
73A0000-73BFFFF
73C0000-73DFFFF
73E0000-73FFFFF
7400000-741FFFF
7420000-743FFFF
7440000-745FFFF
7460000-747FFFF
7480000-749FFFF
74A0000-74BFFFF
74C0000-74DFFFF
74E0000-74FFFFF
7500000-751FFFF
7520000-753FFFF
7540000-755FFFF
7560000-757FFFF
7580000-759FFFF
75A0000-75BFFFF
75C0000-75DFFFF
75E0000-75FFFFF
7600000-761FFFF
7620000-763FFFF
7640000-765FFFF
7660000-767FFFF
7680000-769FFFF
3930000-393FFFF
3940000-394FFFF
3950000-395FFFF
3960000-396FFFF
3970000-397FFFF
3980000-398FFFF
3990000-399FFFF
39A0000-39AFFFF
39B0000-39BFFFF
39C0000-39CFFFF
39D0000-39DFFFF
39E0000-39EFFFF
39F0000-39FFFFF
3A00000-3A0FFFF
3A10000-3A1FFFF
3A20000-3A2FFFF
3A30000-3A3FFFF
3A40000-3A4FFFF
3A50000-3A5FFFF
3A60000-3A6FFFF
3A70000-3A7FFFF
3A80000-3A8FFFF
3A90000-3A9FFFF
3AA0000-3AAFFFF
3AB0000-3ABFFFF
3AC0000-3ACFFFF
3AD0000-3ADFFFF
3AE0000-3AEFFFF
3AF0000-3AFFFFF
3B00000-3B0FFFF
3B10000-3B1FFFF
3B20000-3B2FFFF
3B30000-3B3FFFF
3B40000-3B4FFFF
106
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Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
76A0000-76BFFFF
76C0000-76DFFFF
76E0000-76FFFFF
7700000-771FFFF
7720000-773FFFF
7740000-775FFFF
7760000-777FFFF
7780000-779FFFF
77A0000-77BFFFF
77C0000-77DFFFF
77E0000-77FFFFF
7800000-781FFFF
7820000-783FFFF
7840000-785FFFF
7860000-787FFFF
7880000-789FFFF
78A0000-78BFFFF
78C0000-78DFFFF
78E0000-78FFFFF
7900000-791FFFF
7920000-793FFFF
7940000-795FFFF
7960000-797FFFF
7980000-799FFFF
79A0000-79BFFFF
79C0000-79DFFFF
79E0000-79FFFFF
7A00000-7A1FFFF
7A20000-7A3FFFF
7A40000-7A5FFFF
7A60000-7A7FFFF
7A80000-7A9FFFF
7AA0000-7ABFFFF
7AC0000-7ADFFFF
3B50000-3B5FFFF
3B60000-3B6FFFF
3B70000-3B7FFFF
3B80000-3B8FFFF
3B90000-3B9FFFF
3BA0000-3BAFFFF
3BB0000-3BBFFFF
3BC0000-3BCFFFF
3BD0000-3BDFFFF
3BE0000-3BEFFFF
3BF0000-3BFFFFF
3C00000-3C0FFFF
3C10000-3C1FFFF
3C20000-3C2FFFF
3C30000-3C3FFFF
3C40000-3C4FFFF
3C50000-3C5FFFF
3C60000-3C6FFFF
3C70000-3C7FFFF
3C80000-3C8FFFF
3C90000-3C9FFFF
3CA0000-3CAFFFF
3CB0000-3CBFFFF
3CC0000-3CCFFFF
3CD0000-3CDFFFF
3CE0000-3CEFFFF
3CF0000-3CFFFFF
3D00000-3D0FFFF
3D10000-3D1FFFF
3D20000-3D2FFFF
3D30000-3D3FFFF
3D40000-3D4FFFF
3D50000-3D5FFFF
3D60000-3D6FFFF
208045-07
107
Memory Address Table
Numonyx™ Axcell™ M29EW
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
983
984
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
7AE0000-7AFFFFF
7B00000-7B1FFFF
7B20000-7B3FFFF
7B40000-7B5FFFF
7B60000-7B7FFFF
7B80000-7B9FFFF
7BA0000-7BBFFFF
7BC0000-7BDFFFF
7BE0000-7BFFFFF
7C00000-7C1FFFF
7C20000-7C3FFFF
7C40000-7C5FFFF
7C60000-7C7FFFF
7C80000-7C9FFFF
7CA0000-7CBFFFF
7CC0000-7CDFFFF
7CE0000-7CFFFFF
7D00000-7D1FFFF
7D20000-7D3FFFF
7D40000-7D5FFFF
7D60000-7D7FFFF
7D80000-7D9FFFF
7DA0000-7DBFFFF
7DC0000-7DDFFFF
7DE0000-7DFFFFF
7E00000-7E1FFFF
7E20000-7E3FFFF
7E40000-7E5FFFF
7E60000-7E7FFFF
7E80000-7E9FFFF
7EA0000-7EBFFFF
7EC0000-7EDFFFF
7EE0000-7EFFFFF
7F00000-7F1FFFF
3D70000-3D7FFFF
3D80000-3D8FFFF
3D90000-3D9FFFF
3DA0000-3DAFFFF
3DB0000-3DBFFFF
3DC0000-3DCFFFF
3DD0000-3DDFFFF
3DE0000-3DEFFFF
3DF0000-3DFFFFF
3E00000-3E0FFFF
3E10000-3E1FFFF
3E20000-3E2FFFF
3E30000-3E3FFFF
3E40000-3E4FFFF
3E50000-3E5FFFF
3E60000-3E6FFFF
3E70000-3E7FFFF
3E80000-3E8FFFF
3E90000-3E9FFFF
3EA0000-3EAFFFF
3EB0000-3EBFFFF
3EC0000-3ECFFFF
3ED0000-3EDFFFF
3EE0000-3EEFFFF
3EF0000-3EFFFFF
3F00000-3F0FFFF
3F10000-3F1FFFF
3F20000-3F2FFFF
3F30000-3F3FFFF
3F40000-3F4FFFF
3F50000-3F5FFFF
3F60000-3F6FFFF
3F70000-3F7FFFF
3F80000-3F8FFFF
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
108
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Numonyx™ Axcell™ M29EW
Memory Address Table
(1)(2)(3)(4)
Table 33. Block Address Table for Descrete Device (Up to 1-Gbit)
Block Size
(Kbytes / Kwords)
x8 Address
(HEX)
x16 Address
(HEX)
Block Number
1017
1018
1019
1020
1021
1022
1023
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
128 / 64
7F20000-7F3FFFF
7F40000-7F5FFFF
7F60000-7F7FFFF
7F80000-7F9FFFF
7FA0000-7FBFFFF
7FC0000-7FDFFFF
7FE0000-7FFFFFF
3F90000-3F9FFFF
3FA0000-3FAFFFF
3FB0000-3FBFFFF
3FC0000-3FCFFFF
3FD0000-3FDFFFF
3FE0000-3FEFFFF
3FF0000-3FFFFFF
1. The 256-Mbit device consists of 256 blocks, from block 0 to block 255.
2. The 512-Mbit device consists of 512 blocks, from block 0 to block 511.
3. The 1-Gbit device consists of 1024 blocks, from block 0 to block 1023.
4. The 2-Gbit device is a 1-Gbit/1-Gbit stack; there’re in total 2048 blocks, from block 0 to block 2047, including upper die and
bottom die.
208045-07
109
Common Flash Interface (CFI)
Numonyx™ Axcell™ M29EW
Appendix B Common Flash Interface (CFI)
The Common Flash Interface is a JEDEC approved, standardized data structure that can be read from
the Flash memory device. It allows a system software to query the device to determine various electrical
and timing parameters, density information and functions supported by the memory. The system can
interface easily with the device, enabling the software to upgrade itself when necessary.
When the Read CFI Query command is issued, the memory enters Read CFI Query mode and read
operations output the CFI data. Table 34, Table 35, Table 36, Table 37 and Table 38 and show the
addresses (A-1, A0-A7) used to retrieve the data.
(1)
Table 34. Query structure overview
Address
Sub-section name
Description
x16
x8
10h
1Bh
27h
20h CFI query identification string
36h System interface information
4Eh Device geometry definition
Command set ID and algorithm data offset
Device timing & voltage information
Flash device layout
Additional information specific to the primary
algorithm (optional)
40h
80h Primary algorithm-specific extended query table
1. Query data are always presented on the lowest order data outputs.
(1)
Table 35. CFI query identification string
Address
Data
Description
Value
x16
x8
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
30h
32h
34h
0051h
‘Q’
‘R’
‘Y’
0052h Query Unique ASCII String ‘QRY’
0059h
0002h
Primary algorithm command set and control interface ID code 16 bit
ID code defining a specific algorithm
AMD
compatible
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Address for primary algorithm extended query table (see Table 38)
P = 40h
NA
Alternate vendor command set and control interface ID code second
vendor - specified algorithm supported
Address for alternate algorithm extended query table
NA
1. Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’.
110
208045-07
Numonyx™ Axcell™ M29EW
Common Flash Interface (CFI)
(1)
Table 36. CFI query system interface information
Address
Data
Description
Value
x16
x8
VCC logic supply minimum Program/Erase voltage
bit 7 to 4BCD value in volts
bit 3 to 0BCD value in 100 mV
1Bh
36h
0027h
0036h
2.7 V
3.6 V
VCC logic supply maximum Program/Erase voltage
1Ch
1Dh
38h
3Ah
bit 7 to 4BCD value in volts
bit 3 to 0BCD value in 100 mV
VPPH [programming] supply minimum Program/Erase
voltage
bit 7 to 4HEX value in volts
bit 3 to 0BCD value in 100 mV
00B5h
00C5h
11.5 V
12.5 V
VPPH [programming] supply maximum Program/Erase
voltage
bit 7 to 4HEX value in volts
bit 3 to 0BCD value in 10 mV
1Eh
3Ch
1Fh
20h
21h
3Eh
40h
42h
0008h
0008h
000Ah
Typical time-out for single byte/word program = 2n µs
256 µs
256 µs
1 s
Typical time-out for maximum size buffer program =
2n µs
Typical time-out for individual block erase = 2n ms
256-Mbit 262 s
512-Mbit 524 s
1-Gbit 1048 s
2-Gbit 2097 s
0012h / 0013h /
0014h / 0015h
22h
44h
Typical time-out for full Chip Erase = 2n ms
Maximum time-out for byte/word program = 2n times
typical time-out
23h
24h
25h
46h
48h
4Ah
0001h
0002h
0002h
512 µs
1024 µs
4 s
Maximum time-out for buffer program = 2n times
typical time-out
Maximum time-out per individual block erase = 2n
times typical time-out
256-Mbit 1048 s
512-Mbit 2096 s
1-Gbit 4192 s
2-Gbit 4192 s
Maximum time-out for Chip Erase = 2n times typical
time-out
26h
4Ch
0002h
1. The values given in the above table are valid for both packages.
208045-07
111
Common Flash Interface (CFI)
Numonyx™ Axcell™ M29EW
Table 37. Device geometry definition
Address
Data
Description
Value
x16
x8
32 Mbytes
64 Mbytes
27h
4Eh
0019h / 001Ah / 001Bh/001Ch Device size = 2n in number of bytes
128 Mbytes
256 Mbytes
28h
29h
50h
52h
0002h
x8, x16
Async.
Flash device interface code description
0000h
2Ah
2Bh
54h
56h
000Ah
0000h
Maximum number of bytes in multiple-byte
program or page= 2n
1024
1
Number of Erase block regions. It specifies the
number of regions containing contiguous Erase
blocks of the same size.
2Ch
58h
0001h
256
512
Erase block region 1 information
Number of Erase blocks of identical size =
00FFh + 1 / 01FFh +1 / 03FFh + 1
2Dh
2Eh
5Ah 00FFh / 00FFh / 00FFh / 00FFh
5Ch
0000h / 0001h / 0003h / 0007h
1024
2048
2Fh
30h
5Eh
60h
0000h
0002h
Erase block region 1 information
Block size in region 1 = 0200h * 256 byte
128 Kbytes
31h
32h
33h
34h
62h
64h
66h
68h
0000h
0000h
0000h
0000h
Erase block region 2 information
Erase block region 3 information
Erase block region 4 information
0
35h
36h
37h
38h
6Ah
6Ch
6Eh
70h
0000h
0000h
0000h
0000h
0
0
39h
3Ah
3Bh
3Ch
72h
74h
76h
78h
0000h
0000h
0000h
0000h
112
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Numonyx™ Axcell™ M29EW
Common Flash Interface (CFI)
(1)
Table 38. Primary algorithm-specific extended query table
Address
Data
Description
Value
x16
x8
40h
41h
42h
43h
44h
80h
82h
84h
86h
88h
0050h
‘P’
0052h Primary algorithm extended query table unique ASCII string “PRI”
0049h
‘R’
‘I’
0031h Major version number, ASCII
0033h Minor version number, ASCII
‘1’
‘3’
Address sensitive unlock (bits 1 to 0)
0018h 00 = required, 01= not required
Silicon revision number (bits 7 to 2)
45h
8Ah
Required
Erase Suspend
00 = not supported, 01 = Read only, 02 = read and write
46h
47h
48h
8Ch
8Eh
90h
0002h
2
1
Block protection
00 = not supported, x = number of blocks per group
0001h
Temporary block unprotect
0000h
Not
supported
00 = not supported, 01 = supported
Block protect / unprotect
0008h
49h
4Ah
4Bh
92h
94h
96h
8
08 = M29EWH/M29EWL
0000h Simultaneous operations: not supported
NA
Not
supported
0000h Burst mode, 00 = not supported, 01 = supported
Page mode, 00 = not supported, 01 = 8-word page
0003h
16-word
page
4Ch
4Dh
98h
9Ah
02 = 8-word page, 03 = 16-word page
VPPH supply minimum Program/Erase voltage
00B5h bit 7 to 4 HEX value in volts
11.5 V
12.5 V
bit 3 to 0 BCD value in 100 mV
VPPH supply maximum Program/Erase voltage
4Eh
9Ch
00C5h bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100 mV
Uniform +
VPP/WP#
protecting
highest or
lowest
Top/bottom boot block flag
00xxh xx = 04h: Uniform device, HW protection for lowest block
xx = 05h: Uniform device, HW protection for highest block
4Fh
50h
9Eh
A0h
block
0001h Program suspend, 00 = not supported, 01 = supported
Supported
1. The values given in the above table are valid for both packages.
208045-07
113
Extended Memory Block
Numonyx™ Axcell™ M29EW
Appendix C Extended Memory Block
The M29EW has an extra block, the Extended Memory Block, that can be accessed using a
dedicated command. This Extended Memory Block is 128words in x16 mode and 256bytes
in x8 mode. It is used as a security block (to provide a permanent security identification
number) or to store additional information.
The device can be shipped either with the Extended Memory Block pre-locked by Numonyx,
or unlocked.
If the Extended Memory Block is not pre-locked by Numonyx, it can be customer-lockable.
Its status is indicated by bit DQ7 of Extended Memory Block Verify Indicator. This bit is
permanently set to either ‘1’ or ‘0’ at the Numonyx factory and cannot be changed. When set
to ‘1’, it indicates that the device is pre-locked by Numonyx and the Extended Memory Block
is protected. When set to ‘0’, it indicates that the device is customer-lockable. Bit DQ7 being
permanently locked to either ‘1’ or ‘0’ is another security feature which ensures that a
customer-lockable device cannot be used instead of a Numonyx pre-locked one.
Bit DQ7 is the most significant bit in the Extended Memory Block Verify Indicator. It can be
read in Auto Select mode using either the Programmer (see Table 7 and Table 8) or the In-
system method (see Table 9 and Table 10).
The Extended Memory Block can only be accessed when the device is in Extended Memory
Block mode. For details of how the Extended Memory Block mode is entered and exited,
refer to the Section 6.3.1: Enter Extended Memory Block command and Section 6.3.2: Exit
Extended Memory Block command, and to Table 13 and Table 9.
C.1
Numonyx pre-locked Extended Memory Block
If devices of which the Extended Memory Block is pre-locked upon customer request, the
128bits security identification number is written to the Extended Memory Block address
space (see Table 39: Extended Memory Block address and data) in Numonyx factory. The
contents in the Extended Memory Block cannot be changed any more.
114
208045-07
Numonyx™ Axcell™ M29EW
Extended Memory Block
C.2
Customer-lockable Extended Memory Block
A device where the Extended Memory Block is customer-lockable is delivered with the DQ7
bit set to ‘0’ and the Extended Memory Block unprotected. It is up to the customer to
program and protect the Extended Memory Block but care must be taken because the
protection of the Extended Memory Block is not reversible.
If the device has not been shipped with the Extended Memory Block pre-protected, the
block can be protected by setting the Extended Memory Block Protection bit, DQ0, to ‘0’.
However, this bit can only be programmed once; and once it is protected the Extended
Memory Block cannot be unprotected.
Once the Extended Memory Block is programmed, the Exit Extended Memory Block
command must be issued to exit the Extended Memory Block mode and return the device to
Read mode.
Table 39. Extended Memory Block address and data
Address(1)
Data
x8
x16
Numonyx pre-locked
Customer-lockable
Secure identification
Secure identification
number
000000h-00000Fh
000000h-000007h
number
Determined by
customers
Protected and
unavailable
Determined by
customers
000010h-0000FFh
000008h-00007Fh
1.
208045-07
115
Revision History
Numonyx™ Axcell™ M29EW
Appendix D Revision History
Table 40. Document revision history
Date
Version
Changes
May 2008
01
Initial release
Update tAVAV values in Table 24 and Table 25
Move buffer program flow chart to Chapter 6.2.1, as Figure 7
Minor wording changes
Oct 2008
02
Apply AxcellTM as M29EW’s branding name
Change the names of timing parameters in Table 20, Table 26 and Table 27
Modify many waveforms to align the signal names
Some wording changes
Spec change of tEHEL2 from 20ns to 30ns, in Table 27
Remove “Numonyx Confidential“
Dec 2008
03
Remove conventions section and set Revision History as Appendix D
Update physical dimension information in Table 29
Add Document Number
Add 1-Gbit and 512-Mbit information into the data sheet
Correct some typo error
Correct the buffer write cycle numbers and wording correction in Table 11
and Table 12
Fix a text corruption in Figure 7
Remove invalid ship options in Chapter 5.1
Add Figure 6 to explain the buffer programming
Mar 2009
04
Add buffer write misalignment description to better explain buffer
programming usage in Chapter 6.2.1
Move the disclaimer to the end of the data sheet
Add 10Kohm pull-up resistor description for RY/BY# pin
Update Fortified BGA physical dimension of ball size Table 30
Remove notes about Enhanced Buffer Programming in Chapter 6.2.2
Change VPPH spec in Table 18 and Table 19
Apr 2009
05
Change the address for VPB read in Table 13 and Table 14
Correct the DQ2 toggling states in Table 17
Add technology information in cover page and Chapter 1
Add RoHS and Halogen Free information in cover page
Add block address information in Chapter Appendix A
Jun 2009
Oct 2009
06
07
Move programming and erase performance as separate chapter in
Chapter 10
Add leaded, RoHS, halogen free information in Chapter 12
Add 2-Gbit (1-Gbit/1-Gbit) stack device related information
116
208045-07
Numonyx™ Axcell™ M29EW
Please Read Carefully:
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR
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