N567H121 [NUVOTON]
ARM® Cortex®-M 32-bit MicrocontrollerTable of Contents;
| 型号： | N567H121 |
| 厂家： | 
NUVOTON |
| 描述： | ARM® Cortex®-M 32-bit MicrocontrollerTable of Contents 微控制器 |
| 文件： | 总15页 (文件大小：639K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
N567HXXX
ARM® Cortex® -M
32-bit MicrocontrollerTable of Contents
1.
2.
3.
4.
5.
6.
7.
GENERAL DESCRIPTION.......................................................................................................... 2
FEATURES ................................................................................................................................. 3
FAMILY OVERVIEW ................................................................................................................... 5
PIN DESCRIPTION..................................................................................................................... 7
ITEM VS PIN TABLE................................................................................................................... 8
BLOCK DIAGRAM ...................................................................................................................... 9
ELECTRICAL CHARACTERISTICS......................................................................................... 10
7.1 Absolute Maximum Ratings............................................................................................. 10
7.2 D.C. Characteristics......................................................................................................... 10
7.3 A.C. Characteristics ......................................................................................................... 11
8.
9.
TYPICAL APPLICATION CIRCUITS......................................................................................... 12
REVISION HISTORY ................................................................................................................ 14
Publication Release Date: Feb. 2014
- 1 -
Revision A12
N567HXXX
1. GENERAL DESCRIPTION
The N567Hxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis
applications. With the help of the embedded 8-bit microprocessor & dedicated H/W, the N567Hxxx can
synthesize 8-channel speech+melody simultaneously.
The two channels of synthesized speech can be in different kinds of format, for example ADPCM
and MDPCM. The N567Hxxx can provide 8-channel high-quality wavetable melody, which can emulate
the characteristics of musical instruments, such as piano and violin. More colorful melody effects are
implemented in N567Hxxx series, such as modulation, vibrato, and pitch-bending etc. The output of
speech/melody channels are mixed together through the on-chip digital mixer to produce colorful
effects. With these hardware resources, the N567Hxxx is very suitable for high-quality and
sophisticated scenario applications.
The N567Hxxx provides at most 32 I/O pins, 384 bytes RAM , IR carrier, Serial Interface
Management (SIM), and more sophisticated applications, such as interactive toys, cartridge toys and
final count down function. 3-pair LED output pins with 64-level control means that numerous
combination of RGB colors may result in a versatility of colorful effects. In addition, N567Hxxx also
provides PWM mode audio output to save power during playback and Watch Dog Timer to prevent
latch-up situation occurring.
The N567Hxxx family contains several items with different playback duration as shown below:
(@4-bit NM4 algorithm, 6 KHz sampling rate)
Item
*Duration
Item
N567H030
34 sec.
N567H041
44 sec.
N567H080
84 sec.
N567H120
N567H160
N567H200
124 sec.
158 sec.
192 sec.
N567H240
233 sec.
N567H280
272 sec.
N567H330
311 sec.
**N567H121 **N567H161 **N567H201
124 sec. 158 sec. 192 sec.
*Duration
Note: *: The duration time is based on 4-bit NM4 at 6 KHz sampling rate. The firmware library and timber library have
been excluded from user’s ROM space for the duration estimation.
Note: **: N567H121/161/201 are modified from N567H120/160/200 respectively to consist with OTP’s pad sequence.
Publication Release Date: Feb. 2014
- 2 -
Revision A12
N567HXXX
2. FEATURES
Wide range of operating voltage:
8 MHz @ 3.0 volt ~ 5.5 volt
6 MHz @ 2.4 volt ~ 5.5 volt
● Oscillator
Trim function -Build in Rosc and system clock setting: 4MHz, 6MHz or 8MHz by Mask
Option
X’tal oscillator –Only in N567H240/280/330/041/030 by Mask Option
Add external Crystal 8MHz~16MHz for system clock 4M~8MHz
Power management:
4 ~ 8 MHz system clocks, with Ring type or crystal type.
Stop mode for stopping all IC operations
Status changes of the IP0 and BP0~BP2 pins can wake up the chip
Provides up to 8 inputs and 24 I/O pins
N567H030~201: 24I/O
N567H240~330: 8I + 24I/O
Audio output : 1 speaker outputs, mono effect available
DAC : maximum output is 3mA/5mA , (10+3)-bit without Noise Shaping to drive speaker
output.
PWM: direct drive 12 bit with Noise Shaping to save power consumption.
F/W speech synthesis:
Multiple format parser that supports
New 4-bit MDPCM(NM4), 5-bit MDPCM(MDM), 4-bit MDPCM(MD4), 4-bit
ADPCM(APM), 8-bit Log PCM(LP8) algorithm can be used
Pitch shippable ADPCM for voice changer application
Dual-sample rate voice synthesis
F/W Melody synthesis:
6 melody channels that can emulate characteristics of musical instruments
Multi-MIDI files simultaneous
Multi-MIDI channels dynamic control
More MIDI events are supported for colorful melody playback, such as modulation wheel,
pitch-bending, pedal, pitch-shift, and vibrato…etc.
Speech and melody can be playing at the same time
2 channels speech + 6 channels wavetable melody
1 channel speech + 7 channels wavetable melody
8 channels wavetable melody
Built-in IR carrier generation circuit for simplifying firmware IR application
Built-in TimerG1 for general purpose applications
Harmonized synchronization among MIDI, Speech, LED, and Motor
Build-in 3-pair LED outputs with 64-level control of brightness in N567H240~330
BP00/02/04 are defined as 3 H/W PWM I/O pins. They can be paired with BP01/03/05
respectively by same (or opposite) phase of output waveform
Publication Release Date: Feb. 2014
- 3 -
Revision A12
N567HXXX
Built-in Watch-Dog Timer (WDT) and Low Voltage Reset (LVR) by mask option
Provide Serial Interface Management (SIM) to access the external memory in N567H030~080 and
N567H240~330
W55F, W551C
SPI flash/ROM
Support PowerScriptTM for developing codes in easy way
Full-fledged development system
Source-level ICE debugger (Assembly & PowerScriptTM format)
Ultra I/OTM tool for event synchronization mechanism
ICE system with USB port
User-friendly GUI environment
Available package form:
COB is essential
Publication Release Date: Feb. 2014
Revision A12
- 4 -
N567HXXX
3. FAMILY OVERVIEW
The characteristics of N567Hxxx series are depicted in Table 1.
Part
N567H120,
/N567H121
N567H160
/N567H161
N567H030
N567H041
N567H080
Number
ROM (Byte)
RAM (Byte)
Duration1
System Clock
In : Bid2
126K
384
158K
384
286K
384
416K
384
528K
384
34 sec
TRIM/X’tal
0 : 24
44 sec
TRIM/X’tal
0 : 24
84 sec
TRIM
0 : 24
124 sec
TRIM
0 : 24
158 sec
TRIM
0 : 24
DAC
PWM
DAC
PWM
DAC
PWM
DAC
PWM
DAC
PWM
Audio Output
Speaker
1
8
1
8
1
8
1
8
1
8
Mixer Input
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
Synthesis
Algorithm
IR-Carrier (Tx)
64-Level Output
X
X
X
X
X
Watch Dog
Timer (WDT)
X
X
Low Voltage
Reset (LVR)
SIM for SPI
Flash Interface
Stop mode
PowerScript
1
The F/W library & program code are excluded from the ROM space for the duration estimate, which is based on 6-KHz
sample rate & 4-bit NM4 algorithm.
2
"In" is the number of input pins; "Bid" is the number of Bi-directional pins.
Publication Release Date: Feb. 2014
- 5 -
Revision A12
N567HXXX
Part
N567H200
/N567H201
N567H240
N567H280
N567H330
Number
ROM (Byte)
RAM (Byte)
Duration
638K
384
768K
384
896K
384
1022K
384
192 sec
TRIM
0 :24
233 sec
TRIM/X’tal
8 : 24
272 sec
TRIM/X’tal
8 : 24
311 sec
TRIM/X’tal
8 : 24
System Clock
In : Bid
DAC
PWM
DAC
PWM
DAC
PWM
DAC
PWM
Audio Output
Speaker
1
8
1
8
1
8
1
8
Mixer Input
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
MDPCM
ADPCM
PCM
Synthesis Algorithm
IR-Carrier (Tx)
64-Level Output
X
*3-Pair
*3-Pair
*3-Pair
Watch Dog Timer
(WDT)
X
X
Low Voltage Reset
(LVR)
SIM for
W55F/W551C
SIM for SPI Flash
Interface
Stop mode
PowerScript
Note *:BP00/02/04 are defined as 3 H/W PWM I/O pins. They can be paired with BP01/03/05 respectively by same (or
opposite) phase of output waveform
Table 1: N567Hxxx family selection guide
Publication Release Date: Feb. 2014
- 6 -
Revision A12
N567HXXX
4. PIN DESCRIPTION
PIN NAME
/RESET
I/O
In
I
FUNCTION
IC reset input with an internal pull-up resistor, low active.
OSCIN
Main-clock oscillation input for X’tal mode. Build-in ROSC by mask option.
Main-clock oscillation output for X’tal.
OSCOUT
O
General input port with pull-high selection. Each input pin can be
programmed to generate interrupt request and used to release IC from
STOP mode. It is provided in N567H240~330 only.
IP00~IP07
In
General input/output pins. When used as output pin, it can be open–drain
or CMOS type and it can sink 25mA for high-current applications. When
used as input pin, there may have a pull-high option and generate interrupt
request to release IC from STOP mode.
When BP07 is used as output pin, it can be the IR transmission carrier for
IR applications.
BP00~BP07
I/O
Only for N567H240/280/330. BP00/02/04 can be set as 3-pin H/W PWM
output with 64-level resolution. They can be paired with BP01/03/05 (also
H/W PWM output) respectively with same or opposite phase of output
waveform.
General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
BP10~BP17
BP20~BP27
I/O
I/O
When serial interface management (SIM) is enabled, and set memory type
as W55F/W551C, BP10~12 are used to be an interface with the external
memory, W55Fxx or W551Cxxx. If set memory to SPI flash, BP10~13 are
used to be an interface.
General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high option
and generate interrupt request to release IC from STOP mode.
PWM+/DAC
PWM-
O
O
PWM driver positive output or Current type DAC output
PWM driver negative output
VDD
Power Positive power supply for uP and peripherals.
Power Negative power supply for uP and peripherals.
Power Positive power supply for speaker driver.
VSS
VDD_SPK
VSS_SPK
Power Negative power supply for speaker driver.
Positive power supply for serial interface Management (SIM) BP10~13
VDD_SIM
Power
Only providing in N567H240~N567H330. For non-SIM application, it
should be connect to VDD to keep normal standby current.
Positive power supply for oscillator. Only providing in
N567H240~N567H330. It must be connected to VDD.
VDD_OSC
VSS_OSC
Power
Power
Negative power supply for oscillator. Only providing in
N567H240~N567H330. This pad must be connected to VSS.
Publication Release Date: Feb. 2014
- 7 -
Revision A12
N567HXXX
5. ITEM VS PIN TABLE
PIN name
H030/041
H080
H120/160/200 H240/280/330
H121/161/201
Comment
BP00~07
BP10~17
BP20~27
IP00~07
/RESET
PWM+/DAC
PWM-
V
V
V
-
V
V
V
-
V
V
V
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
-
V
V
V
V
-
V
V
V
V
-
OSCIN
OSCOUT
VDD
Crystal mode
V
V
V
V
-
V
V
V
V
-
VSS
VDD_SPK
VSS_SPK
VDD_SIM
Support speaker power
Support BP10~13 SIM
interface power
VDD_OSC
VSS_OSC
-
-
-
-
-
-
V
V
Support OSCIN/OUT
power
Publication Release Date: Feb. 2014
Revision A12
- 8 -
N567HXXX
6. BLOCK DIAGRAM
Publication Release Date: Feb. 2014
Revision A12
- 9 -
N567HXXX
7. ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
PARAMETER
Supply Voltage to Ground Potential
D.C. Voltage on Any Pin to Ground Potential
Operating Temperature
RATING
-0.3 to +7.0
-0.3 to VDD +0.3
0 to +70
UNIT
V
V
C
C
Storage Temperature
-55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
7.2 D.C. Characteristics
(VDDVSS = 4.5 V, FM = 8 MHz, Ta = 25C, No Load unless otherwise specified)
SPEC.
PARAMETER
SYM.
TEST CONDITIONS
FSYS = 6 MHz
UNIT
Min.
2.4
Typ.
Max.
5.5
-
-
V
V
Operating Voltage
Operating Current
VDD
IOP
FSYS = 8 MHz
3.0
5.5
FSYS = 8MHz, normal
operation
-
8
12
mA
Standby Current
Input Low Voltage
Input High Voltage
Input Current
I/O pins
ISB
VIL
VIH
IIN1
STOP mode
All input pins
All input pins
-
VSS
1
-
2
0.3 VDD
VDD
A
V
0.7 VDD
-5
-
V
VIN = 0V, pulled-high
resistor = 500k ohm
-9
-14
A
Input Current
I/O pins
IIN2
VIN = 0V, pulled-high
resistor = 150k ohm
-15
-30
-45
A
IOL
IOH
IOL
IOH
IOL
IOH
IOL
IOH
VDD = 3V, VOUT = 0.4V
VDD = 3V, VOUT = 2.6V
VDD = 4.5V, VOUT = 1.0V
VDD = 4.5V, VOUT = 3.5V
VDD = 3V, VOUT = 0.4V
VDD = 3V, VOUT = 2.6V
VDD = 4.5V, VOUT = 1.0V
VDD = 4.5V, VOUT = 3.5V
8
-4
12
-8
-
-
-
-
-
mA
mA
mA
mA
mA
mA
mA
mA
Output Current
(BP0)
-
35
-20
6
-
4
-4
-8
Output Current
(BP1, BP2)
-
15
-20
-3.0
-5.0
-
-
-
-
-3.6
-6.0
-
-2.4
-4.0
+200
-200
DAC Full Scale Current
IDAC
mA
VDD
=
4.5V, RL = 100
IOL1
mA
mA
Output Current
PWM+ / PWM-
RL= 8 Ohm,
[PWM+]---[RL]---[PWM-]
-
-
IOH1
Publication Release Date: Feb. 2014
Revision A12
- 10 -
N567HXXX
7.3 A.C. Characteristics
(VDD-VSS = 4.5 V, FM = 8 MHz, Ta = 25C; No Load unless otherwise specified)
SPEC.
Typ.
PARAMETER
SYM.
TEST CONDITIONS
UNIT
Max.
Min.
ROSC build-in, @3.0~5.5V
ROSC build-in, @3.0~5.5V
ROSC build-in, @3.0~5.5V
ROSC build-in, @2.4~3.6V
ROSC build-in, @2.4~3.6V
3973
4096
6144
8192
4096
6144
4218
Main-Clock
FM
KHz
5959
7946
3973
5959
6328
8437
4218
6328
Main-Clock
FM
KHz
mS
Main-Clock Wake-up
Stable Time
TWSM
2^16 clock cycle
8
16
Publication Release Date: Feb. 2014
Revision A12
- 11 -
N567HXXX
8. TYPICAL APPLICATION CIRCUITS
(a) Trim Ring oscillator application
Notes:
1. Rosc is built in N567H chip internally. User needn’t connect Rosc resistor to OSCIN pin.
2. The C1 value is suggested 4.7uF for audio PWM output or 0.1uF for DAC output.
3. The Rs value is suggested in 270 ~ 1K to limit too large DAC output current flowing into transistor.
4. The VDD_OSC pad must be connected to VDD. To add a 0.1uF capacitor to VSS is optional to improve oscillator
stability.
5. The VDD_SIM pad must be connected to VDD for non-SIM application.
6. The above application circuits are for reference only. No warranty for mass production.
Publication Release Date: Feb. 2014
- 12 -
Revision A12
N567HXXX
(b) Crystal application
Notes:
1. The crystal value must be double of system clock. If System clock is 6MHz, please select 12MHz crystal device.
The crystal should be placed close to IC, and the location is as near as possible.
2. The value of Cp1 and Cp2 are depended on PCB layout and crystal type suggested 15~30pF or skip.
3. The C1 value is suggested 4.7uF in audio PWM output and 0.1uF in DAC output.
4. The VDD_OSC pad must be connected to VDD.
5. The VDD_SIM pad must be connected to VDD if without SIM application.
6. The above application circuits are for reference only. No warranty for mass production.
7. Other application circuits please refer to Design Guide.
Publication Release Date: Feb. 2014
- 13 -
Revision A12
N567HXXX
(c) PCB layout guide
1. The IC substrate should be connected to VSS in PCB layout. But VSS_SPK can’t connect
with IC substrate directly. Both VSS and VSS_SPK tie together in battery negative power.
2. Each VDD, VDD_OSC, VDD_SIM and VDD_SPK pad must connect to positive power to
support stable voltage for individual function work successfully. (Don’t let them floating)
9. REVISION HISTORY
VERSION
DATE
REASONS FOR CHANGE
PAGE
A0
June 2009
Preliminary release.
SIM is provided in N567H040~080.
A1
July 2009
PWM speaker output is provided in N567H040~080.
Add VDDOSC and VSSOSC in the pin description
Remove TEST pad in the pin description
Modify N567H240~330 application circuit
Modify Frequency deviation in 5.3 A.C. Characteristics.
A2
Aug. 2009
A3
A4
A5
A6
Aug. 2009
Sep. 2009
Oct. 2009
Nov. 2009
Modify Main Clock and Frequency deviation condition in 5.3 A.C.
Characteristics.
Remove LVD function in 2 Features
Revise frequency deviation value of 2.4~3.6V in section 5.3 A.C.
Characteristics.
11
5
Remove N567H240~330 SPIO function except N567H000 ICE chip
VDD_SPIO/VSS_SPIO and VDD_SIM/VSS_SIM pins must be connect to
VDD /VSS to keep normal standby current.
Update output current for BP1/2 @4.5V/3.0V and update BP0 @4.5V
A7
Feb. 2011
7
9
Update 4.7uF is optional as power stability on DAC application on
application circuit
Update 4.7uF is necessary as power stability on PWM application on
application circuit
10
5~6
13
Add N567Hxx chip family overview
Add SIM SPI Flash application circuit for N567H040~080
Update Application Circuit and note description
Add power circuit in PCB layout
11~18
18
A8
A9
Apr. 2011
Sep. 2011
N567H240~330 modify VDD_SPI pad to VDD2 which must be connected to
VDD.(please refer bonding pad diagram rev. A1)
7
11~15
Modify OSCIN application circuits, for DAC output no connected, PWM
output add a 200pF capacitor to VDD to improve voice quality optional.
Add new 4-bit MDPCM (NM4) speech synthesis algorithm
3
Publication Release Date: Feb. 2014
- 14 -
Revision A12
N567HXXX
Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all
types of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay
claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the
damages and liabilities thus incurred by Nuvoton.
Publication Release Date: Feb. 2014
- 15 -
Revision A12
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