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74ABT02DB,112 [NXP]

74ABT02DB;
74ABT02DB,112
型号： 74ABT02DB,112
厂家： NXP    NXP
描述：

74ABT02DB

栅 信息通信管理 光电二极管 逻辑集成电路 触发器
文件： 总10页 (文件大小：100K)
中文：  中文翻译
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INTEGRATED CIRCUITS  
74ABT02  
Quad 2-input NOR gate  
Product specification  
IC24 Data Handbook  
1995 Sep 18  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
QUICK REFERENCE DATA  
LOGIC DIAGRAM  
CONDITIONS  
2
3
A0  
1
4
T
= 25°C;  
GND = 0V  
SYMBOL PARAMETER  
TYPICAL UNIT  
Y0  
amb  
B0  
5
6
A1  
B1  
Y1  
Y2  
Y3  
Propagation  
delay  
An or Bn  
to Yn  
t
t
2.4  
ns  
PLH  
PHL  
8
9
A2  
B2  
10  
13  
1.8  
C = 50pF;  
L
V
CC  
= 5V  
11  
12  
A3  
B3  
V
= Pin 14  
t
t
Output to  
Output skew  
CC  
OSLH  
OSHL  
0.4  
3
ns  
pF  
µA  
GND = Pin 7  
SA00335  
Input  
capacitance  
C
V = 0V or V  
I CC  
IN  
PIN DESCRIPTION  
Total supply  
current  
Outputs disabled;  
= 5.5V  
PIN  
I
50  
CC  
SYMBOL  
NUMBER  
NAME AND FUNCTION  
V
CC  
2, 3, 5, 6, 8,  
An-Bn  
Data inputs  
9, 11, 12  
PIN CONFIGURATION  
1, 4, 10, 13  
Yn  
Data outputs  
Y0  
A0  
B0  
Y1  
A1  
1
2
3
4
5
14  
V
CC  
7
GND  
Ground (0V)  
13 Y3  
12 B3  
11 A3  
10 Y2  
14  
V
CC  
Positive supply voltage  
LOGIC SYMBOL (IEEE/IEC)  
1
2
3
B1  
6
7
9
8
B2  
A2  
1
4
GND  
SA00337  
5
6
LOGIC SYMBOL  
8
9
2
3
5
6
8
9
11 12  
10  
A0 B0 A1 A2 B1 B2 A3 B3  
11  
12  
13  
Y0 Y1 Y2 Y3  
SF00010  
FUNCTION TABLE  
1
4
10 13  
V
= Pin 14  
CC  
GND = Pin 7  
INPUTS  
OUTPUT  
SA00362  
An  
L
Bn  
Yn  
H
L
L
H
L
L
H
H
L
H
L
NOTES:  
H
L
= High voltage level  
= Low voltage level  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT02 N  
DWG NUMBER  
14-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT02 N  
74ABT02 D  
74ABT02 DB  
74ABT02 PW  
SOT27-1  
SOT108-1  
SOT337-1  
SOT402-1  
14-Pin plastic SO  
74ABT02 D  
14-Pin Plastic SSOP Type II  
14-Pin Plastic TSSOP Type I  
74ABT02 DB  
74ABT02PW DH  
2
1995 Sep 18  
853-1808 15754  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +7.0  
–18  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
40  
OUT  
OUT  
I
DC output current  
mA  
°C  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
0
MAX  
V
CC  
DC supply voltage  
5.5  
V
V
V
I
Input voltage  
V
CC  
V
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–15  
20  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
∆t/∆v  
0
5
T
amb  
Operating free-air temperature range  
–40  
+85  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
MIN  
TYP  
MAX  
MIN  
MAX  
V
Input clamp voltage  
V
V
V
V
V
V
V
V
V
= 4.5V; I = –18mA  
–0.9  
2.9  
–1.2  
–1.2  
V
V
IK  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
IK  
V
OH  
High-level output voltage  
Low-level output voltage  
Input leakage current  
= 4.5V; I = –15mA; V = V or V  
2.5  
2.5  
OH  
I
IL  
IH  
V
OL  
= 4.5V; I = 20mA; V = V or V  
IH  
0.35  
±0.01  
±5.0  
5.0  
0.5  
±1.0  
±100  
50  
0.5  
±1.0  
±100  
50  
V
OL  
I
IL  
I
= 5.5V; V = GND or 5.5V  
µA  
µA  
µA  
mA  
µA  
I
I
I
Power-off leakage current  
Output High leakage current  
= 0.0V; V or V ≤ 4.5V  
O I  
OFF  
CEX  
I
= 5.5V; V = 5.5V; V = GND or V  
O I CC  
1
I
O
Output current  
= 5.5V; V = 2.5V  
–50  
–75  
2
–180  
50  
–50  
–180  
50  
O
I
Quiescent supply current  
= 5.5V; V = GND or V  
I CC  
CC  
Additional supply current per  
= 5.5V; One data input at 3.4V, other  
∆I  
CC  
0.25  
500  
500  
µA  
2
input pin  
inputs at V or GND  
CC  
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
AC CHARACTERISTICS  
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
T
V
= +25°C  
= +5.0V  
T
= –40°C to +85°C  
amb  
CC  
amb  
V
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V ±0.5V  
CC  
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
An or Bn to Yn  
1.0  
1.0  
2.4  
1.8  
3.7  
2.8  
1.0  
1.0  
4.4  
3.4  
PLH  
PHL  
1
2
ns  
ns  
t
t
Output to Output skew  
An or Bn to Yn  
0.4  
0.4  
0.5  
0.5  
0.5  
0.5  
OSHL  
OSLH  
1
NOTE:  
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same  
device. The specification applies to any outputs switching in the the same direction, either HIGH-to-LOW (t  
parameter guaranteed by design.  
) or LOW-to-HIGH (t  
);  
OSHL  
OSLH  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
An, Bn  
V
INPUT  
V
M
M
t
t
PHL  
PLH  
OUTPUT  
t
PHL  
MIN  
V
V
M
M
Yn  
t
PLH  
MIN  
OUTPUT N  
same part  
SA00336  
Waveform 1. Propagation delay for inverting outputs  
t
t
PHL  
PLH  
MAX  
MAX  
t
t
OSHL  
OSLH  
SA00381  
Waveform 2. Common edge skew  
TEST CIRCUIT AND WAVEFORMS  
t
AMP (V)  
W
90%  
90%  
V
CC  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
0V  
V
V
OUT  
IN  
t
t
(t  
(t  
)
t
TLH  
(t  
)
R
PULSE  
GENERATOR  
THL  
F
D.U.T.  
)
t
(t  
)
F
R
TLH  
R
THL  
L
R
C
T
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
10%  
10%  
Test Circuit for Outputs  
t
0V  
W
V
M
= 1.5V  
Input Pulse Definition  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
INPUT PULSE REQUIREMENTS  
C = Load capacitance includes jig and probe capacitance;  
FAMILY  
L
Amplitude  
3.0V  
Rep. Rate  
1MHz  
t
t
t
see AC CHARACTERISTICS for value.  
W
R
F
R = Termination resistance should be equal to Z  
of  
OUT  
T
pulse generators.  
500ns 2.5ns  
2.5ns  
74ABT  
SH00067  
4
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
DIP14: plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
5
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
6
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm  
SOT337-1  
7
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
8
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
NOTES  
9
1995 Sep 18  
Philips Semiconductors  
Product specification  
Quad 2-input NOR gate  
74ABT02  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
Preproduction Product  
Full Production  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips Semiconductors and Philips Electronics North America Corporation  
register eligible circuits under the Semiconductor Chip Protection Act.  
Copyright Philips Electronics North America Corporation 1995  
All rights reserved. Printed in U.S.A.  
(print code)  
Date of release: July 1994  
9397-750-04853  
Document order number:  

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