74ABT16652DL [NXP]
16-bit transceiver/register, non-inverting 3-State; 16位收发器/寄存器，非反相三态
| 型号： | 74ABT16652DL |
| 厂家： | 
NXP |
| 描述： | 16-bit transceiver/register, non-inverting 3-State |
| 文件： | 总12页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting
(3-State)
Product specification
1998 Feb 27
Supersedes data of 1995 Aug 17
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
FEATURES
• Independent registers for A and B buses
DESCRIPTION
The 74ABT16652 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
• Multiple V
and GND pins minimize switching noise
CC
• Power-up 3-State
The 74ABT16652 transceiver/register consists of two sets of bus
transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or the internal registers. Data on the A or
B bus will be clocked into the registers as the appropriate clock pin
goes HIGH. Output Enable (nOEAB, (nOEBA) and Select (nSAB,
nSBA) pins are provided for bus management.
• 74ABTH16652 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
• Power-up reset
• Live insertion/extraction permitted
• Multiplexed real-time and stored data
• Output capability: +64mA/–32mA
• Latch-up protection exceeds 500mA per JEDEC Std 17
Two options are available, 74ABT16652 which does not have the
bus-hold feature and 74ABTH16652 which incorporates the
bus-hold feature.
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
2.3
1.8
PLH
PHL
Propagation delay nAx to nBx
C = 50pF; V = 5V
ns
L
CC
C
Input capacitance
I/O capacitance
V = 0V or V
CC
4
7
pF
pF
IN
I
C
V = 0V or V ; 3-State
O CC
I/O
I
Outputs disabled; V =5.5V
500
8
µA
mA
CCZ
CC
Quiescent supply current
I
Outputs low; V = 5.5V
CCL
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
SOT371-1
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT16652 DL
74ABT16652 DGG
74ABTH16652 DL
74ABTH16652 DGG
BT16652 DL
BT16652 DGG
BH16652 DL
SOT364-1
SOT371-1
BH16652 DGG
SOT364-1
LOGIC SYMBOL
28 29
1
56
14
13
12
10
9
1A7
1A6
1A5
1A4
1A3
1A2
1A1
1A0
1B7
1B6
1B5
1B4
1B3
1B2
1B1
1B0
43
44
45
47
48
49
51
52
24
23
21
20
19
17
16
15
2A7
2A6
2A5
2A4
2A3
2A2
2A1
2A0
2B7
2B6
2B5
2B4
2B3
2B2
2B1
2B0
33
34
36
37
38
40
41
42
8
6
5
2
3
54 55
27 26 31 30
SH00047
2
1998 Feb 27
853-1790 19026
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
1OEAB
1CPAB
1SAB
GND
1
2
3
4
5
6
7
8
9
56 1OEBA
55 1CPBA
54 1SBA
53 GND
52 1B0
56
1
1OEBA
1OEAB
1CPBA
1SBA
EN1 [BA]
EN2 [AB]
C3
55
54
2
G4
1A0
1CPAB
1SAB
C5
G6
3
1A1
51 1B1
29
28
30
31
27
26
2OEBA
2OEAB
2CPBA
2SBA
EN7 [BA]
EN8 [AB]
C9
50
V
V
CC
CC
1A2
1A3
49 1B2
48 1B3
47 1B4
46 GND
45 1B5
44 1B6
43 1B7
42 2B0
41 2B1
40 2B2
39 GND
38 2B3
37 2B4
36 2B5
G10
1A4 10
GND 11
1A5 12
1A6 13
1A7 14
2A0 15
2A1 16
2A2 17
GND 18
2A3 19
2A4 20
2A5 21
2CPAB
2SAB
C11
G12
52
w1
1B0
4
4
3D
5
1AO
1
1
w1
5D
6
6
2
1
6
8
51
49
48
47
45
44
43
42
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
9
10
12
13
14
22
35
V
V
CC
CC
2A6 23
2A7 24
34 2B6
33 2B7
w1
10
10
9D
15
2A0
7
GND 25
2SAB 26
2CPAB 27
20EAB 28
32 GND
31 2SBA
30 2CPBA
29 2OEBA
1
w1
11D 12
12
8
1
16
17
19
41
40
38
2A1
2A2
2A3
2B1
2B2
2B3
SH00046
20
21
37
36
2A4
2A5
2B4
2B5
23
24
34
33
2A6
2A7
2B6
2B7
SH00045
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
2, 55, 27, 30
3, 54, 26, 31
1CPAB, 1CPBA, 2CPAB, 2CPBA
1SAB, 1SBA, 2SAB, 2SBA
Clock input A to B / Clock input B to A
Select input A to B / Select input B to A
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
1A0 – 1A7,
2A0 – 2A7
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable inputs
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
1B0 – 1B7,
2B0 – 2B7
1OEAB, 1OEBA,
2OEAB, 2OEBA
1, 56, 28, 29
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
GND
Ground (0V)
V
CC
Positive supply voltage
3
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
LOGIC DIAGRAM
nOEBA
nOEAB
nCPBA
nSBA
nCPAB
nSAB
1of 8 Channels
1D
C1
Q
nA0
nB0
1D
C1
Q
nA1
nA2
nA3
nB1
nB2
nB3
nB4
nB5
nB6
nB7
nA4
nA5
nA6
nA7
DETAIL A X 7
SH00065
FUNCTION TABLE
INPUTS
nCPAB
DATA I/O
OPERATING MODE
nSB
A
nOEAB
nOEBA
nCPBA nSAB
nAx
Input
Input
nBx
L
L
H
H
H or L
↑
H or L
↑
X
X
X
X
Isolation
Store A and B data
Input
X
H
H
H
↑
↑
H or L
↑
X
**
X
X
Unspecified
output*
Store A, Hold B
Store A in both registers
L
L
X
L
H or L
↑
↑
↑
X
X
X
**
Unspecified
output*
Hold A, Store B
Store B in both registers
Input
Input
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus
Stored B data to A bus
Output
Input
H or L
H
H
H
H
X
X
X
L
H
X
X
Real time A data to B bus
Store A data to B bus
Output
Output
H or L
Stored A data to B bus
Stored B data to A bus
H
L
H or L
H or L
H
H
Output
H = High voltage level
L
X
↑
*
=
=
=
Low voltage level
Don’t care
Low-to-High clock transition
The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must
be staggered in order to load both registers.
**
4
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ABT16652.The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
A
B
A
B
A
B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
L
L
X
X
X
L
H
H
X
X
L
X
X
L
L
H
X
H
↑
X
↑
X
↑
X
X
X
X
X
X
↑
TRANSFER STORED DATA
TO A OR B
A
B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA
H | L H | L
H
L
H
H
SH00066
5
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
V
CC
I
IK
–0.5 to +7.0
–18
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
output in Off or HIGH state
output in LOW state
–0.5 to +5.5
128
I
DC output current
mA
OUT
output in HIGH state
–64
T
stg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
0
MAX
V
CC
DC supply voltage
5.5
V
V
V
I
Input voltage
V
CC
V
High-level input voltage
Low-level Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
6
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
DC ELECTRICAL CHARACTERISTICS
LIMITS
= +25°C
T
= –40°C
to +85°C
amb
T
amb
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
MAX
V
Input clamp voltage
V
= 4.5V; I = –18mA
–0.9
2.9
–1.2
–1.2
V
V
V
V
V
IK
CC
IK
V
V
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
CC
OH
I
IL
IH
IH
V
OH
High-level output voltage
= 5.0V; I = –3mA; V = V or V
4.0
CC
OH
I
IL
V
CC
= 4.5V; I = –32mA; V = V or V
IH
2.4
OH
I
IL
V
OL
Low-level output voltage
Power-up output low
V
= 4.5V; I = 64mA; V = V or V
IH
0.35
0.55
0.55
0.55
0.55
CC
OL
I
IL
V
RST
V
CC
= 5.5V; I = 1mA; V = GND or V
0.13
V
OL
I
CC
3
voltage
Control
pins
I
I
Input leakage current
V
CC
= 5.5V; V = GND or V
CC
±0.01
±1.0
±1.0
µA
I
V
CC
= 4.5V; V = 0.8V
35
35
I
Bus Hold current A or B
Ports 74ABTH16652
I
µA
V
V
= 4.5V; V = 2.0V
–75
–75
HOLD
5
CC
I
= 5.5V; V = 0 to 5.5V
±800
CC
I
I
Power-off leakage current
Power-up/down 3-State
V
= 0V; V = 4.5V; V = 0V or 5.5V
±1.0
±1.0
±100
±50
±100
±50
µA
µA
OFF
CC
O
I
I
V
= 2.1V; V = 0.0V; V = GND or V
PU/PD
CC O I CC
4
output current
I
+ I
+ I
3-State output High current
3-State output Low current
Output High leakage current
V
V
= 5.5V; V = 5.5V; V = V or V
IH
1.0
–1.0
5.0
10
–10
50
10
–10
50
µA
µA
µA
mA
IH
OZH
OZL
CC
O
I
IL
I
= 5.5V; V = 0.0V; V = V or V
O I IL IH
IL
CC
I
V
= 5.5V; V = 5.5V; V = GND or V
CEX
CC O I cc
1
I
O
Output current
V
CC
= 5.5V; V = 2.5V
–50
–80
–180
–50
–180
O
V
= 5.5V; Outputs High,
CC
I
I
0.5
8
2
19
2
2
19
2
mA
mA
mA
CCH
V = GND or V
I
CC
I
Quiescent supply current
Additional supply current
V
= 5.5V; Outputs Low, V = GND or V
CCL
CC I CC
V
CC
= 5.5V; Outputs 3-State;
0.5
CCZ
V = GND or V
I
CC
V
= 5.5V; one input at 3.4V,
CC
2
per input pin
74ABT16652
∆I
∆I
5.0
50
50
µA
µA
CC
other inputs at V or GND
CC
Additional supply current
V
= 5.5V; one input at 3.4V,
CC
2
per input pin
200
500
500
CC
other inputs at V or GND
CC
74ABTH16652
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V between 0 and 2.1V. When the part enables with V between 2.1V and 4.5V, the outputs will correctly
CC
CC
function with respect to all input logic states.
5. This is the bus hold overdrive current required to force the input to the opposite logic state.
7
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
MAX
o
o
T
V
= +25 C
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
= +5.0V ±0.5V
MIN
TYP
MIN
MAX
f
Maximum clock frequency
1
1
125
125
MHz
MAX
t
t
Propagation delay
nCPAB to nBx or nCPBA to nAx
1.5
1.5
3.3
2.8
4.0
4.1
1.5
1.5
4.9
ns
PLH
PHL
4.7
t
t
Propagation delay
nAx to nBx or nBx to nAx
1.0
1.0
2.3
1.8
3.2
4.1
1.0
1.0
3.9
ns
PLH
PHL
2
3
4.6
t
t
Propagation delay
nSAB to nBx or nSBA to nAx
1.0
1.0
3.4
2.6
4.3
4.3
1.0
1.0
5.0
ns
PLH
PHL
5.0
t
t
t
t
Output enable time
nOEBA to nAx
5
6
1.0
1.5
2.5
2.2
4.1
4.4
1.0
1.5
5.0
ns
PZH
t
5.3
PZL
Output disable time
nOEBA to nAx
5
6
1.5
1.5
3.6
2.7
4.4
3.6
1.5
1.5
4.9
ns
PHZ
t
4.0
PLZ
Output enable time
nOEAB to nBx
5
6
1.0
1.5
2.9
3.0
3.6
3.9
1.0
1.5
4.2
ns
PZH
t
4.6
PZL
Output disable time
nOEAB to nBx
5
6
2.0
1.5
3.1
2.3
5.5
4.5
2.0
1.5
5.9
ns
PHZ
PLZ
t
5.2
AC SETUP REQUIREMENTS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
= +5.0V
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V ±0.5V
MIN
TYP
MIN
t (H)
t (L)
s
Setup time
nAx to nCPBA, nBx to nCPAB
3.0
3.0
1.2
0.8
3.0
3.0
s
4
4
1
ns
ns
ns
t (H)
Hold time
nAx to nCPBA, nBx to nCPAB
1.0
1.0
–0.7
–1.1
1.0
1.0
h
t (L)
h
t (H)
Pulse width, High or Low
nCPAB or nCPBA
4.3
4.3
1.0
1.0
4.3
4.3
w
t (L)
w
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
1/f
MAX
3.0V or V
whichever
is less
3.0V or V
0V
CC
CC
nAx or nBx
nBx or nAx
V
M
V
M
nCPBA or
nCPAB
V
V
V
M
M
M
0V
t
t
PLH
PHL
t
w
(H)
t (L)
w
V
V
OH
OL
t
t
PLH
PHL
V
V
V
OH
M
M
nAx or nBx
V
V
M
M
V
OL
SH00030
SH00048
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx
8
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
AC WAVEFORMS (Continued)
V
M
= 1.5V, V = GND to 3.0V
IN
3.0V or V
CC
whichever
is less
3.0V or V
0V
CC
nOEBA
nOEAB
V
V
M
M
t
nSBA or
nSAB
V
V
M
M
0V
t
PZH
PHZ
t
t
PHL
PLH
V
OH
V
V
OH
OL
V
V
Y
M
nAx or nBx
V
V
M
M
nAx or nBx
0V
SH00050
SH00032
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx
3.0V
or
3.0V
nOEBA
nOEAB
or
V
V
CC
V
V
M
CC
M
nAx or
nBx
V
V
V
V
M
M
M
M
0V
t
t
PLZ
0V
PZL
t (H)
s
t (L)
s
t (H)
h
t (L)
h
3.0V
or
nAx or
nBx
3.0V
or
V
CC
V
M
V
V
nCPBA or
nCPAB
X
V
CC
V
M
0V
OL
V
M
t
(L)
W
0V
SH00051
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
SH00049
Waveform 4. Data Setup and Hold Times
TEST CIRCUIT AND WAVEFORMS
V
CC
t
W
AMP (V)
0V
7.0V
90%
90%
NEGATIVE
PULSE
V
V
M
R
M
L
V
V
OUT
IN
10%
10%
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
T
L
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
SWITCH POSITION
TEST SWITCH
V = 1.5V
M
Input Pulse Definition
t
t
closed
closed
open
PLZ
PZL
All other
DEFINITIONS:
R
C
=
=
Load resistor; see AC CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
L
L
INPUT PULSE REQUIREMENTS
FAMILY
Rep. Rate
t
w
t
R
t
Amplitude
F
R
T
=
Termination resistance should be equal to Z
pulse generators.
of
OUT
2.5ns
2.5ns
74ABT16
3.0V
1MHz
500ns
SH00022
9
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
10
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
11
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting (3-State)
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-03499
Document order number:
Philips
Semiconductors
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