74ABT574AN [NXP]
Octal D-type flip-flop 3-State; 八路D型触发器三态
| 型号： | 74ABT574AN |
| 厂家： | 
NXP |
| 描述： | Octal D-type flip-flop 3-State |
| 文件： | 总11页 (文件大小：54K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT574A
Octal D-type flip-flop (3-State)
Product specification
IC23 Data Handbook
1995 May 22
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
FEATURES
DESCRIPTION
The 74ABT574A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
• 74ABT574A is flow-through pinout version of 74ABT374
• Inputs and outputs on opposite side of package allow easy
interface to microprocessors
The 74ABT574A is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
• 3-State outputs for bus interfacing
• Power-up 3-State
• Power-up reset
• Common output enable
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
and 200 V per Machine Model
• Live insertion/extraction permitted.
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
CP to Qn
3.0
3.4
PLH
PHL
C = 50pF; V = 5V
ns
L
CC
C
Input capacitance
Output capacitance
Total supply current
V = 0V or V
CC
3
6
pF
pF
µA
IN
I
C
I
Outputs disabled; V = 0V or V
OUT
O
CC
Outputs disabled; V =5.5V
100
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74ABT574A N
DWG NUMBER
SOT146-1
20-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT574A N
74ABT574A D
74ABT574A DB
74ABT574A PW
20-Pin plastic SO
74ABT574A D
SOT163-1
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
74ABT574A DB
7ABT574APW DH
SOT339-1
SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN
SYMBOL
NUMBER
FUNCTION
OE
D0
1
2
20 V
CC
1
OE
Output enable input (active-Low)
Data inputs
19 Q0
18 Q1
17 Q2
16 Q3
2, 3, 4, 5,
6, 7, 8, 9
D1
D2
D3
D4
D5
D6
D7
3
4
5
6
7
8
9
D0-D7
19, 18, 17,
16, 15, 14,
13, 12
Q0-Q7
Data outputs
15 Q4
14 Q5
13 Q6
12 Q7
11 CP
11
10
20
CP
Clock pulse input (active rising edge)
Ground (0V)
GND
V
CC
Positive supply voltage
GND 10
SA00103
2
1995 May 22
853-1509 15261
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
LOGIC SYMBOL
FUNCTION TABLE
INPUTS
OUTPUTS
INTERNAL
REGISTER
OPERATING
MODE
OE
CP
Dn
Q0 – Q7
2
3
4
5
6
7
8
9
L
L
↑
↑
l
h
L
H
L
H
Load and read
register
D0 D1 D2 D3 D4 D5 D6 D7
CP
L
↑
X
NC
NC
Hold
H
H
↑
↑
X
Dn
NC
Dn
Z
Z
11
1
Disable outputs
H
h
=
=
High voltage level
High voltage level one set-up time prior to the Low–to–High
clock transition
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L
l
=
=
Low voltage level
Low voltage level one set-up time prior to the Low–to–High
clock transition
19 18 17 16 15 14 13 12
NC= No change
X
Z
↑
=
=
=
=
Don’t care
High impedance “off” state
Low-to-High clock transition
not a Low-to-High clock transition
SA00104
↑
LOGIC SYMBOL (IEEE/IEC)
1
EN
11
C1
2
19
18
17
16
15
14
13
12
2D
1
3
4
5
6
7
8
9
SA00105
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D7
2
3
4
5
6
7
8
9
D
D
D
D
D
D
D
D
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP
Q
CP Q
11
1
CP
OE
19
Q0
18
17
Q2
16
Q3
15
Q4
14
13
12
Q1
Q5
Q6
Q7
SA00106
3
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
CC
I
IK
–0.5 to +7.0
–18
V
mA
V
DC input diode current
V < 0
I
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
128
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
Min
4.5
0
Max
V
CC
DC supply voltage
5.5
V
V
V
I
Input voltage
V
CC
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
5
T
amb
Operating free-air temperature range
–40
+85
4
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
UNIT
Min
Typ
Max
Min
Max
V
Input clamp voltage
V
V
V
V
V
= 4.5V; I = –18mA
–0.9
2.9
–1.2
–1.2
V
V
V
V
V
IK
CC
CC
CC
CC
CC
IK
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
OH
I
IL
IH
IH
V
OH
High-level output voltage
= 5.0V; I = –3mA; V = V or V
3.4
OH
I
IL
= 4.5V; I = –32mA; V = V or V
IH
2.4
OH
I
IL
V
OL
Low-level output voltage
Power-up output low
= 4.5V; I = 64mA; V = V or V
IH
0.42
0.55
0.55
0.55
0.55
OL
I
IL
V
RST
V
CC
= 5.5V; I = 1mA; V = GND or V
CC
0.13
V
O
I
3
voltage
I
Input leakage current
V
V
= 5.5V; V = GND or 5.5V
±0.01
±5.0
±1.0
±1.0
µA
µA
I
CC
I
I
Power-off leakage current
Power-up/down 3-State
= 0.0V; V or V ≤ 4.5V
±100
±100
OFF
CC
O
I
V
CC
V
OE
= 2.0V; V = 0.5V; V = GND or V
O
I
CC;
CC
I
/I
±5.0
±50
±50
µA
PU PD
4
output current
= Don’t care
I
3-State output High current
3-State output Low current
Output High leakage current
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5V; V = 2.7V; V = V or V
5.0
–5.0
5.0
50
–50
50
50
–50
50
µA
µA
µA
mA
µA
mA
OZH
O
I
IL
IH
IH
I
= 5.5V; V = 0.5V; V = V or V
O I IL
OZL
I
= 5.5V; V = 5.5V; V = GND or V
O I
CEX
1
I
O
Output current
= 5.5V; V = 2.5V
–40
–180
250
30
–40
–180
250
30
O
I
= 5.5V; Outputs High, V = GND or V
100
24
CCH
I
CC
I
Quiescent supply current
= 5.5V; Outputs Low, V = GND or V
CCL
I
CC
= 5.5V; Outputs 3-State;
I
100
0.5
250
1.5
250
1.5
µA
CCZ
V = GND or V
I
CC
Additional supply current per
V
CC
= 5.5V; one input at 3.4V,
∆I
CC
mA
2
input pin
other inputs at V or GND
CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V between 0V and 2.1V, with a transition time of up to 10 msec. From V = 2.1V to V = 5V "10% a
CC
CC
CC
transition time of up to 100 µsec is permitted.
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
Min
o
o
T
V
= +25 C
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
= +5.0V ±0.5V
Min
Typ
Min
Max
f
Maximum clock frequency
1
1
150
400
150
ns
ns
MAX
t
t
Propagation delay
CP to Qn
1.5
2.0
3.0
3.4
4.4
4.7
1.5
2.0
5.0
5.1
PLH
PHL
t
t
Output enable time
to High and Low level
3
4
1.0
2.5
2.9
3.8
4.1
5.2
1.0
2.5
5.0
5.7
PZH
PZL
ns
ns
t
t
Output disable time
from High and Low level
3
4
1.8
1.4
3.1
2.6
4.3
3.8
1.8
1.4
5.0
4.0
PHZ
PLZ
5
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
AC SETUP REQUIREMENTS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
= +5.0V ±0.5V
Min
Typ
Min
t (H)
t (L)
s
Setup time, High or Low
Dn to CP
1.0
1.0
0.6
0.2
1.0
1.0
s
2
2
1
ns
ns
ns
t (H)
Hold time, High or Low
Dn to CP
1.0
1.0
–0.7
–0.4
1.0
1.0
h
t (L)
h
t (H)
CP pulse width
High or Low
2.0
2.0
0.7
0.8
2.0
2.0
w
t (L)
w
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
1/f
MAX
V
V
M
OE
Qn
M
CP
Qn
VM
t
VM
VM
t
t
t
PHZ
PZH
t
(H)
t
(L)
w
w
V
OH
PHL
PLH
V
–0.3V
0V
OH
V
M
VM
VM
SA00056
SA00108
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 3. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
V
V
V
Dn
CP
M
M
M
M
V
V
M
OE
Qn
M
t (H)
s
t (H)
h
t (L)
s
t (L)
h
t
t
PLZ
PZL
V
V
M
M
V
M
V
V
+0.3V
OL
OL
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SA00107
SA00109
Waveform 2. Data Setup and Hold Times
Waveform 4. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
6
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
TEST CIRCUIT AND WAVEFORM
V
t
W
AMP (V)
90%
CC
90%
7.0V
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
R
R
L
L
0V
(t
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
t
t
(t
(t
)
t
t
)
THL
F
TLH
R
)
(t )
F
R
C
TLH
R
THL
T
L
AMP (V)
90%
M
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
0V
SWITCH POSITION
V
= 1.5V
M
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
INPUT PULSE REQUIREMENTS
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
FAMILY
Amplitude
3.0V
Rep. Rate
1MHz
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
74ABT
500ns 2.5ns 2.5ns
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SA00012
7
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DIP20: plastic dual in-line package; 20 leads (300 mil)
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT146-1
SOT163-1
8
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
9
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
10
1995 May 22
Philips Semiconductors
Product specification
Octal D-type flip-flop (3-State)
74ABT574A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1995
All rights reserved. Printed in U.S.A.
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