74ABT648PW,112 [NXP]
74ABT648PW;型号: | 74ABT648PW,112 |
厂家: | NXP |
描述: | 74ABT648PW 输入元件 信息通信管理 光电二极管 逻辑集成电路 触发器 |
文件: | 总19页 (文件大小:105K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74ABT648
Octal transceiver/register; inverting; 3-state
Rev. 04 — 27 April 2005
Product data sheet
1. General description
The 74ABT648 high-performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting
3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or the internal registers. Data on the A or B
bus will be clocked into the registers as the appropriate clock pin goes HIGH.
Output enable (OE) and direction (DIR) pins are provided to control the transceiver
function.
In the transceiver mode, data present at the high-impedance port may be stored in either
the A or B register or both.
The select (SAB, SBA) pins determine whether data is stored or transferred through the
device in real time. The DIR determines which bus will receive data when the OE is active
(LOW).
In the isolation mode (OE = HIGH), data from bus A may be stored in the B register and/or
data from bus B may be stored in the A register. Outputs from real time or stored registers
will be inverted. When an output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses A or B may be driven
at a time.
2. Features
■ Combines 74ABT245 and 74ABT374A type functions in one device
■ Independent registers for A and B buses
■ Multiplexed real time and stored data
■ 3-state buffers
■ Live insertion and extraction permitted
■ Output capability: +64 mA and −32 mA
■ Power-up 3-state
■ Power-up reset
■ Latch-up protection:
◆ JESD78: exceeds 500 mA
■ ESD protection:
◆ MIL STD 883 method 3015: exceeds 2000 V
◆ Machine model: exceeds 200 V
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
Min Typ Max Unit
tPLH
tPHL
CI
propagation delay An to Bn or
Bn to An
CL = 50 pF; VCC = 5 V
-
-
-
-
-
3.3
3.4
4
-
-
-
-
ns
ns
pF
pF
µA
propagation delay An to Bn or
Bn to An
CL = 50 pF; VCC = 5 V
input capacitance on pins CP, S, VI = 0 V or VCC
OE, DIR
CI/O
ICC
I/O capacitance
outputs disabled;
VO = 0 V or VCC
7
quiescent supply current
outputs 3-state;
110 -
V
CC= 5.5 V
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range
−40 °C to +85 °C
Name
Description
Version
74ABT648D
SO24
plastic small outline package;
24 leads; bodywidth 7.5 mm
SOT137-1
74ABT648PW
−40 °C to +85 °C
TSSOP24
plastic thin shrink small outline package;
24 leads; body width 4.4 mm
SOT355-1
5. Functional diagram
21
G3
[
]
]
3EN1 BA
3
22
2
23
1
[
3EN2 AB
G6
G7
C4
C5
4
5
6
7
8
9
10 11
4
20
1
6
4D
A0 A1 A2 A3 A4 A5 A6 A7
CPAB
SAB
1
6 1
1
2
1
2
5D
7
1 7
3
DIR
5
6
19
18
17
16
15
14
13
23
22
21
CPBA
SBA
OE
7
8
9
B0 B1 B2 B3 B4 B5 B6 B7
10
11
20 19 18 17 16 15 14 13
001aac744
001aac745
Fig 1. Logic symbol
Fig 2. IEC logic symbol
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
2 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
21
3
OE
DIR
23
22
1
CPBA
SBA
CPAB
SAB
2
1 OF 8 CHANNELS
1D
C1
Q
4
20
B0
A0
1D
C1
Q
5
6
19
B1
18
B2
17
B3
16
A1
A2
A3
A4
A5
A6
A7
7
8
OTHER CHANNELS
B4
B5
B6
B7
9
15
14
13
10
11
001aac747
Fig 3. Logic diagram
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
3 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
6. Pinning information
6.1 Pinning
1
2
24
23
22
21
20
19
18
17
16
15
14
13
CPAB
SAB
DIR
A0
V
CC
CPBA
SBA
OE
B0
3
4
5
A1
6
A2
B1
648
7
A3
B2
8
A4
B3
9
A5
B4
10
11
12
A6
B5
A7
B6
GND
B7
001aac743
Fig 4. Pin configuration
6.2 Pin description
Table 3:
Symbol
CPAB
SAB
DIR
A0
Pin description
Pin
1
Description
A to B clock input
A to B select input
2
3
direction control input
4
data input/output 0 (A side)
data input/output 1 (A side)
data input/output 2 (A side)
data input/output 3 (A side)
data input/output 4 (A side)
data input/output 5 (A side)
data input/output 6 (A side)
data input/output 7 (A side)
ground (0 V)
A1
5
A2
6
A3
7
A4
8
A5
9
A6
10
11
12
13
14
15
16
17
18
19
20
21
A7
GND
B7
data input/output 7 (B side)
data input/output 6 (B side)
data input/output 5 (B side)
data input/output 4 (B side)
data input/output 3 (B side)
data input/output 2 (B side)
data input/output 1 (B side)
data input/output 0 (B side)
B6
B5
B4
B3
B2
B1
B0
OE
output enable input (active LOW)
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
4 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
Table 3:
Symbol
SBA
Pin description …continued
Pin
22
23
24
Description
B to A select input
CPBA
VCC
B to A clock input
supply voltage
7. Functional description
7.1 Function table
Table 4:
Function table[1]
Operating mode
Input
OE
Data I/O
An
DIR
CPAB
CPBA
SAB
SBA
Bn
Store A or B
Store A, B unspecified
X
X
X
X
↑
X
X
X
X
X
input
unspecified
output
[2]
Store B, A unspecified
X
↑
unspecified
output
input
[2]
Store A and B
Store A and B data
Isolation, hold storage
B data to A bus
H
H
X
X
↑
↑
X
X
X
X
input
output
input
input
H or L
H or L
Real time B data to A bus
Stored B data to A bus
A data to B bus
L
L
L
L
X
X
X
X
X
L
input
H or L
H
Real time A data to B bus
Stored A data to B bus
L
L
H
H
X
X
X
L
X
X
output
H or L
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
↑ = LOW-to-HIGH clock transition.
[2] The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
5 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
7.2 Bus management function
A
B
A
B
OE
L
DIR CPAB CPBA SAB
SBA
L
OE
L
DIR CPAB CPBA SAB
SBA
X
L
X
X
X
H
X
X
L
001aac792
001aac793
a. Real time bus transfer bus B to bus A
b. Real time bus transfer bus A to bus B
A
B
A
B
OE
X
X
DIR CPAB CPBA SAB
SBA
X
X
X
X
X
X
X
X
X
OE
L
L
DIR CPAB CPBA SAB
SBA
H
X
X
L
X
H/L
X
X
H
H
X
H
H/L
001aac794
001aac746
c. Storage from bus A, bus B or from bus
A and bus B
d. Transfer stored data to bus A or bus B
Fig 5. Examples of bus management functions
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
6 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−1.2
−0.5
Max
+7.0
+7.0
+5.5
Unit
V
supply voltage
input voltage
output voltage
[1]
[1]
V
VO
output in OFF-state or
HIGH-state
V
IIK
input diode current
output diode current
output current
VI < 0 V
-
-
-
−18
−50
128
150
+150
mA
mA
mA
°C
IOK
IO
VO < 0 V
output in LOW-state
[2]
Tj
junction temperature
storage temperature
Tstg
−65
°C
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum junction
temperature of this integrated circuit should not exceed 150 °C.
9. Recommended operating conditions
Table 6:
Recommended operating conditions
Symbol Parameter
Conditions
Min
4.5
0
Typ
Max
5.5
VCC
-
Unit
V
VCC
VI
supply voltage
-
-
-
-
-
-
-
-
input voltage
V
VIH
HIGH-level input voltage
LOW-level input voltage
HIGH-level output current
LOW-level output current
input transition rise or fall rate
ambient temperature
2.0
-
V
VIL
0.8
−32
64
V
IOH
-
mA
mA
ns/V
°C
IOL
-
∆t/∆V
Tamb
0
10
in free air
−40
+85
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
7 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = 25 °C
VIK
input diode voltage
VCC = 4.5 V; IIK = −18 mA
VCC = 4.5 V; VI = VIL or VIH
IO = −3 mA
-
−0.9 −1.2
V
VOH
HIGH-level output voltage
2.5
2.0
3.2
2.3
-
-
V
V
IO = −32 mA
VCC = 5.0 V; VI = VIL or VIH
IO = −3 mA
3.0
3.7
-
V
VOL
LOW-level output voltage
VCC = 4.5 V; VI = VIL or VIH
IO = 64 mA
-
-
0.42 0.55
0.13 0.55
V
V
[1]
VRST
ILI
power-up output low voltage VCC = 5.5 V; IO = 1 mA; VI = GND or VCC
input leakage current
control pins
VCC = 5.5 V; VI = GND or 5.5 V
-
-
-
-
±0.01 ±1.0 µA
±5 ±100 µA
±5.0 ±100 µA
data pins
IOFF
power-off leakage current
VCC = 0 V; VO or VI ≤ 4.5 V
[2]
IPU, PD
I
power-up or power-down
3-state output current
VCC = 2.1 V; VO = 0.5 V; VI = GND or VCC
;
±5.0 ±50
µA
VOE = don’t care
IOZ
3-state output current
VCC = 5.5 V; VI = VIL or VIH
output HIGH-state at VO = 2.7 V
output LOW-state at VO = 0.5 V
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
-
-
-
5.0
50
µA
µA
µA
−5.0 −50
ICEX
output HIGH-state leakage
current
5.0
50
[3]
IO
output current
VCC = 5.5 V; VO = 2.5 V
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
−50
−65
−180 mA
ICC
quiescent supply current
-
-
-
110
20
250
30
µA
outputs LOW-state
mA
µA
outputs 3-state
110
0.3
250
1.5
[4]
∆ICC
additional supply current per one data input at 3.4 V and other inputs at
mA
data input pin
VCC or GND; VCC = 5.5 V
CI
input capacitance
I/O capacitance
VI = 0 V or VCC
-
-
4
7
-
-
pF
pF
CI/O
outputs disabled; VO = 0 V or VCC
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
8 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max Unit
Tamb = −40 °C to +85 °C
VIK
input diode voltage
VCC = 4.5 V; IIK = −18 mA
VCC = 4.5 V; VI = VIL or VIH
IO = −3 mA
-
-
−1.2
V
VOH
HIGH-level output voltage
2.5
2.0
-
-
-
-
V
V
IO = −32 mA
VCC = 5.0 V; VI = VIL or VIH
IO = −3 mA
3.0
-
-
V
VOL
LOW-level output voltage
VCC = 4.5 V; VI = VIL or VIH
IO = 64 mA
-
-
-
-
-
-
-
-
-
-
0.55
0.55
V
V
[1]
[2]
VRST
ILI
power-up output low voltage VCC = 5.5 V; IO = 1 mA; VI = GND or VCC
input leakage current
VCC = 5.5 V; VI = GND or 5.5 V
VCC = 0.0 V; VO or VI ≤ 4.5 V
±1.0 µA
±100 µA
IOFF
power-off leakage current
IPU, IPD power-up or power-down
down 3-state output current
VCC = 2.1 V; VO = 0.5 V; VI = GND or VCC
;
±50
µA
VOE = don’t care
IOZ
3-state output current
VCC = 5.5 V; VI = VIL or VIH
output HIGH-state at VO = 2.7 V
output LOW-state at VO = 0.5 V
VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC
-
-
-
-
-
-
50
µA
µA
µA
−50
50
ICEX
output HIGH-state leakage
current
[3]
IO
output current
VCC = 5.5 V; VO = 2.5 V
VCC = 5.5 V; VI = GND or VCC
outputs HIGH-state
−50
-
−180 mA
ICC
quiescent supply current
-
-
-
-
-
-
250
30
µA
outputs LOW-state
mA
µA
outputs 3-state
250
1.5
[4]
∆ICC
additional supply current per one data input at 3.4 V and other inputs at
data input pin CC or GND; VCC = 5.5 V
mA
V
[1] For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
[2] This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms. From VCC = 2.1 V to VCC = 5 V ± 10 %
a transition time of up to 100 µs is permitted.
[3] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[4] This is the increase in supply current for each input at 3.4 V.
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
9 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
11. Dynamic characteristics
Table 8:
Dynamic characteristics
GND = 0 V; for test circuit see Figure 12
Symbol Parameter
Tamb = 25 °C; VCC = 5.0 V
Conditions
Min
Typ
Max
Unit
tPLH
propagation delay
CPAB to Bn or CPBA to An
An to Bn, Bn to An
see Figure 6
1.8
1.9
1.8
3.2
3.3
3.9
4.6
4.2
4.5
ns
ns
ns
see Figure 7 and 8
see Figure 7 and 8
SAB to Bn or SBA to An
propagation delay
tPHL
CPAB to Bn or CPBA to An
An to Bn, Bn to An
see Figure 6
2.6
2.2
2.5
4.0
3.4
4.1
5.7
5.0
5.6
ns
ns
ns
ns
ns
ns
see Figure 7 and 8
see Figure 7 and 8
SAB to Bn or SBA to An
output enable time to HIGH level
OE to An or Bn
tPZH
see Figure 10
see Figure 10
2.2
2.1
3.5
3.3
4.4
4.4
DIR to An or Bn
tPHZ
output disable time from HIGH
level
OE to An or Bn
see Figure 10
see Figure 10
2.3
1.9
3.6
3.5
4.6
4.8
ns
ns
DIR to An or Bn
tPZL
output disable time to LOW level
OE to An or Bn
see Figure 11
see Figure 11
3.2
3.1
4.5
4.4
6.0
5.6
ns
ns
DIR to An or Bn
tPLZ
output disable time from LOW
level
OE to An or Bn
DIR to An or Bn
see Figure 11
see Figure 11
see Figure 9
2.1
1.9
3.0
3.0
3.4
1.5
4.4
4.7
-
ns
ns
ns
tsu(H)
tsu(L)
th(H)
th(L)
tWH
set-up time HIGH
An to CPAB, Bn to CPBA
set-up time LOW
An to CPAB, Bn to CPBA
see Figure 9
see Figure 9
see Figure 9
see Figure 6
see Figure 6
see Figure 6
3.0
0.0
0.0
3.5
4.0
125
1.0
-
-
-
-
-
-
ns
hold time HIGH
An to CPAB, Bn to CPBA
−0.4
−1.0
2.6
ns
hold time LOW
An to CPAB, Bn to CPBA
ns
pulse width HIGH
CPAB or CPBA
ns
tWL
pulse width LOW
CPAB or CPBA
1.0
ns
fmax
maximum clock frequency
200
MHz
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
10 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
Table 8:
Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure 12
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C; VCC = 5 V ± 0.5 V
tPLH
propagation delay
CPAB to Bn or CPBA to An
An to Bn, Bn to An
SAB to Bn or SBA to An
propagation delay
CPAB to Bn or CPBA to An
An to Bn, Bn to An
SAB to Bn or SBA to An
output enable time
OE to An or Bn
see Figure 6
1.7
1.8
1.8
-
-
-
5.1
4.8
5.1
ns
ns
ns
see Figure 7 and 8
see Figure 7 and 8
tPHL
see Figure 6
2.7
2.3
2.7
-
-
-
6.1
5.2
6.1
ns
ns
ns
ns
ns
ns
see Figure 7 and 8
see Figure 7 and 8
tPZH
tPHZ
tPZL
tPLZ
see Figure 10
see Figure 10
2.0
1.6
-
-
5.0
5.0
DIR to An or Bn
output disable time
OE to An or Bn
see Figure 10
see Figure 10
2.1
1.8
-
-
5.2
5.6
ns
ns
DIR to An or Bn
output disable time
OE to An or Bn
see Figure 11
see Figure 11
2.4
2.7
-
-
6.6
6.3
ns
ns
DIR to An or Bn
output disable time
OE to An or Bn
see Figure 11
see Figure 11
see Figure 9
2.1
2.0
3.0
-
-
-
5.1
5.1
-
ns
ns
ns
DIR to An or Bn
tsu(H)
tsu(L)
th(H)
th(L)
set-up time HIGH
An to CPAB, Bn to CPBA
set-up time LOW
An to CPAB, Bn to CPBA
see Figure 9
see Figure 9
see Figure 9
see Figure 6
see Figure 6
see Figure 6
3.0
0.0
0.0
3.5
4.0
125
-
-
-
-
-
-
-
-
-
-
-
-
ns
hold time HIGH
An to CPAB, Bn to CPBA
ns
hold time LOW
An to CPAB, Bn to CPBA
ns
tW(H)
tW(L)
fmax
pulse width HIGH
CPAB or CPBA
ns
pulse width LOW
CPAB or CPBA
ns
maximum clock frequency
MHz
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
11 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
12. Waveforms
1/f
max
V
I
CPBA, CPAB
input
V
M
GND
t
t
WL
WH
t
PLH
t
PHL
V
OH
An or Bn
output
V
M
V
OL
001aac748
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 6. Propagation delay clock input to output, clock pulse width and maximum clock
frequency
V
I
SBA, SAB,
An, Bn input
V
M
GND
t
t
PHL
PLH
V
OH
An or Bn
output
V
M
V
OL
001aac749
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 7. Propagation delay An to Bn or Bn to An and SAB to Bn or SBA to An
V
I
SBA, SAB,
An, Bn input
V
M
GND
t
t
PLH
PHL
V
OH
An or Bn
output
V
M
V
OL
001aac750
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 8. Propagation delay An to Bn or Bn to An, and SBA to An or SAB to Bn
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
12 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
V
I
CPBA or
CPAB input
V
M
GND
t
WL
V
OH
An or Bn
input
V
t
M
V
OL
t
t
t
su(H)
h(H)
su(L)
h(L)
001aac751
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 9. Data set-up and hold times
OE input
V
I
V
V
M
M
t
DIR input GND
t
PZH
PHZ
V
OH
An or Bn
output
V
− 0.3 V
OH
V
M
V
OL
001aac752
VM = 1.5 V.
VOL and VOH are typical voltage output drop that occur with the output load.
Fig 10. 3-state output enable time to HIGH level and disable time from HIGH level
OE input
V
I
V
M
DIR input GND
t
t
PLZ
PZL
V
OH
An or Bn
output
V
M
V
+ 0.3 V
OL
V
OL
001aac753
VM = 1.5 V.
VOH and VOL are typical voltage output drop that occur with the output load.
Fig 11. 3-state output enable time to LOW level and disable time from LOW level
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
13 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
V
EXT
V
CC
R
L
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
L
R
L
R
T
mna616
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = Test voltage for switching times.
Fig 12. Load circuitry for switching times
Table 9:
Input
VI
Test data
Load
CL
VEXT
RL
tPHZ, tPZH
open
tPLZ, tPZL
tPLH, tPHL
3.0 V
50 pF
500 Ω
7.0 V
open
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
14 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
13. Package outline
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT137-1
075E05
MS-013
Fig 13. Package outline SOT137-1 (SO24)
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
15 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
D
E
A
X
c
H
v
M
A
y
E
Z
13
24
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
12
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT355-1
MO-153
Fig 14. Package outline SOT355-1 (TSSOP24)
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
16 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
14. Revision history
Table 10: Revision history
Document ID
74ABT648_4
Modifications:
Release date Data sheet status
20050427 Product data sheet
Change notice Doc. number
Supersedes
-
9397 750 14858 74ABT648_3
• The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
• Section 2: modified ‘JEDEC Std 17’ into ‘JESD78’.
• Table 1: changed tPLH from 5.9 ns to 3.3 ns and tPHL from 5.9 ns to 3.4 ns.
• Table 8: all values changed.
74ABT648_3
74ABT648_2
74ABT648_1
20021213
19980608
19950417
Product specification
Product specification
Product specification
-
-
-
9397 750 10848 74ABT648_2
9397 750 04022 74ABT648_1
-
-
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
17 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
15. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
16. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Trademarks
Notice — All referenced brands, product names, service names and
17. Disclaimers
trademarks are the property of their respective owners.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
19. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14858
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 04 — 27 April 2005
18 of 19
74ABT648
Philips Semiconductors
Octal transceiver/register; inverting; 3-state
20. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
7.1
7.2
Functional description . . . . . . . . . . . . . . . . . . . 5
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Bus management function . . . . . . . . . . . . . . . . 6
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Contact information . . . . . . . . . . . . . . . . . . . . 18
9
10
11
12
13
14
15
16
17
18
19
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 27 April 2005
Document number: 9397 750 14858
Published in The Netherlands
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