74AHC1G09GV [NXP]

2-input AND gate with open-drain output; 2输入与门与开漏输出
74AHC1G09GV
型号: 74AHC1G09GV
厂家: NXP    NXP
描述:

2-input AND gate with open-drain output
2输入与门与开漏输出

栅极 逻辑集成电路 光电二极管
文件: 总10页 (文件大小:68K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74AHC1G09  
2-input AND gate with open-drain output  
Rev. 02 — 18 December 2007  
Product data sheet  
1. General description  
The 74AHC1G09 is a high-speed Si-gate CMOS device.  
The 74AHC1G09 provides the 2-input AND function with open-drain output.  
The output of the 74AHC1G09 is an open drain and can be connected to other open-drain  
outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For  
digital operation this device must have a pull-up resistor to establish a logic HIGH level.  
2. Features  
High noise immunity  
Low power dissipation  
SOT353-1 and SOT753 package options  
ESD protection:  
HBM JESD22-A114E: exceeds 2000 V  
MM JESD22-A115-A: exceeds 200 V  
CDM JESD22-C101C: exceeds 1000 V  
Specified from 40 °C to +85 °C and from 40 °C to +125 °C.  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AHC1G09GW  
74AHC1G09GV  
40 °C to +125 °C  
TSSOP5  
plastic thin shrink small outline package; 5 leads;  
body width 1.25 mm  
SOT353-1  
40 °C to +125 °C  
SC-74A  
plastic surface-mounted package; 5 leads  
SOT753  
4. Marking  
Table 2.  
Marking  
Type number  
Marking code  
74AHC1G09GW  
74AHC1G09GV  
A9  
A09  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
5. Functional diagram  
Y
A
1
B
A
4
1
2
Y
&
2
4
GND  
B
001aad598  
001aad599  
001aad600  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
Fig 3. Logic diagram  
6. Pinning information  
6.1 Pinning  
1
2
3
5
4
B
A
V
Y
CC  
09  
GND  
001aad601  
Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A)  
6.2 Pin description  
Table 3.  
Pin description  
Symbol  
Pin  
1
Description  
data input B  
data input A  
ground (0 V)  
data output Y  
supply voltage  
B
A
2
GND  
Y
3
4
VCC  
5
7. Functional description  
Table 4.  
Function table[1]  
Input  
Output  
A
L
B
L
Y
L
L
L
Z
L
H
L
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
2 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
8. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
Max  
+7.0  
+7.0  
+7.0  
+7.0  
20  
±20  
25  
Unit  
V
supply voltage  
input voltage  
output voltage  
0.5  
[1]  
[1]  
[1]  
[1]  
[1]  
0.5  
V
VO  
active mode  
0.5  
V
high-impedance mode  
VI < 0.5 V  
0.5  
V
IIK  
input clamping current  
output clamping current  
output current  
-
mA  
mA  
mA  
mA  
mA  
°C  
IOK  
IO  
VO < 0.5 V  
-
VO > 0.5 V  
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
±75  
±75  
+150  
250  
GND current  
-
storage temperature  
total power dissipation  
65  
[2]  
Tamb = 40 °C to +125 °C  
-
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.  
9. Recommended operating conditions  
Table 6.  
Symbol  
VCC  
Recommended operating operations  
Parameter  
Conditions  
Min  
2.0  
0
Typ  
Max  
Unit  
V
supply voltage  
5.0  
5.5  
VI  
input voltage  
-
5.5  
V
VO  
output voltage  
active mode  
0
-
VCC  
6.0  
V
high-impedance mode  
0
-
V
Tamb  
ambient temperature  
40  
-
+25  
+125  
100  
20  
°C  
ns/V  
ns/V  
t/V  
input transition rise and fall rate VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
-
-
-
10. Static characteristics  
Table 7.  
Static characteristics  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
1.5  
2.1  
3.85  
-
Max  
-
Min  
1.5  
2.1  
3.85  
-
Max  
-
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
VCC = 3.0 V  
VCC = 5.5 V  
VCC = 2.0 V  
VCC = 3.0 V  
VCC = 5.5 V  
1.5  
-
-
-
-
-
-
-
-
V
V
V
V
V
V
2.1  
-
-
3.85  
-
-
-
VIL  
LOW-level  
input voltage  
-
-
-
0.5  
0.9  
1.65  
0.5  
0.9  
1.65  
0.5  
0.9  
1.65  
-
-
-
-
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
3 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
Table 7.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
VOL  
LOW-level  
VI = VIH or VIL  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
-
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
V
V
0.1  
0.1  
0.1  
V
0.36  
0.36  
±0.1  
0.44  
0.44  
±1.0  
0.55  
0.55  
±2.0  
V
-
V
II  
input leakage VI = 5.5 V or GND;  
-
µA  
current  
VCC = 0 V to 5.5 V  
IOZ  
ICC  
CI  
OFF-state  
output current GND; VCC = 5.5 V  
VI = VIH or VIL; VO = VCC or  
-
-
-
-
-
±0.25  
1.0  
±2.5  
10  
±10.0  
20  
µA  
µA  
pF  
supply current VI = VCC or GND; IO = 0 A;  
-
-
-
-
VCC = 5.5 V  
input  
1.5  
10  
10  
10  
capacitance  
11. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
GND = 0 V; for test circuit see Figure 6.  
Symbol Parameter Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ Max Min  
Max  
Min  
Max  
[1]  
[2]  
tpd  
propagation delay A and B to Y;  
see Figure 5  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
4.6 7.5  
6.5 11.0  
1.0  
1.5  
8.5  
1.0  
1.5  
9.0  
ns  
ns  
CL = 50 pF  
12.0  
12.5  
[3]  
[4]  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
-
3.2 5.5  
4.6 7.5  
1.0  
1.5  
-
6.5  
8.0  
-
1.0  
1.5  
-
7.0  
8.5  
-
ns  
ns  
pF  
CL = 50 pF  
CPD  
power dissipation CL = 50 pF; fi = 1 MHz;  
5
-
capacitance  
VI = GND to VCC  
[1] tpd is the same as tPZL and tPLZ  
.
[2] Typical values are measured at VCC = 3.3 V.  
[3] Typical values are measured at VCC = 5.0 V.  
[4] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
(CL × VCC2 × fo) = dissipation due to the output if the combination of the pull up voltage and resistance results in VCC at the output.  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
4 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
12. Waveforms  
V
I
A, B input  
V
M
t
GND  
t
PLZ  
PZL  
V
CC  
Y output  
V
M
V
X
V
OL  
001aad602  
Measurement points are given in Table 9.  
VOL is the typical voltage output level that occur with the output load.  
Fig 5. The data input (A, B) to output (Y) propagation delays  
Table 9.  
Input  
VM  
Measurement points  
Output  
VM  
VX  
VOL + 0.3 V  
0.5VCC  
0.5VCC  
S
1
V
CC  
open  
GND  
V
CC  
R
L
=
1000  
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
C
L
R
T
mna232  
Test data is given in Table 10.  
Definitions for test circuit:  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
Fig 6. Load circuit for switching times  
Table 10. Test data  
Input  
Load  
S1  
VI  
tr, tf  
RL  
CL  
tPHZ, tPZH  
GND  
GND  
tPLZ, tPZL  
VCC  
tPLH, tPHL  
open  
GND to VCC  
GND to VCC  
3.0 ns  
3.0 ns  
1000 Ω  
1000 Ω  
15 pF  
50 pF  
VCC  
open  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
5 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
13. Package outline  
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm  
SOT353-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )  
3
A
1
θ
L
L
p
1
3
e
w M  
b
p
detail X  
e
1
0
1.5  
3 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
E
max.  
0.1  
0
1.0  
0.8  
0.30  
0.15  
0.25  
0.08  
2.25  
1.85  
1.35  
1.15  
2.25  
2.0  
0.46  
0.21  
0.60  
0.15  
7°  
0°  
mm  
1.1  
0.65  
1.3  
0.15  
0.425  
0.3  
0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-09-01  
03-02-19  
SOT353-1  
MO-203  
SC-88A  
Fig 7. Package outline SOT353-1 (TSSOP5)  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
6 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
Plastic surface-mounted package; 5 leads  
SOT753  
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X  
e
b
p
w
M B  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
02-04-16  
06-03-16  
SOT753  
SC-74A  
Fig 8. Package outline SOT753 (SC-74A)  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
7 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
14. Abbreviations  
Table 11. Abbreviations  
Acronym  
CDM  
DUT  
Description  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
ESD  
HBM  
MM  
15. Revision history  
Table 12. Revision history  
Document ID  
74AHC1G09_2  
Modifications:  
Release date  
20071218  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
74AHC1G09_1  
The format of this data sheet has been redesigned to comply with the new identity guidelines  
of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Package SOT753 added to Section 3, Section 4 and Section 13.  
Quick reference data section removed.  
74AHC1G09_1  
20050926  
Product data sheet  
-
-
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
8 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
16.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Terms and conditions of sale — NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nxp.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
16.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
17. Contact information  
For additional information, please visit: http://www.nxp.com  
For sales office addresses, send an email to: salesaddresses@nxp.com  
74AHC1G09_2  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 02 — 18 December 2007  
9 of 10  
74AHC1G09  
NXP Semiconductors  
2-input AND gate with open-drain output  
18. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2  
7
Functional description . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Recommended operating conditions. . . . . . . . 3  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 3  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 4  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 8  
8
9
10  
11  
12  
13  
14  
15  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . . 9  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 9  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . . 9  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2007.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 18 December 2007  
Document identifier: 74AHC1G09_2  

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SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

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SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

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SI9135_11

SMBus Multi-Output Power-Supply Controller

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SI9136_11

Multi-Output Power-Supply Controller

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SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

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VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY